1. A static transfer switch, comprising:
a first contact switch configured to be turned on or off according to a first driving signal to supply output power of a first power source to a load;
a first semiconductor switch configured to be connected in parallel to the first contact switch, and configured to be turned on or off according to a first gate signal to supply the output power of the first power source to the load when the first contact switch is turned off;
a second contact switch configured to be turned on or off according to a second driving signal to supply output power of a second power source to the load;
a second semiconductor switch configured to be connected in parallel to the second contact switch, and configured to be turned on or off according to a second gate signal to supply the output power of the second power source to the load when the second contact switch is turned off;
a control unit configured to generate the first and second driving signals and the first and second gate signals;
a contact point sensing unit configured to sense whether each contact switch is electrically turned off and to output a contact point sense signal;
a state detecting unit configured to sense whether each switch is turned off according to output power of the each switch and the contact point sense signal transmitted from the contact point sensing unit, and to output a state signal; and
a switching command unit configured to command to switch a power supply path to the load according to the state signal outputted from the state detecting unit,
wherein the control unit simultaneously generates the first driving signal and the first gate signal together, and simultaneously transmits the first driving signal and the first gate signal together to the first contact switch and the first semiconductor switch, and
wherein the control unit simultaneously generates the second driving signal and the second gate signal together, and simultaneously transmits the second driving signal and the second gate signal together to the second contact switch and the second semiconductor switch.
2. The static transfer switch of claim 1, wherein the first semiconductor switch continues to receive the first gate signal even when the first contact switch is turned on, and
the second semiconductor switch continues to receive the second gate signal even when the second contact switch is turned on.
3. The static transfer switch of claim 1, wherein the first contact switch has an impedance lesser than an internal impedance of the first semiconductor switch, and
the second contact switch has an impedance lesser than an internal impedance of the second semiconductor switch,
wherein the impedances are contact resistances.
4. The static transfer switch of claim 3, wherein a turn-on lead time of the first contact switch is longer than a turn-on lead time of the first semiconductor switch, and
a turn-on lead time of the second contact switch is longer than the second semiconductor switch.
5. The static transfer switch of claim 3, wherein the first and second contact switches are mechanical contact point switches that are turned on or off mechanically.
6. The static transfer switch of claim 3, wherein the first and second contact switches are electrical contact point switches that are turned on or off electrically.
7. The static transfer switch of claim 3, wherein the first and second semiconductor switches are semiconductor switches of a kind selected from a group consisting of a silicon controlled rectifier (SCR) switch, an insulated gate bipolar transistor (IGBT) switch, a gate turn-off (GTO) switch, and a bipolar junction transistor (BJT).
8. The static transfer switch of claim 1, further comprising:
a power source sensing unit configured to sense output power of the plurality of power sources to thereby produce a power sense signal and to transmit the power sense signal to the state detecting unit,
wherein the state detecting unit senses whether the each switch is turned off based on the output power of the each switch, the contact point sense signal transmitted from the contact point sensing unit, and the power sense signal transmitted from the power source sensing unit, checks whether output power of a power source to be switched to among the plurality of power sources is normal, and outputs a state signal.
9. The static transfer switch of claim 1, further comprising:
a charger configured to be connected in parallel to each contact switch and to charge output power of power source corresponding to turn-on and turn-off of the switches based on the driving signals and the gate signals.
10. The static transfer switch of claim 9, wherein the contact point sensing unit senses a voltage variation of the charger caused by discharge of the charger and senses whether the contact switches are turned off.
11. The static transfer switch of claim 9, wherein the contact switch senses an electric current flowing through the contact switches by the discharge of the charger and senses whether the contact switches are turned off.
12. A power supplying apparatus, comprising:
a first power source;
a second power source;
a first contact switch configured to be turned on or off according to a first driving signal to supply output power of the first power source to a load;
a first semiconductor switch configured to be connected in parallel to the first contact switch, and configured to be turned on or off according to a first gate signal to supply the output power of the first power source to the load when the first contact switch is turned off;
a second contact switch configured to be turned on or off according to a second driving signal to supply output power of the second power source to the load;
a second semiconductor switch configured to be connected in parallel to the second contact switch, and configured to be turned on or off according to a second gate signal to supply the output power of the second power source to the load when the second contact switch is turned off;
a control unit configured to generate the first and second driving signals and the first and second gate signals;
a contact point sensing unit configured to sense whether each contact switch is electrically turned off and to output a contact point sense signal;
a state detecting unit configured to sense whether each switch is turned off according to output power of the each switch and the contact point sense signal transmitted from the contact point sensing unit, and to output a state signal; and
a switching command unit configured to command to switch a power supply path to the load according to the state signal outputted from the state detecting unit,
wherein the control unit simultaneously generates the first driving signal and the first gate signal together, and simultaneously transmits the first driving signal and the first gate signal together to the first contact switch and the first semiconductor switch, and
wherein the control unit simultaneously generates the second driving signal and the second gate signal together, and simultaneously transmits the second driving signal and the second gate signal together to the second contact switch and the second semiconductor switch.
13. The power supplying apparatus of claim 12, wherein the first power source is a first uninterruptible power supplier (UPS) and the second power source is a second UPS.
14. The power supplying apparatus of claim 12, wherein the first semiconductor switch continues to receive the first gate signal even when the first contact switch is turned on, and
the second semiconductor switch continues to receive the second gate signal even when the second contact switch is turned on.
15. The power supplying apparatus of claim 14, wherein the first contact switch has an impedance lesser than an internal impedance of the first semiconductor switch, and
the second contact switch has an impedance lesser than an internal impedance of the second semiconductor switch,
wherein the impedances are contact resistances.
16. The power supplying apparatus of claim 14, wherein a turn-on lead time of the first contact switch is longer than a turn-on lead time of the first semiconductor switch, and
a turn-on lead time of the second contact switch is longer than a turn-on lead time of the second semiconductor switch.
17. The power supplying apparatus of claim 12, wherein the power sources are uninterruptible power suppliers (UPS).
18. The power supplying apparatus of claim 12, further comprising:
a power source sensing unit configured to sense output power of the plurality of power sources to thereby produce a power sense signal and to transmit the power sense signal to the state detecting unit,
wherein the state detecting unit senses whether each switch is turned off based on the output power of the each switch, the contact point sense signal transmitted from the contact point sensing unit, and the power sense signal transmitted from the power source sensing unit, checks whether output power of a power source to be switched to among the plurality of power sources is normal, and outputs a state signal.
19. The power supplying apparatus of claim 12, further comprising:
a charger configured to be connected in parallel to each contact switch and to charge output power of power source corresponding to turn-on and turn-off of the switches based on the driving signals and the gate signals.
20. The power supplying apparatus of claim 19, wherein the contact point sensing unit senses a voltage variation of the charger caused by discharge of the charger and senses whether the contact switches are turned off.
21. The power supplying apparatus of claim 19, wherein the contact switch senses an electric current flowing through the contact switches by the discharge of the charger and senses whether the contact switches are turned off.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A vertical power semiconductor component including a semiconductor substrate with a rear side and an edge region, the semiconductor component comprising:
a. an emitter formed on the rear side of the semiconductor substrate;
b. a metal layer formed on the rear side of the semiconductor substrate, the metal layer at least partly covering the emitter; and
c. an injection attenuation means for reducing charge carrier injection from the emitter into the edge region, wherein the injection attenuation means is formed by a non-annealed zone of the emitter, the non-annealed zone lying in the edge region of the emitter, and wherein the non-annealed zone includes crystal damage produced during impurity implantation for forming the emitter and the crystal damage remains in the non-annealed zone as recombination centers.
2. The vertical power semiconductor component of claim 1 wherein the emitter is a cathode emitter.
3. The vertical power semiconductor component of claim 1 wherein the emitter is a collector-side p-emitter.
4. The vertical power semiconductor component of claim 1 wherein the non-annealed zone the of the emitter extends beyond the edge region of the substrate.
5. The vertical power semiconductor component of claim 1 wherein the emitter includes an active area adjacent the non-annealed zone of the emitter.
6. The vertical power semiconductor component of claim 1 further comprising:
a well of a first conductivity type on a front side of the substrate; and
a base region of a second conductivity type between the well and the emitter, wherein the emitter is of the first conductivity type.
7. A vertical power semiconductor component including a semiconductor substrate with a rear side and an edge region, the semiconductor component comprising:
a. an emitter formed on the rear side of the semiconductor substrate, the emitter including an active area and a non-annealed zone adjacent the active area lying substantially in the edge region of the substrate;
b. a metal layer at least partly covering the active area; and
c. an injection attenuation means for reducing charge carrier injection from the active area into the edge region, wherein the injection attenuation means is formed by the non-annealed zone of the emitter such that crystal damage produced during impurity implantation and the crystal damage remains in the non-annealed zone as recombination centers.
8. The vertical power semiconductor component of claim 7 wherein the emitter is a cathode emitter.
9. The vertical power semiconductor component of claim 7 wherein the emitter is a collector-side p-emitter.
10. A vertical power semiconductor component including a semiconductor substrate with a rear side and an edge region, the semiconductor component comprising:
an emitter implanted on substantially the entire rear side of the semiconductor substrate, the emitter including an annealed zone configured as an active area for the emitter and a non-annealed zone lying substantially in the edge region of the substrate; and
a metal layer at least partly covering the active area of the emitter;
wherein the non-annealed zone comprises an injection attenuation means such that crystal damage in the edge region of the emitter produced during the implantation the emitter acts as recombination centers.
11. The vertical power semiconductor component of claim 10 wherein the emitter is a cathode emitter.
12. The vertical power semiconductor component of claim 10 wherein the emitter is a collector-side p-emitter.
13. The vertical power semiconductor component of claim 10 wherein the annealed and non-annealed zones of the emitter are adjacent each other.
14. The vertical power semiconductor component of claim 13 wherein the non-annealed zone of the emitter extends laterally beyond the edge region of the substrate.