1. A computer-based method of simulating an integrated circuit design in a testbench, the method comprising:
read in netlist and timing data for the design;
flatten the design, thereby obtaining a flattened design;
store a data structure in a computer readable medium, the data structure comprising a plurality of cells, one cell per circuit element of the flattened design, each cell of the plurality of cells comprising timing and connectivity information for the circuit element associated with said each cell, said each cell further comprising an input periphery (N1) control bit, a backtrace (N2) control bit, an exterior (N3) control bit, and an output periphery (N4) control bit;
identify, from the information in the data structure, one or more primary inputs of the circuit design, each primary input of the one or more primary inputs having direct interaction with the testbench;
forward trace from said each primary input until an edge triggered flip-flop (ETFF) is encountered;
for said each primary input, turn on the N1 control bit of the ETFF encountered in the step of forward tracing from said each primary input, thereby obtaining a plurality of N ETFFs reachable from the primary inputs and having the N1 control bit turned on;
for said each primary input, add the ETFF encountered in the step of forward tracing from said each primary input to a first linked list of ETFFs to be placed in a single subset;
select N\u2032, N\u2032 being greater than or equal to N;
create a master list S of all ETFFs in the data structure, the master list S comprising a first group of ETFFs of the circuit design and a second group of ETFFs of the circuit design, the first group of ETFFs comprising all ETFFs having N1 control bit turned off, the second group of ETFFs comprising all ETFFs in the first linked list, each ETFF of the first group preceding all the ETFFs in the second group in the master list S, the master list S comprising M ETFFs;
divide the master list into (n\u22121) primary subsets {S(1), S(2), . . . , S(n\u22121)} so that S(n\u22121) comprises all ETFFs of the second group, and remaining primary subsets are created by substantially equal division of ETFFs of the first group;
for each ETFF in each primary subset of the (n\u22121) subsets, first backtrace from an input of said each ETFF in said each primary subset stopping when another ETFF is encountered, wherein N2 control bit is turned on in every element encountered during first backtracing including said each ETFF in said each primary subset and the encountered ETFF, assigning all circuit elements encountered during the first backtracing to said each primary subset, wherein no circuit element is divided between the primary subsets;
for said each primary subset,
create a corresponding association set that includes said each primary subset and logic cones of said each primary subset, and
create a corresponding testbench subset by identifying all ETFFs in the corresponding association set with the N1 control bit turned on and logic cones of said all ETFFs in the corresponding association set with the N1 control bit turned on;
create a master association set S* by merging all the association sets;
create a master testbench association set T* by merging all the testbench subsets;
turn on the N3 control bit of each exterior ETFF in the circuit design;
for said each primary subset,
form a corresponding fence subset, wherein the corresponding fence subset comprises all ETFFs of said primary subset with the N3 control bit turned on,
second backtrace from primary inputs of the association set corresponding to said each primary subset until an ETFF is encountered, turning the N2 and N4 control bits on for each circuit element encountered during the second backtracing,
create a Q subset corresponding to said each primary subset, the Q subset corresponding to said each primary subset comprising all elements of the association set corresponding to said each primary subset with the N4 control bit on, and
create a completion subset corresponding to said each primary subset by union of (1) association set corresponding to said each primary subset and (2) the Q subset corresponding to said each primary subset;
for each completion set, create a corresponding netlist module, thereby obtaining a plurality of netlist modules;
implement clock (CLK) inputs to the plurality of netlist modules;
load each netlist module of the plurality of netlist module onto a different computer of a plurality of networked computers, each networked computer of the plurality of networked computers configured to have access to a different memory and a different circuit simulator;
simulate said each netlist module on the computer associated with said each netlist module;
merge results of the step of simulating, thereby obtaining merged simulation results; and
provide user access to the merged simulation results.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A apparatus for packaging a poultry in a bag, comprising:
a frame having a left side and a right side;
a left base guide projecting from said left side of said frame, said left base guide comprising a base element and a side element, said base element and said side element forming an angle greater than 90 degrees;
a right base guide projecting from said right side of said frame, said right base guide comprising a base element and a side element, said base element and said side element forming an angle greater than 90 degrees;
a right finger attached to said frame and rotating in an arc from a first position between said left base guide and said right base guide, to a second position above said right base guide;
a left finger attached to said frame and rotating in an arc from a first position between said left base guide and said right base guide, to a second position above said left base guide;
whereby rotation of said right finger from said right finger first position to said right finger second position and rotation of said left finger from said left finger first position to said left finger second position, stretches a bag placed over said left base guide, said right base guide, said left finger, and said right finger, to form a cross-section of a hexagon;
a pusher assembly comprising a body having a first chamber and a second chamber said pusher assembly mounted on a ram, said ram moving from a first position remote from said base guides, to a second position adjacent said base guides, said first chamber grasping a first leg of a poultry placed between said base guides and said second chamber grasping a second leg of the poultry;
whereby said pusher assembly maintains the first leg and the second leg in a hocked position as said ram guides the poultry into the stretched bag.
2. The apparatus of claim 1, wherein said body further comprises:
a first clamp defining said first chamber, said first clamp rotatable from a first position defining a first size of said first chamber to a second position defining a second size of said second chamber, said first size selected to allow entry of the first leg into said first chamber and said second size selected to grasp the first leg; and
a second clamp defining said second chamber, said second clamp rotatable from a first position defining a first size of said second chamber to a second position defining a second size of said second chamber, said first size selected to allow entry of the second leg into said second chamber and said second size selected to grasp the second leg.
3. The apparatus of claim 2, further comprising:
a first swing gate rotatable about an axle and in contact with said first clamp, whereby a forward stroke of said ram pushes the first leg against said first swing gate to rotate said first clamp from said first position to said second position; and
a second swing gate rotatable about an axle and in contact with said second clamp,
whereby a forward stroke of said ram pushes the second leg against said second swing gate to rotate said second clamp from said first position to said second position.
4. The apparatus of claim 3, wherein said first swing gate and said second swing gate are biased to said first position.
5. A method for packaging poultry in a bag, comprising:
placing a bag, said bag having a relaxed state, a tightly stretched state, and an intermediate stretched state, over a right base guide, a left base guide, a right finger, and a left finger, while said bag is in said relaxed state,
said left base guide comprising a base element and a side element, said base element and said side element forming an angle greater than 90 degrees,
said right base guide comprising a base element and a side element, said base element and said side element forming an angle greater than 90 degrees, and
said left base guide and said right base guide being oriented a distance apart;
rotating said right finger in an arc from a first position between said left base guide and said right base guide, to a second position above said right base guide;
rotating said left finger in an arc from a first position between said left base guide and said right base guide, to a second position above said left base guide;
whereby rotation of said right finger from said right finger first position to said right finger second position and rotation of said left finger from said left finger first position to said left finger second position, stretches said bag over said left base guide, said right base guide, said left finger, and said right finger, to form a cross-section of a hexagon;
providing a pusher assembly having a body and first chamber and a second chamber within said body, said first chamber and said second chamber configured to grasp a leg of a poulty; and
grasping a first leg and a second leg of the poultry and guiding the poultry into said bag in said tightly stretched state.