1461101202-67bffd43-77a2-44a8-bc09-556d5bfb7e66

1. A method for regulating order entry based on an acceptable slop range in an electronic trading environment comprises:
receiving by a computing device a percentage value that determines an acceptable range of prices at which a trader is willing to accept to buy or sell a spread, wherein the spread comprises a first leg and a second leg, and wherein the percentage value provides that an actual cost of a particular spread, when executed, is within a consistent tolerable difference from a desired cost of the spread, regardless of a desired spread price;
receiving by the computing device the desired price to buy or sell the spread, wherein the desired spread price is associated with the desired cost of the spread;
placing by the computing device an order at a price in a first leg of the spread, wherein the order is based on a condition in the second leg;
detecting by the computing device a change in the condition;
determining by the computing device if the change in the condition would cause the spread to be bought or sold at a price outside of the acceptable range of prices and if so re-pricing the order in the first leg to maintain the desired spread price; and
determining by the computing device if the change in the condition would not cause the spread to be bought or sold at a price outside of the acceptable range of prices and if not then refraining from re-pricing the order.
2. The method of claim 1, wherein the tolerable difference relates to a tolerable amount of change in the condition that can occur before the order is re-priced.
3. The method of claim 1, wherein the particular spread is a divide spread, wherein the divide spread comprises a spread definition which divides the prices from the first leg by the prices in the second leg.
4. The method of claim 1, wherein the desired spread price determines the price of the order in the first leg based on the condition in the second leg according to a spread definition.
5. The method of claim 1, wherein the desired cost of the spread represents the user’s desired cost to buy or sell the spread and is based on subtracting the order price of the second leg from the order price of the first leg at a time when executing the spread would result in achieving the desired spread price.
6. The method of claim 1, wherein the actual spread price represents a price for the spread if the spread was executed at a current time according to a spread definition.
7. The method of claim 1, wherein the actual cost of the spread represents a cost to buy or sell the spread assuming that the spread is executed at a current time and is based on subtracting the order price of the second leg from the order price of the first leg.
8. The method of claim 1, wherein the desired spread price and the actual spread price can be different depending on the condition in the second leg, and if so, then the desired cost of the spread is different from the actual cost of the spread.
9. The method of claim 1, wherein the acceptable range of prices comprises a lowest acceptable price and a highest acceptable price for which a trader is willing to buy or sell a spread.
10. The method of claim 1, wherein determining the acceptable range of prices to buy a spread comprises:
determining the lowest acceptable price using the following relationship: lowest acceptable price=desired spread price*(100\u2212slop)100; and
determining the highest acceptable price using the following relationship: highest acceptable price=desired spread price*(100+slop)100.
11. The method of claim 1, wherein determining the acceptable range of prices to sell a spread comprises:
determining the lowest acceptable price using the following relationship: lowest acceptable price=desired spread price*(100\u2212slop)100; and
determining the highest acceptable price using the following relationship: highest acceptable price=desired spread price*(100+slop)100.
12. The method of claim 1, wherein the slop are user-defined.
13. The method of claim 1, wherein the slop is a percentage value.
14. The method of claim 1, wherein the slop for the lowest acceptable price can be different from the highest acceptable price.
15. The method of claim 1, wherein the actual spread price, according to the spread definition, when executed, will fall within the acceptable range of prices.
16. The method of claim 1, wherein the condition is a current price at the inside market.
17. The method of claim 1, wherein if the order in the first leg fills, an offsetting order is sent to the second leg, such that the offsetting order is placed at a current inside market price.
18. The method of claim 1, wherein the current inside market price comprises a highest bid price and a lowest ask price currently available for the second leg.
19. The method of claim 1, wherein the spread is considered executed once the orders in the first and second legs are filled.
20. A computer readable medium containing program code for causing a microprocessor to execute a method for displaying market information for a trading strategy, comprising:
a program code for receiving a percentage value that determines an acceptable range of prices at which a trader is willing to accept to buy or sell a spread, wherein the spread comprises a first leg and a second leg, and wherein the percentage value provides that an actual cost of a particular spread, when executed, is within a consistent tolerable difference from a desired cost of the spread, regardless of a desired spread price;
a program code for receiving the desired price to buy or sell the spread, wherein the desired spread price is associated with the desired cost of the spread;
a program code for placing an order at a price in a first leg of the spread, wherein the order is based on a condition in the second leg;
a program code for detecting a change in the condition;
a program code for determining if the change in the condition would cause the spread to be bought or sold at a price outside of the acceptable range of prices and if so re-pricing the order in the first leg to maintain the desired spread price; and
a program code for determining if the change in the condition would not cause the spread to be bought or sold at a price outside of the acceptable range of prices and if not then refraining from re-pricing the order.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A ferroelectric memory comprising:
a memory cell array comprising a memory cell, the memory cell comprising a ferroelectric capacitor and a transistor;
a plate-line configured to transmit a plate-line voltage to the ferroelectric capacitor in order to write and read data;
a pair of bit-lines configured to transmit a signal charge from the memory cell;
a sense amplifier circuit configured to sense, to compare, and to amplify a potential difference between the bit-line pair;
a bit-line driver circuit configured to drive the bit-line pair and a plate-line driver circuit configured to drive the plate-line; and
a bit-line precharge circuit and a plate-line precharge circuit configured to switch between a state where either a bit-line of the bit-line pair is precharged to a first bit-line precharge potential or the plate-line is precharged to a first plate-line precharge potential and a state where either the bit-line is electrically floating and isolated from the first bit-line precharge potential or the plate-line is electrically floating and isolated from the first plate-line precharge potential,
the bit-line driver circuit, the plate-line driver circuit, the bit-line precharge circuit, and the plate-line precharge circuit being configured to apply the first bit-line precharge potential to the bit-line of the bit-line pair while applying a second plate-line voltage to the plate-line in a test mode, and then to switch the bit-line from the first bit-line precharge potential to the floating state and to increase the plate-line voltage from the second plate-line voltage to a first plate-line voltage in order to read data from the memory cell,
the second plate-line voltage is set to a value in a manner that a polarization state becomes similar to the state where the ferroelectric capacitor is imprinted.
2. The ferroelectric memory of claim 1, wherein
the second plate-line voltage is applied after initial pattern data is written to the memory cell in the test mode.
3. The ferroelectric memory of claim 1, wherein
the test mode is performed for initial pattern data and reverse pattern data which is a reversed data of the initial pattern data.
4. The ferroelectric memory of claim 1, wherein
the second plate-line voltage is configured to increase from a first absolute value to a second absolute value larger than the first absolute value for a predetermined period and then to decrease to the first absolute value.
5. A ferroelectric memory comprising:
a memory cell array comprising a plurality of memory cells, each memory cell comprising a ferroelectric capacitor and a transistor;
a plate-line configured to transmit a plate-line voltage to the ferroelectric capacitor in order to write and read data;
a pair of bit-lines configured to transmit a signal charge from the memory cell;
a sense amplifier circuit configured to sense, to compare, and to amplify a potential difference between the bit-line pair;
a bit-line driver circuit configured to drive the bit-line pair and a plate-line driver circuit configured to drive the plate-line; and
a bit-line precharge circuit and a plate-line precharge circuit configured to switch between a state where either a bit-line of the bit-line pair is precharged to a first bit-line precharge potential or the plate-line is precharged to a first plate-line precharge potential and a state where either the bit-line is electrically floating and isolated from the first bit-line precharge potential or the plate-line is electrically floating and isolated from the first plate-line precharge potential,
the bit-line driver circuit, the plate-line driver circuit, the bit-line precharge circuit, and the plate-line precharge circuit being configured to apply a first array voltage to the bit-line through the sense amplifier circuit and the first plate-line voltage to the plate-line in a first mode of normal reading and writing operation, not being a test mode, and to apply the first plate-line precharge voltage to the plate-line while charging a second array voltage to the bit-line in a second mode being the test mode, and then to switch the bit-line to the floating state and to increase the plate-line voltage to the first plate-line voltage in order to read cell data from the memory cell,
the second array voltage is set to a value in a manner that a polarization state becomes similar to the state where the ferroelectric capacitor is imprinted.
6. The ferroelectric memory of claim 5, wherein the second array voltage is applied after initial pattern data is written to the memory cell in the test mode.
7. The ferroelectric memory of claim 5, wherein the test mode is performed for initial pattern data and reverse pattern data which is a reversed data of the initial pattern data.
8. The ferroelectric memory of claim 5, wherein the second array voltage is configured to increase from a first absolute value to a second absolute value larger than the first absolute value for a predetermined period and then to decrease to the first absolute value.