1. A transportation payment system, the system comprising:
a card for storing data including information representing a monetary value; and
an accepting device having a card reader, wherein the accepting device includes at least one computer in operative connection with the card reader, wherein the at least one computer is configured to access a card reader interface application, wherein the card reader interface application is configured to:
read card data stored on the card including information representing the monetary value stored on the card;
determine a format classification based on a format of the card data; and
generate mapped data by decoding the card data based on the format classification, wherein the mapped data is recognizable by the card reader.
2. The transportation payment system of claim 1, wherein the card reader interface application is further configured to cause the card reader to:
receive payment data including a monetary amount associated with a transportation cost;
encode the payment data based on a format recognizable by the card; and
write the encoded payment data to the card.
3. The transportation payment system of claim 2, wherein the card reader interface application is further configured to cause the card reader to adjust the monetary value on the card based on the encoded transaction data.
4. The transportation payment system of claim 2, wherein the card reader interface application is further configured is wirelessly write the encoded payment data to the card.
5. The transportation payment system of claim 1, wherein the at least one computer is further configured to receive the mapped card data.
6. The transportation payment system of claim 1, wherein the card reader interface application is further configured to wirelessly read card data stored on the card.
7. The transportation payment system of claim 1, the transportation payment system comprising a card-based platform.
8. A method for processing a payment transaction in a transportation system, comprising:
storing data including information representing a monetary value on a card;
reading card data stored on the card including information representing the monetary value stored on the card;
determining a format classification based on a format of the card; and
generating mapped data by decoding the card data based on the format classification, wherein the mapped data is recognizable by the card reader.
9. The method of claim 8, further comprising:
receiving payment data including a monetary amount associated with a transportation cost;
encoding the payment data based on a format recognizable by the card; and
writing the encoded payment data to the card.
10. The method of claim 9, further comprising adjusting the monetary value on the card based on the encoded payment data.
11. The method of claim 9, further comprising wirelessly writing the encoded payment data to the card.
12. The method of claim 8, further comprising wirelessly reading the card data stored on the card.
13. A method for deploying a transportation payment system, comprising:
providing a card for storing data including information representing a monetary value; and
providing an accepting device having a card reader, wherein the accepting device includes at least one computer in operative connection with the card reader, wherein the at least one computer is configured to access a card reader interface application, wherein the card reader interface application is configured to control operation of the card reader to carry out a transaction, wherein the card reader interface application is configured to cause the card reader to:
read card data stored on the card including information representing the monetary value stored on the card;
determine a format classification based on a format of the card data; and
generate mapped data by decoding the card data based on the format classification, wherein the mapped data is recognizable by the card reader.
14. The method of claim 13, wherein the card reader interface application is further configured to decode any encoded card data stored on the card.
15. The method of claim 13, wherein the card reader interface application is further configured to:
receive payment data including a monetary amount associated with a transportation cost;
encode the payment data based on a format recognizable by the card; and
write the encoded payment data to the card.
16. The method of claim 15, wherein the card reader interface application is further configured to wirelessly write the encoded payment data to the card.
17. The method of claim 13, wherein the card reader is configured to wirelessly read the card data stored on the card.
18. A computer program product for processing a payment transaction in a transportation system, the computer program product comprising a non-transitory computer readable storage medium, and program instructions stored on the non-transitory computer readable storage medium, to:
store data including information representing a monetary value on a card;
read card data stored on the card including information representing the monetary value stored on the card;
determine a format classification based on a format of the card data; and
generate mapped data by decoding the card data based on the format classification, wherein the mapped data is recognizable by the card reader.
19. The computer program product of claim 18, further comprising program instructions to decode any encoded card data stored on the card.
20. The computer program product of claim 18, further comprising program instructions to:
receive payment data including a monetary amount associated with a transportation cost;
encode the payment data based on a format recognizable by the card; and
write the encoded payment data to the card.
21. The computer program product of claim 18, further comprising program instructions to wirelessly read the card data stored on the card.
22. The computer program product of claim 18, further comprising program instructions to wirelessly write the encoded payment data to the card.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A method, comprising:
providing a frequency divider comprising at least one frequency divider cell having a circuit configuration changeable during operation according to a determined criterion;
changing the circuit configuration of the at least one frequency divider cell by changing at least one of the following parameters of the at least one frequency divider cell according to a change in a signal processed by the frequency divider:
output impedance,
bias current by coupling at least one active biasing transistor to the frequency divider cell circuitry,
power supply voltage of the frequency divider, and
size of an inverting buffer at an output of the at least one frequency divider cell;
detecting a level of at least one of an input signal and an output signal of the frequency divider; and
changing the circuit configuration of the at least one frequency divider cell in response to the detected level or levels.
2. The method of claim 1, further comprising:
changing the circuit configuration of the at least one frequency divider cell when changing the signal processed by the frequency divider.
3. The method of claim 1, further comprising:
changing the output impedance of the at least one frequency divider cell by selectively coupling one or more impedance components to the frequency divider cell circuitry.
4. The method of claim 1, further comprising:
increasing the bias current in response to an increase in the frequency of the signal processed by the frequency divider.
5. The method of claim 1, further comprising:
dividing a frequency of an input oscillator signal by a determined frequency division factor in the frequency divider having a determined circuit configuration defined by the circuit configuration of the at least one frequency divider cell.
6. The method of claim 1, further comprising:
changing the circuit configuration of the at least one frequency divider cell by applying to the frequency divider at least one control signal selecting the circuit configuration of the at least one frequency divider cell.
7. The method of claim 1, wherein the frequency divider is configured to be used in a radio device, the method further comprising:
changing the circuit configuration of the at least one frequency divider cell in response to a change in the communication state of the radio device.
8. The method of claim 7, further comprising:
changing the circuit configuration of the at least one frequency divider cell in response to a change in the operating frequency of the radio device.
9. The method of claim 7, further comprising:
changing the circuit configuration of the at least one frequency divider cell in response to a change in a communication protocol of the radio device, wherein each communication protocol defines communication parameters of a different telecommunication system.
10. The method of claim 1, further comprising:
changing the circuit configuration of the at least one frequency divider cell in response to a change in a configuration of an oscillator signal generator configured to generate an oscillator signal input to the frequency divider.
11. The method of claim 10, further comprising:
changing the circuit configuration of the at least one frequency divider cell by applying to the frequency divider at least a portion of a control signal applied to the oscillator signal generator.
12. An apparatus, comprising:
a frequency divider configured to comprise at least one frequency divider cell having a circuit configuration changeable during operation in response to at least one control signal;
a controller configured to change the circuit configuration of the at least one frequency divider cell by changing at least one of the following parameters of the at least one frequency divider cell according to a change in an oscillator signal processed by the frequency divider:
output impedance,
bias voltage by coupling at least one active biasing transistor to the frequency divider circuitry,
power supply voltage of the frequency divider, and
size of an inverting buffer at the output of the frequency divider; and
an amplitude detection unit configured to detect the level of at least one of input signal and output signal of the frequency divider and to apply the detected level or levels to the controller, and the controller is further configured to change the circuit configuration of the at least one frequency divider cell in response to the detected level or levels.
13. The apparatus of claim 12, wherein the controller is configured to change the circuit configuration of the at least one frequency divider cell when changing the signal processed by the frequency divider.
14. The apparatus of claim 12, wherein the controller is configured to change the output impedance of the at least one frequency divider cell by selectively coupling one or more impedance components to the frequency divider circuitry.
15. The apparatus of claim 12, wherein the controller is configured to increase the bias current in response to an increase in the frequency of the signal processed by the frequency divider.
16. The apparatus of claim 12, wherein the controller is configured to change the circuit configuration of the at least one frequency divider cell by applying to the frequency divider at least one control signal selecting the circuit configuration of the at least one frequency divider cell.
17. The apparatus of claim 12, further comprising:
an oscillator signal generator configured to generate an oscillator signal input to the frequency divider, and the controller is configured to change the circuit configuration of the at least one frequency divider cell in response to a change in the configuration the oscillator signal generator.
18. The apparatus of claim 12, wherein the controller is further configured to change the circuit configuration of the at least one frequency divider cell by applying to the frequency divider at least a portion of the at least one control signal applied to the oscillator signal generator.
19. The apparatus of claim 12, wherein the apparatus is a radio apparatus.
20. The apparatus of claim 19, wherein the radio apparatus is configured to change the circuit configuration of the at least one frequency divider cell in response to a change in a communication state of the radio apparatus.
21. The apparatus of claim 20, wherein the radio apparatus is configured to change the circuit configuration of the at least one frequency divider cell in response to a change in a operating frequency of the radio apparatus.
22. The apparatus of claim 20, wherein the radio apparatus is configured to change the circuit configuration of the at least one frequency divider cell in response to a change in a communication protocol of the radio apparatus, wherein each communication protocol defines communication parameters of a different telecommunication system.
23. An apparatus, comprising:
frequency-dividing means comprising at least one frequency divider cell having a circuit configuration changeable during operation according to a determined criterion;
changing means for changing the circuit configuration of the at least one frequency-divider cell by changing at least one of the following parameters of the at least one frequency divider cell according to a change in a signal processed by the frequency-dividing means:
output impedance,
bias current by coupling at least one active biasing transistor to the frequency divider cell circuitry,
power supply voltage of the frequency divider, and
size of an inverting buffer at an output of the at least one frequency divider cell;
amplitude detection means for detecting the level of at least one of input signal and output signal of the frequency divider and for applying the detected level or levels to the controller, and the changing means further changes the circuit configuration of the at least one frequency divider cell in response to the detected level or levels.
24. A computer-readable program distribution medium encoding a computer program of instructions being configured to control a processor to perform:
selecting a circuit configuration of at least one frequency divider cell according to a change in a signal processed by a frequency divider comprising the at least one frequency divider cell having a circuit configuration changeable during operation;
configuring the at least one frequency divider cell to implement the selected circuit configuration by changing at least one of the following:
output impedance,
bias current by coupling at least one active biasing transistor to the frequency divider cell circuitry,
power supply voltage of the frequency divider, and
size of an inverting buffer at an output of the at least one frequency divider cell
detecting a level of at least one of an input signal and an output signal of the frequency divider; and
changing the circuit configuration of the at least one frequency divider cell in response to the detected level or levels.