1. A phase change material (PCM) switch comprising:
a resistive heater element;
a PCM element proximate the resistive heater element;
a thermally conductive electrical insulating barrier layer positioned between the PCM heating element and the resistive heating element; and
conductive lines extending from ends of the PCM element and control lines extending from ends of the resistive heater element.
2. The PCM switch of claim 1, wherein the PCM element overlies the resistive heating element.
3. The PCM switch of claim 1, wherein the resistive heating element overlies the PCM element.
4. The PCM switch of claim 1, wherein the resistive heating element comprises a first resistive heating element that overlies the PCM element and a second resistive heating element in which the PCM element overlies the second resistive heating element.
5. The PCM switch of claim 1, wherein the resistive heating element is formed with four sides that substantially surround at least a portion of the PCM element.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A thin film transistor manufacturing method, characterized in that, comprising steps of:
providing a transparent substrate;
forming a gate electrode and a data line on a surface of the transparent substrate;
forming a first insulation layer, which covers the gate electrode and the data line, on the surface of the transparent substrate;
forming an amorphous semiconductor layer on a surface of the first insulation layer in an area corresponding to the gate electrode;
forming a through hole in an area of the surface of the first insulation layer corresponding to the data line;
forming a conductive layer, which covers the amorphous semiconductor layer and the through hole, on the surface of the first insulation layer;
removing a portion of the conductive layer corresponding to the gate electrode to cut the conductive layer, thereby forming a source electrode and a drain electrode of the thin film transistor;
forming a second insulation layer, which covers the amorphous semiconductor layer, the through hole, as well as the source electrode and the drain electrode, on the surface of the first insulation layer; and
irradiating the amorphous semiconductor layer by a laser to increase an ordering degree of a lattice of the amorphous semiconductor layer.
2. The thin film transistor manufacturing method according to claim 1, characterized in that, the amorphous semiconductor layer comprises a first amorphous semiconductor layer and a second amorphous semiconductor layer, which are laminated and have a same conductive type, the first amorphous semiconductor layer is attached to the first insulation layer, the second amorphous semiconductor layer is attached to the source electrode and the drain electrode, a conductivity of the second amorphous semiconductor layer is higher than that of the first amorphous semiconductor layer.
3. The thin film transistor manufacturing method according to claim 2, characterized in that, the amorphous semiconductor layer is formed by utilizing an epitaxizing method, and the first amorphous semiconductor layer and the second amorphous layer are formed by changing concentration of a dopant during epitaxizing.
4. The thin film transistor manufacturing method according to claim 2, characterized in that, the step of cutting the conductive layer further comprises a step of removing a portion of the second amorphous semiconductor layer corresponding to the gate electrode at the same time.
5. The thin film transistor manufacturing method according to claim 3, characterized in that, the step of cutting the second amorphous semiconductor layer further comprises a step of thinning the first amorphous semiconductor layer exposed.
6. The thin film transistor manufacturing method according to claim 1, characterized in that, further comprising a step of removing a portion of the second insulation layer located between the source electrode and the drain electrode after the step of forming the second insulation layer.