What is claimed is:
1- A probe assemblage for providing electrical connection simultaneously between one or more integrated circuits on a semiconductor wafer and a circuit test equipment, said assemblage including:
an interposer comprising a dielectric material having two major surfaces,
a plurality of protruding contact elements on one major surface of said interposer, each element corresponding to a test pad on one or more integrated circuits,
a plurality of conductive vias connecting each of said contact elements to a metallized pad on the second surface of said interposer,
a plurality of conductive leads fanning outward from said metallized pads to a standardized array of interposer connectors,
a compliant material underlying said contact elements on the first surface, andor said interposer connectors on the second surface of the interposer,
a probe card having an array of connectors corresponding to said interposer connector array, and
means for attaching said probe card to said interposer.
2- An assemblage as in claim 1 wherein said protruding contact elements comprise a noble or oxide limiting metal.
3- An assemblage as in claim 1 wherein said protruding contact elements are stud bumps.
4- An assemblage as in claim 1 wherein said contact elements are microwires.
5- An assemblage as in claim 1 wherein the interposer has a coefficient of thermal expansion in the range of 2 to 10 PPM.
6- An assemblage as in claim 1 wherein said interposer includes one or more buried metal ground planes.
7- An assemblage as in claim 1 wherein said pads and connecting leads on the interposer comprise a first layer of copper and second layer of a laser ablatable material.
8- An assemblage as in claim 1 wherein said pads and connecting leads on the interposer are patterned by laser ablation in combination with chemical etching.
9- An assemblage as in claim 1 wherein the conductor pattern of leads and pads is software generated and input to a laser.
10- An assemblage wherein said chip contact elements are spaced more closely than the probe card connectors.
11- An assemblage as in claim 1 wherein said connectors on the second surface of the interposer mate to an array of connectors on a probe card.
12- An assemblage as in claim 1 wherein said connectors on the probe card are arrayed in a universal pattern common to multiple circuit devices.
13-An assemblage as in claim 1 wherein said means to attach the interposer to the probe card is a plurality of threaded machine screws.
14- An assemblage as in claim 1 wherein said means to attach the interposer to probe card is a cam ring locking mechanism.
15- An assemblage as in claim 1 including a source of ultrasonic energy coupled to said chip contact elements.
16- A probe assemblage for providing electrical connection between an integrated circuit chip on a semiconductor wafer and a circuit test equipment, said assemblage including:
an interposer comprising a dielectric material having two major surfaces and contoured sides of the interposer,
a plurality of protruding contact elements positioned atop a compliant material on one major surface of said interposer,
each element corresponding to a test pads on the chip,
a plurality of conductive vias connecting each of said contact elements to a metallized pad and a standardized array of connectors on the second surface of said interposer,
a probe card having an array of connectors corresponding to said standardized contact array, and
means attaching said probe card to said interposer.
17- An assemblage as in claim 16 wherein said means to attach the probe card and interposer is by press fit.
18- A probe assemblage for providing electrical connection between an integrated circuit chip on a semiconductor wafer and a circuit test equipment, said assemblage including:
an interposer comprising a dielectric material having two major surfaces and contoured sides of said interposer and,
a plurality of protruding contact elements positioned atop a compliant material on one major surface of said interposer corresponding to test pads on the chip,
a plurality of conductive leads connecting each of said contact elements to a metallized pad and a standardized array of connectors on the second surface of said interposer,
a probe card having an array of connectors corresponding to said standardized connector array, and
said interposer is press fit into said probe card.
19- A test probe assemblage for simultaneously providing electrical connection between scribe line test structures on one or more integrated circuits on a semiconductor wafer and an electrical test equipment, said assemblage including:
an interposer comprising a dielectric material having two major surfaces,
a plurality of protruding contact elements positioned atop a compliant material on one major surface of said interposer corresponding to test pads on one or more integrated circuits,
a plurality of conductive vias connecting each of said contact elements to a metallized pad on the second surface of said interposer,
a plurality of leads fanning outward from said pads to a standardized array of connectors,
a probe card having an array of connectors corresponding to said standardized contact array, and
a means to attach said probe card to said interposer.
20- A method of forming an assemblage for simultaneously providing electrical connection between one or more integrated circuits on a semiconductor wafer and a circuit tester, including the following steps:
providing an dielectric interposer having thermal expansion characteristics similar to that of silicon, and having a plurality of conductive vias at locations corresponding to the distance between chip contact pads which extending from the first major surface to the second major surface of the interposer,
affixing a layer of highly conductive metal on each major surface,
patterning an array of pads corresponding to chip contact pads on the first surface,
patterning an array of pads at the via egress point on the second surface and an array of conductive leads terminating in a standardized pattern,
bonding a chip contact element to each patterned contact pad on the first surface, and a connector element on the terminal of each lead on the second surface,
providing a compliant material layer underlying the chip contact elements, andor probe connector on the interposer,
providing a probe card having a mating connector to that on said interposer, and
aligning said connectors, and mechanically attaching.
21- A method as in claim 20 wherein said patterns on the interposer surface are software input to a computer controlled laser.
22- A method as in claim 20 wherein said metal patterns are formed by at least partially by laser ablation.
23- A method as in claim 20 wherein said metal patterns are formed by photolithography and chemical etching.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. An optical method for measuring characteristics of a sample using a broadband metrology tool in a purge gas flow environment, comprising:
purging a beam path for the metrology tool with purge gas at a first flow rate;
illuminating a surface of the sample by a beam of source radiation, the beam comprising at least one wavelength component in a vacuum ultraviolet (VUV) range andor at least one wavelength component in a ultraviolet-visible (UV-Vis) range; and
adjusting a flow rate of a purge gas between the first flow rate for metrology measurements made when the source radiation is in the VUV range and a second flow rate for metrology measurements made when the source radiation is in the UV-Vis range.
2. The method of claim 1, wherein adjusting the flow rate of the purge gas includes lowering the flow rate so that the second flow rate is lower than the first flow rate.
3. The method of claim 2, wherein adjusting the flow rate of the purge gas includes monitoring an effect of the flow rate on an Airborne Molecular Contaminants (AMC) layer on a surface of the sample using measurements taken with the metrology tool.
4. The method of claim 3 wherein adjusting the flow rate includes varying the flow rate in a manner that stabilizes a thickness of AMC layer.
5. The method of claim 4 wherein adjusting the flow rate includes monitoring a precision of the metrology measurements and varying the flow rate in a manner that optimizes a precision of measurements taken with the metrology tool using source radiation in the UV-Vis range.
6. The method of claim 1, wherein the metrology tool is a spectroscopic ellipsometer, single-wavelength ellipsometer, spectroscopic reflectometer or single-wavelength reflectometer.
7. The method of claim 1, wherein adjusting of a flow rate of the purge gas includes increasing the flow rate of the purge gas for a metrology tool measurement using source radiation in the VUV spectral region after a measurement taken with the metrology tool using source radiation in the UV-Vis region, whereby the first flow rate is greater than the second flow rate.
8. The method of claim 7 wherein adjusting of a flow rate of the purge gas includes monitoring a VUV signal measured with the metrology tool and optimizing a recovery time of the VUV signal measured with the metrology tool.
9. The method of claim 8 wherein the recovery time is about 60 seconds or less.
10. An optical system for measuring characteristics of a samples using a broadband metrology tool in a purged gas flow environment, comprising:
a light source configured to supply a beam of source radiation having at least one wavelength component in a VUV range andor at least one wavelength component in a UV-Vis range;
illumination optics adapted to illuminate a surface of the sample with the beam source of radiation;
collection optics collecting signal radiation generated by interaction of the beam source radiation with the surface of the sample;
a detector adapted to provide at least one output signal in response to the signal radiation collected from the collection optics, wherein the signal is related to a property of the surface of the sample;
a purge gas source configured to supply a flow of purge gas to a beam path in the light source andor illumination optics andor sample andor collection optics andor detector; and
a controller operably coupled to the detector and the purge gas source, wherein the controller is configured to control a flow rate of the purged gas flow in response to the output signal from the detector by adjusting a flow rate of the purge gas between a first flow rate for metrology measurements made when the source radiation is in the VUV range and a second flow rate for metrology measurements made when the source radiation is in the UV-Vis range.
11. The system of claim 10 wherein the controller includes an interface unit that facilitates interaction between the detector, the purge gas source and the controller.
12. The system of claim 11, wherein the controller includes a processor and a system memory.
13. The system of claim 10, wherein the illumination optics comprises a polarizer.
14. The system of claim 10, wherein the collection optics comprises an analyzer.
15. The system of claim 10 wherein the detector is a spectroscopic ellipsometer or single-wavelength ellipsometer.
16. The system of claim 10 wherein the detector is a spectroscopic reflectometer or single-wavelength reflectometer.
17. The system of claim 10 wherein the purge gas does not substantially absorb VUV radiation.
18. The system of claim 17 wherein the purge gas is selected from the group of nitrogen, helium, argon, neon and other inert gases.
19. The system of claim 18, wherein the purge gas source includes a gas manifold coupled to two or more of the light source, illumination optics, sample, collection optics andor detector through separate gas lines, each gas line having a valve operably coupled to the controller, whereby the controller is configured to control separate flows of purge gas to two or more of the light source, illumination optics, sample, collection optics andor detector.
20. The system of claim 10, wherein the controller is operably coupled to the light source, wherein the controller is configured to
purge a beam path for the metrology tool with purge gas at a first flow rate;
illuminate a surface of the sample by a beam of source radiation, the beam comprising at least one wavelength component in a vacuum ultraviolet (VUV) range andor at least one wavelength component in a ultraviolet-visible (UV-Vis) range; and
adjust the flow rate of the purge gas between the first flow rate for metrology measurements made when the source radiation is in the VUV range and the second flow rate for metrology measurements made when the source radiation is in the UV-Vis range.