1461114565-b946ebad-5134-47c8-b4e2-3eb2fd7534eb

1. A plasma display device comprising:
a first panel provided with a discharge sustaining electrode and a dielectric layer on the inside thereof, and
a second panel laminated on said first panel so that a discharge space is formed on the inside of said first panel, wherein
the trap density in said dielectric layer is not more than 11018 piecescm3.
2. A plasma display device comprising:
a first panel provided with a discharge sustaining electrode and a dielectric layer on the inside thereof, and
a second panel laminated on said first panel so that a discharge space is formed on the inside of said first panel, wherein
the movable metallic ion density in said dielectric layer is not more than 11018 piecescm3.
3. A plasma display device as set forth in claim 1 or 2, wherein the electric field strength impressed on said dielectric layer is not more than 7104 Vcm.
4. A plasma display device as set forth in claim 1 or 2, satisfying the following relational expression (1):
Log NE1042318723(1)
where E is the electric field strength impressed on said dielectric layer, and N is the trap density or movable metallic ion density in said dielectric layer.
5. A plasma display device as set forth in claim 2, wherein the movable metallic ion density in said dielectric layer is not more than 11017 piecescm3.
6. A plasma display device as set forth in any one of claims 1 to 5, wherein a bus electrode is provided along the longitudinal direction of said discharge sustaining electrode, and a barrier layer having a thickness of several nm to several tens of nm is provided between said bus electrode and said dielectric layer so as to prevent diffusion of metal from said bus electrode into said dielectric layer.
7. A plasma display device as set forth in any one of claims 1 to 6, wherein a protective film is provided on the surface of said dielectric layer on the side of said discharge space, and a barrier layer having a thickness of several nm to several tens of nm is provided between said dielectric layer and said protective film so as to suppress injection of a carrier into said dielectric layer.
8. A plasma display device as set forth in claim 1, wherein the trap density in said dielectric layer is not more than 11017 piecescm3.
9. A plasma display device as set forth in claim 8, wherein the trap density in said dielectric layer is not more than 51016 piecescm3.
10. A plasma display device as set forth in claim 8, wherein the trap density in said dielectric layer is not more than 11017 piecescm3 and not less than 1109 piecescm3.
11. A plasma display device as set forth in any one of claims 5 and 8 to 10, wherein the electric field strength impressed on said dielectric layer is not more than 30104 Vcm.
12. A plasma display device as set forth in any one of claims 1 to 11, wherein said dielectric layer is an SiO2x (where x is in the range of 0x<1.0) film formed by a vacuum film forming method.
13. A plasma display device as set forth in any one of claims 1 to 11, wherein said dielectric layer is a nitrogen-containing silicon oxide (SiON) film formed by a vacuum film forming method.
14. A plasma display device as set forth in any one of claims 1 to 11, wherein said dielectric layer is a glass paste dielectric film formed by a coating method, a printing method or a dry film method, followed by firing.
15. A plasma display device as set forth in any one of claims 1 to 11, wherein said dielectric layer is an oxide or nitride dielectric film formed by a chemical vapor phase method.
16. A plasma display device as set forth in any one of claims 1 to 11, wherein said dielectric layer is a nitrogen-containing oxide dielectric film formed by a chemical vapor phase method.
17. A plasma display device of the AC driving type as set forth in any one of claims 1 to 16, wherein an address eletrode, partition walls for partitioning said discharge space, and a phosphor layer disposed between said partition walls are provided on the inside of said second panel.
18. A plasma display device as set forth in claim 17, wherein a dielectric film is provided on the inside of said address electrode on the side of said discharge space, and the trap density of said dielectric film is not more than 11018 piecescm3.
19. A plasma display device as set forth in claim 17, wherein a dielectric film is provided on the inside of said address electrode on the side of said discharge space, and the movable metallic ion density in said dielectric film is not more than 11018 piecescm3.
20. A plasma display device as set forth in claim 18 or 19, wherein the electric field strength impressed on said dielectric film is not more than 7104 Vcm.
21. A plasma display device as set forth in claim 18 or 19, satisfying the following relational expression (1):
Log NE1042318723(1)
where E is the electric field strength impressed on said dielectric film, and N is the trap density or movable metallic ion density in said dielectric film.
22. A plasma display device as set forth in claim 18, wherein a dielectric film is provided on the inside of said address electrode on the side of said discharge space, and the trap density in said dielectric film is not more than 11017 piecescm3.
23. A plasma display device as set forth in claim 19, wherein a dielectric film is provided on the inside of said address electrode on the side of said discharge space, and the movable metallic ion density in said dielectric film is not more than 11017 piecescm3.
24. A plasma display device as set forth in claim 22 or 23, wherein the electric field strength impressed on said dielectric layer is not more than 30104 Vcm.
25. A method of producing a plasma display device comprising a first panel provided with a discharge sustaining electrode and a dielectric layer on the inside thereof, and a second panel laminated on said first panel so that a discharge space is formed on the inside of said first panel, wherein
said dielectric layer is composed of a silicon oxide film formed by use of a sputtering method in which the partial pressure of oxygen gas in an atmosphere gas introduced into a sputtering apparatus is set to be not less than 15% so as thereby to form said dielectric layer having the trap density of not more than 11018 piecescm3.
26. A method of producing a plasma display device comprising a first panel provided with a discharge sustaining electrode and a dielectric layer on the inside thereof, and a second panel laminated on said first panel so that a discharge space is formed on the inside of said first panel, wherein
said dielectric layer is composed of a silicon oxide film formed by use of a sputtering method in which the partial pressure of oxygen gas in an atmosphere gas introduced into a sputtering apparatus is set to be not less than 15% so as thereby to form said dielectric layer having the trap density of not more than 11017 piecescm3.
27. A method of producing a plasma display device comprising a first panel provided with a discharge sustaining electrode and a dielectric layer on the inside thereof, and a second panel laminated on said first panel so that a discharge space is formed on the inside of said first panel, wherein
said dielectric layer is composed of an oxide film formed by a chemical vapor phase method in which the substrate temperature is in the range of 350 to 630 C., inclusive, so as thereby to form said dielectric layer having the trap density of not more than 11018 piecescm3.
28. A method of producing a plasma display device comprising a first panel provided with a discharge sustaining electrode and a dielectric layer on the inside thereof, and a second panel laminated on said first panel so that a discharge space is formed on the inside of said first panel, wherein
said dielectric layer is composed of a low melting point glass film formed by a method wherein firing is conducted at a film forming temperature in the range of 500 to 630 C., inclusive, so as thereby to form said dielectric layer having the trap density of not more than 11018 piecescm3.
29. A method of producing a plasma display device comprising a first panel provided with a discharge sustaining electrode and a dielectric layer on the inside thereof, and a second panel laminated on said first panel so that a discharge space is formed on the inside of said first panel, wherein
a dielectric film is provided on the inside on the discharge space side of said address electrode in said second panel, and the dielectric layer is composed of a low melting point glass formed by a method wherein firing is conducted at a film forming temperature in the range of 500 to 630 C., inclusive, so as thereby to form said dielectric layer having the trap density of not more than 11018 piecescm3.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A wireless communications transmitter comprising:
two or more communication signal processing paths comprising:
at least a high power communication signal processing path;
at least a low power communication signal processing path; and

a processor coupled to the two or more communication signal processing paths, the processor configured to select, based on a desired transmission output power, one of the two or more communication signal processing paths to process communication signals for transmission.
2. The wireless communications transmitter of claim 1 further comprising the high power communication signal processing path including an up-converter and one or more notch filters coupled to an output of the up-converter.
3. The wireless communications transmitter of claim 2, wherein the up-converter is operative with at least a local oscillator (LO) and the one or more notch filters filter n odd order harmonics (nLO) of an up-converted communication signal.
4. The wireless communications transmitter of claim 3, wherein the n odd order harmonics (nLO) comprises at least 3LO.
5. The wireless communications transmitter of claim 1, wherein the at least a high power communication signal processing path includes a communication signal processing chain comprising a sequentially coupled input buffer, up-converter, notch filter and variable gain power amplifier driver.
6. The wireless communications transmitter of claim 5, wherein the notch filter comprises one or more notch filters to filter n odd order harmonics (nLO) of an up-converted communication signal.
7. The wireless communications transmitter of claim 1, wherein the processor configured to select comprises a selection bit sequence for: selecting the at least a high power communication signal processing path or the at least a low power communication signal processing path.
8. The wireless communications transmitter of claim 1, wherein the at least a high power communication signal processing path supports 10-15 dB of dynamic range for maximum power.
9. The wireless communications transmitter of claim 1, wherein the at least a low power communication signal processing path supports output power at or below 15 dB.
10. A method in a wireless communications transmitter comprising:
determining a desired transmitter output power;
selecting from two or more communication signal processing paths;
for transmitter high power output:
selecting from a first of the two or more communication signal processing paths, the first communication signal processing path including at least one high power communication signal processing chain;
filtering within the at least one high power communication signal processing chain one or more odd order harmonics of the communication signal; and
amplifying the filtered communication signal; and
for transmitter low power output:
selecting from a second of the two or more communication signal processing paths, the second communication signal processing path including at least one low power communication signal processing chain; and
amplifying the filtered communication signals.
11. The method of claim 10, wherein the filtering is performed to filter n odd order harmonics (nLO) of the high power communication signal.
12. The method of claim 11, wherein the n odd order harmonics (nLO) comprises at least 3LO.
13. A mobile communications device comprising:
circuitry including two or more communication signal processing paths comprising:
at least a high power communication signal processing path;
at least a low power communication signal processing path; and