1. A semiconductor memory device, comprising:
a command generator suitable for generating an internal active command signal corresponding to an active command signal, wherein, when an active section of the active command signal lasts for a predetermined time or longer, the internal active command signal is additionally activated;
an address storage suitable for storing an address signal based on an activation number of the internal active command signal; and
a refresh operation driver suitable for performing a refresh operation on a word line corresponding to the stored address signal.
2. The semiconductor memory device of claim 1, wherein the command generator includes:
a normal activating unit for activating the internal active command signal based on the active command signal; and
an additional activating unit for additionally activating the internal active command signal based on the predetermined time.
3. The semiconductor memory device of claim further comprising:
an enable controller suitable for controlling whether to enable an operation of storing the address signal in a arbitrary section.
4. A semiconductor memory device, comprising:
a command generator suitable for receiving an active command signal, and modifying the received active command signal to an internal active command signal corresponding to an activity type;
an address storage suitable for storing an address signal based on an activation number of the internal active command signal;
a counter suitable for counting the internal active command signal corresponding to the activity type; and
a refresh operation driver suitable for receiving the address signal corresponding to an output signal of the counter, and performing a refresh operation on a word line corresponding to the stored address signal.
5. The semiconductor memory device of claim 4, wherein the activity type is divided into a first activity type and a second activity type, wherein the first activity type is determined based on an active section of the active command signal, and the second activity type is determined based on the number of times that the active command signal is activated in a predetermined section.
6. The semiconductor memory device of claim 5, further comprising:
first command generator suitable for generating a first internal active command signal when the active command signal of the first activity type is received; and
a second command generator suitable for generating a second internal active command signal when the active command signal of the second activity type is received.
7. The semiconductor memory device of claim 6, wherein the first activity type includes an active command signal having an active section where the active command signal is activated for a predetermined time or longer, and
the number of times that the first internal active command signal is activated exceeds the number of times that the active command signal of the first activity type is activated.
8. The semiconductor memory device of claim 6, wherein the second activity type includes an active command signal that is activated a predetermined times within a predetermined time, and
the number of times that the second internal active command signal is activated corresponds to the number of times that the active command signal of the second activity type is activated.
9. The semiconductor memory device of claim 6, wherein the address storage includes:
a first address storing unit for storing the address signal based on the first internal active command signal; and
a second address storing unit for storing the address signal based on the second internal active command signal.
10. The semiconductor memory device of claim 6, wherein the counter includes:
a first counting unit for counting the number of times that the first internal active command signal is activated; and
a second counting unit for counting the number of times that the second internal active command signal is activated.
11. The semiconductor memory device of claim 10, further comprising:
a comparator suitable for comparing a counting value of the first counting unit and a counting value of the second counting unit with each other.
12. The semiconductor memory device of claim 11, wherein the address storage provides the refresh operation driver with the address signal that is stored based on the internal active command signal corresponding to one of the first internal active command signal and the second internal active command signal based on an output signal of the comparator.
13. The semiconductor memory device of claim 4, further comprising:
an enable controller suitable for controlling whether to enable an operation of storing the address signal in an arbitrary section.
14. A memory system, comprising:
a controller suitable for generating access type information corresponding to data to be processed; and
a semiconductor memory device suitable for performing a readwrite operation on the data under control of the controller, modifying an internal control signal for storing a refresh target address based on the access type information, and performing a refresh operation on a word line corresponding to the refresh target address.
15. The memory system of claim 14, wherein the access type information corresponds to an access time of the data.
16. The memory system of claim 14, wherein the internal control signal is generated by modifying an active command signal provided by the controller.
17. The memory system of claim 16, wherein the semiconductor memory device includes:
a command generator suitable for receiving the active command signal and modifying the received active command signal to an internal active command signal corresponding to an activity type;
an address storage suitable for storing an address signal based on an activation number of the internal active command signal;
a counter suitable for counting the internal active command signal corresponding to the activity type; and
a refresh operation driver suitable for receiving the address signal corresponding to an output signal of the counter, and performing a refresh operation on a word line corresponding to the stored address signal.
18. The memory system of claim 17, wherein the command generator controls the number of times that the internal active command signal is activated based on the access type information.
19. The memory system of claim 17, wherein the counter controls a counting unit based on the access type information.
20. The memory system of claim 17, wherein the activity type is divided into a first activity type and a second activity type, wherein the first activity type is determined based on an active section of the active command signal, and wherein the second activity type is determined based on the number of times that the active command signal is activated in a predetermined section.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. One or more computer-readable hardware storage media comprising computer-readable instructions which are executable to cause a computing device to perform operations comprising:
adjusting a pointer received as part of a redirected call to a target virtual function;
jumping from the target virtual function to shim functionality using the adjusted pointer;
causing the shim functionality to readjust the adjusted pointer; and
jumping to a replacement function with the readjusted pointer to enable the replacement function to utilize the readjusted pointer to interact with an object instance associated with the target virtual function.
2. The one or more computer-readable hardware storage media of claim 1, wherein the adjusted pointer comprises a this pointer associated with the target virtual function.
3. The one or more computer-readable hardware storage media of claim 1, wherein the operations further comprise adjusting the pointer based on a memory offset value for the target virtual function.
4. The one or more computer-readable hardware storage media of claim 3, wherein the memory offset value is determined from a TI_GET_THISADJUST constant value associated with the object instance.
5. The one or more computer-readable hardware storage media of claim 1, wherein the replacement function is configured to use the readjusted pointer to access at least one of data or one or more functionalities of the object instance.
6. The one or more computer-readable hardware storage media of claim 1, wherein a signature for the shim functionality matches a signature for the target virtual function.
7. The one or more computer-readable hardware storage media of claim 1, wherein a calling convention for the shim functionality matches a calling convention for the target virtual function.
8. A computing device comprising:
at least one processor; and
one or more computer-readable hardware storage media comprising computer-readable instructions that are executable by the at least one processor to cause the computing device to implement operations including:
adjusting a pointer received as part of a redirected call to a target virtual function based at least in part on an offset between a memory address for an object associated with the target virtual function and a memory address for an introducing class within the object; and
readjusting the adjusted pointer to point to the object based at least in part on one or more symbols for the object.
9. The computing device of claim 8, wherein the adjusted pointer comprises a this pointer associated with the target virtual function.
10. The computing device of claim 8, the operations further comprising enabling the target virtual function to access data values or functionalities of the object using the adjusted pointer.
11. The computing device of claim 8, the operations further comprising jumping to a replacement function with the readjusted pointer to enable the replacement function to utilize the readjusted pointer to interact with the object associated with the target virtual function.
12. The computing device of claim 8, the operations further comprising executing a replacement function using the readjusted pointer.
13. A computer-implemented method comprising:
adjusting a pointer received as part of a redirected call to a target virtual function;
jumping from the target virtual function to shim functionality using the adjusted pointer;
causing, by a computing device, the shim functionality to readjust the adjusted pointer; and
jumping to a replacement function with the readjusted pointer to enable the replacement function to utilize the readjusted pointer to interact with an object instance associated with the target virtual function.
14. A computer-implemented method as described in claim 13, wherein the adjusted pointer comprises a this pointer associated with the target virtual function.
15. A computer-implemented method as described in claim 13, further comprising adjusting the pointer based on a memory offset value for the target virtual function.
16. A computer-implemented method as described in claim 15, wherein the memory offset value is determined from a TI_GET_THISADJUST constant value associated with the object instance.
17. A computer-implemented method as described in claim 13, wherein the replacement function is configured to use the readjusted pointer to access at least one of data or one or more functionalities of the object instance.
18. A computer-implemented method as described in claim 13, wherein a signature for the shim functionality matches a signature for the target virtual function.
19. A computer-implemented method as described in claim 18, wherein a calling convention for the shim functionality matches a calling convention for the target virtual function.
20. A computer-implemented method as described in claim 13, further comprising executing the replacement function using the readjusted pointer.