1. (canceled)
2. A data processing system adapted to distribute a process to a plurality of control units coupled to each other via a communication line to execute a computer program, comprising:
a process breaking unit which refers to a script code in which a content of data processing is written, and breaks the data processing into a plurality of units of processing; and
a distributor which assigns the units of processing to the plurality of the control units, respectively,
wherein each of the control units comprises:
a main controller which controls the control units in an integrated fashion; and
a plurality of sub-controllers which execute the processes assigned by the main controller; and
wherein the main controller assigns a part of a unit of processing to the plurality of the sub-controllers and each of the sub-controllers executes the assigned process.
3. The data processing system according to claim 2, wherein the main controller is configured to give to another main controller, an instruction to assign the part of the unit of processing to the sub-controllers under the control of the another main controller.
4. The data processing system according to claim 2, wherein the script code is written as a structured document file by use of a given tag set.
5. The data processing system according to claim 2, wherein:
the process assigned to the sub-controller posts to the main controller, an interface which controls the process from an external source; and
another sub-controller different from the sub-controller is configured to control the process executed by the sub-controller via the interface posted to the main controller.
6. The data processing system according to claim 5, further comprising a public interface information retaining unit which retains as public interface information, a list of interfaces accessible from another control unit, out of the interfaces for controlling the processes assigned to the sub-controllers from an external source,
wherein each of the processes assigned to the sub-controllers is configured to control the unit of processing executed on the another control unit, by referring to the public interface information.
7. The data processing system according to claim 6, further comprising an interface code retaining unit which retains an interface code in which a logic for controlling one or more units of processing is written, via the interface registered in the public interface information,
wherein each of the processes assigned to the sub-controller is configured to control the unit of processing in the another control unit, by executing the interface code.
8. (canceled)
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A semiconductor device comprising:
an integrator that repeats integrating a first reference voltage after integrating an analog signal;
a comparator that compares an output of the integrator and a second reference voltage;
a counter circuit that counts a first integration time determined to integrate the analog signal, and a second integration time until the output of the integrator reaches the second reference voltage from start of integration of the first reference voltage;
a calculation circuit that calculates a digital value of the analog signal based on the first and the second integration times;
a control circuit that performs control so that the analog signal is input to the integrator while the counter circuit counts the first integration time; and
an integration time update circuit that updates the first integration time counted by the counter circuit based on the second integration time counted by the counter circuit.
2. The semiconductor device according to claim 1, wherein
the control circuit controls an input to the integrator so that the integrator integrates an analog signal and a first reference voltage once within a predetermined conversion period, and
the integration time update circuit updates the first integration time in the next conversion period based on the second integration time in the current conversion period.
3. The semiconductor device according to claim 1, wherein
the control circuit controls an input to the integrator so that the integrator integrates an analog signal and a first reference voltage twice within a predetermined conversion period, and
the integration time update circuit updates the second the first integration time within the conversion period based on the first the second integration time within the conversion period.
4. The semiconductor device according to claim 2, wherein the integration time update circuit updates the first integration time based on a time length of a period obtained by excluding a predetermined margin period from the conversion period.
5. An analog-to-digital conversion method comprising:
integrating a first reference voltage after integrating an analog signal for a first integration time;
counting a second integration time until an integration result reaches a second reference voltage from start of the integration of the first reference voltage;
updating the first integration time based on the counted second integration time;
integrating the first reference voltage after integrating an analog signal for the updated first integration time;
counting the second integration time after integrating an analog signal for the updated first integration time; and
calculating a digital value of the analog signal based on the updated first integration time and the second integration time after integrating the analog signal for the updated first integration time.
6. The analog-to-digital conversion method according to claim 5, further comprising:
integrating an analog signal and a first reference voltage once within a predetermined conversion period; and
updating the first integration time in the next conversion period based on the second integration time in the current conversion period.
7. The analog-to-digital conversion method according to claim 5, further comprising:
integrating an analog signal and a first reference voltage twice within a predetermined conversion period; and
updating the second the first integration time within the conversion period based on the first the second integration time within the conversion period.
8. The analog-to-digital conversion method according to claim 6, further comprising updating the first integration time based on a time length of a period obtained by excluding a predetermined margin period from the conversion period.
9. An onboard system comprising:
a detection unit that detects a state of a vehicle;
a semiconductor device that calculates a digital value of an analog signal, which is a detection result obtained by the detection unit, and measures a state value of the vehicle;
a control unit that controls the vehicle based on the state value measured by the semiconductor device,
wherein the semiconductor device includes:
an integrator that repeats integrating a first reference voltage after integrating the analog signal from the detection unit;
a comparator that compares an output of the integrator and a second reference voltage;
a counter circuit that counts a first integration time determined to integrate the analog signal, and a second integration time until the output of the integrator reaches the second reference voltage from start of integration of the first reference voltage;
a calculation circuit that calculates a digital value of the analog signal based on the first and the second integration times;
a control circuit that performs control so that the analog signal is input to the integrator while the counter circuit counts the first integration time; and
an integration time update circuit that updates the first integration time counted by the counter circuit based on the second integration time counted by the counter circuit.
10. The onboard system according to claim 9, wherein
the detection unit detects a plurality of detection targets,
an analog signal of a sequentially selected one detection target is input to the semiconductor device, and
the semiconductor device sequentially calculates digital values of the analog signals of the plurality of detection targets.
11. The onboard system according to claim 9, wherein
the control circuit controls an input to the integrator so that the integrator integrates an analog signal and a first reference voltage once within a predetermined conversion period, and
the integration time update circuit updates the first integration time in the next conversion period based on the second integration time in the current conversion period.
12. The onboard system according to claim 9, wherein
the control circuit controls an input to the integrator so that the integrator integrates an analog signal and a first reference voltage twice within a predetermined conversion period, and
the integration time update circuit updates the second the first integration time within the conversion period based on the first the second integration time within the conversion period.
13. The onboard system according to claim 11, wherein the integration time update circuit updates the first integration time based on a time length of a period obtained by excluding a predetermined margin period from the conversion period.
14. A measurement method comprising:
detecting a state of a vehicle as an analog signal;
integrating a first reference voltage after integrating the detected analog signal for a first integration time;
counting a second integration time until an integration result reaches a second reference voltage from start of integration of the first reference voltage;
updating the first integration time based on the counted second integration time;
integrating the first reference voltage after integrating a newly detected analog signal for the updated first integration time;
counting the second integration time after integrating the newly detected analog signal; and
calculating a digital value of the newly detected analog signal based on the updated first integration time and the second integration time after integrating the analog signal, and measuring a state value of the vehicle.
15. The measurement method according to claim 14, further comprising:
integrating an analog signal and a first reference voltage once within a predetermined conversion period; and
updating the first integration time in the next conversion period based on the second integration time in the current conversion period.
16. The measurement method according to claim 14, further comprising:
integrating an analog signal and a first reference voltage twice within a predetermined conversion period; and
updating the second the first integration time within the conversion period based on the first the second integration time within the conversion period.
17. The measurement method according to claim 15, further comprising updating the first integration time based on a time length of a period obtained by excluding a predetermined margin period from the conversion period.