1. A coil for magnetic stimulation of a target area, the coil positionable on a body part, the coil comprising:
a first base portion comprising at least two substantially parallel spaced apart first base portion members having a first base portion spacing distance between said at least two base portion members, said first base portion members for providing electrical current flow in a direction tangential to the target area, said first base portion positioned at a first level with respect to the target area;
a second base portion comprising at least two substantially parallel spaced apart second base portion members having a second base portion spacing distance between said at least two base portion members, said second base portion members for providing electrical current flow in a direction tangential to the target area, said base portion positioned substantially in the first level with respect to the target area, said second base portion positioned at a distance from said first base portion; and
a contacting return portion for carrying returning current in a direction opposite the direction of current flow of said first base portion and said second base portion, said contacting return portion in electrical communication with said first and second base portion members and positioned substantially in the first level and spaced at a distance from the target area, wherein said first level is configured for placement on a skull, said contacting return portion further comprising at least two substantially parallel spaced apart return portion members having a return portion spacing distance between said at least two return portion members.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A controller configured to control the programming of a data word into a programmable memory device, wherein the programmable memory device comprises a pin for a pulse width control signal configured to digitally control a default programming time interval for writing the data word into the programmable memory device and a pin for a data signal indicative of the data word which is to be programmed; wherein the controller is configured to
set digital control signals for programming the data word into the programmable memory device, wherein the digital control signals comprise the data signal and the pulse width control signal;
subsequent to setting the digital control signals, increase a device supply voltage for the programmable memory device from a default operation level to a programming level;
subsequent to a programming time interval, decrease the device supply voltage from the programming level to the default operation level; and
subsequent to decreasing the device supply voltage, reset the pulse width control signal.
2. The controller of claim 1, wherein the controller is further configured to
subsequent to decreasing the device supply voltage, modify the one or more digital control signals.
3. The controller of claim 2, wherein the controller is configured to maintain the digital control signals unchanged during the programming time interval.
4. The controller of claim 2, wherein the controller is configured to select the programming time interval, such that an electrical power provided to the programmable memory device within the programming time interval is sufficiently high for programming the code word.
5. The controller of claim 2, wherein the controller is configured to
select the programming time interval to be longer than the default programming time interval;
set the pulse width control signal prior to increasing the device supply voltage.
6. The controller of claim 1, wherein the digital control signals comprise
a data signal indicative of the data word which is to be programmed; and
an address signal indicative of a location within the programmable memory device which is to be programmed.
7. An integrated circuit comprising
a programmable memory device;
a controller confiqured to control the programming of a data word into the programming memory device, wherein the controller is configured to;
set one or more digital control signals for programming the data word into the programmable memory device;
subsequent to setting the one or more digital control signals, increase a device supply voltage for the programmable memory device from a default operation level to a programming level; and
a device supply voltage provisioning circuit configured to provide a device supply voltage for the programmable memory device at different voltage levels, wherein
the device supply voltage provisioning circuit comprises a voltage regulator configured to derive the device supply voltage from an integrated circuit (IC) supply voltage subject to a reference voltage; and
the controller is configured to set the reference voltage to the programming level
wherein the voltage regulator
comprises an operational amplifier configured to compare at an input of the operational amplifier a feedback voltage which is indicative of the device supply voltage to the reference voltage; and
comprises a pass device controlled by an output of the operational amplifier, wherein the pass device is arranged to couple the IC supply voltage to a device supply voltage pin of the programmable memory device via a variable on-resistance of the pass device wherein the on-resistance of the pass device is controlled by the output of the operational amplifier.
8. The integrated circuit of claim 7, wherein the voltage regulator
is a capacitor-less voltage regulator.
9. The integrated circuit of claim 8, wherein
the voltage regulator comprises an interruption switch configured to decouple the IC supply voltage from the device supply voltage pin; and
the controller is configured to control the interruption switch to decouple the IC supply voltage from the device supply voltage pin to decrease the device supply voltage.
10. The integrated circuit of claim 7, wherein
the device supply voltage provisioning circuit comprises default operation voltage provisioning means configured to provide a device supply voltage at a default operation level; and
the default operation voltage provisioning means are configured to derive the device supply voltage at the default operation level from a logic voltage regulator of the IC.
11. An integrated circuit comprising
a programmable memory device;
a controller configured to control the programming of a data word into a programmable memory device, wherein the controller is configured to
set one or more digital control signals for programming the data word into the programmable memory device;
subsequent to setting the one or more digital control signals, increase a device supply voltage for the programmable memory device from a default operation level to a programming level; and
a device supply voltage provisioning circuit configured to provide a device supply voltage for the programmable memory device at different voltage levels;
wherein
the device supply voltage provisioning circuit comprises a voltage regulator configured to derive the device supply voltage from an integrated circuit (IC) supply voltage, subject to a reference voltage;
the controller is configured to set the reference voltage to the programming level;
the device supply voltage provisioning circuit comprises default operation voltage provisioning means configured to provide a device supply voltage at a default operation level;
the default operation voltage provisioning means are configured to derive the device supply voltage at the default operation level from a logic voltage regulator of the IC;
the default operation voltage provisioning means comprise a resistor for coupling a device supply voltage pin of the programmable memory device with the logic voltage regulator;
the default operation voltage provisioning means comprise a bypass switch in parallel to the resistor, configured to bypass the resistor; and
the controller is configured to control the bypass switch to bypass the resistor for providing the device supply voltage at default operation level.
12. The integrated circuit of claim 10, wherein the controller is configured to control the device supply voltage provisioning circuit such that
a device supply voltage at the default operation level is generated using the default operation voltage provisioning means; and
a device supply voltage at the programming level is generated using the voltage regulator.
13. A method for controlling programming of a data word into a programmable memory device, wherein the method comprises
setting one or more digital control signals for programming the data word into the programmable memory device, wherein the one or more digital control signals comprise a pulse width control signal to digitally control a default programming time interval for programming the data word, wherein the programming time interval is selected such that an electrical power provided to the programmable memory device within the programming time interval is sufficiently high for programming the data word;
subsequent to setting the one or more digital control signals, increasing a device supply voltage for the programmable memory device from a default operation level to a programming level;
subsequent to a programming time interval, decreasing the device supply voltage from the programming level to the default operation level; and
subsequent to decreasing the device supply voltage, modifying the one or more digital control signals.
14. The method for controlling programming of a data word into a programmable memory device of claim 13, wherein the controller
selects the programming time interval to be longer than the default programming time interval;
sets the pulse width control signal prior to increasing the device supply voltage.
15. The method for controlling programming of a data word into a programmable memory device of claim 13, wherein the digital control signals comprise
a data signal indicative of the code word which is to be programmed; and
an address signal indicative of a location within the programmable memory device which is to be programmed.