1. A compound of formula (I):
wherein:
A is O,
R is selected from the group consisting of (CH2)nNR1R2, wherein R1 and R2 are the same or different and are selected from the group consisting of hydrogen, C(\u2550NH)NH2 and C1-C6 alkyl,
n is an integer of from 2-5;
X1 is hydrogen
X2 is hydrogen;
X3 is halogen,
X4 is hydrogen; and
X5 is hydrogen
with the proviso that when n is 2, R1 and R2 are not both hydrogen or both ethyl and X3 chlorine,
and the pharmaceutically acceptable salts and optical isomers thereof.
2. The compound according to claim 1 wherein:
A is O;
R is (CH2)nNR1R2, and
X3 is halogen.
3. The compound according to claim 2 wherein R1R2 are selected from the group consisting of hydrogen, C1-6alkyl, and C(\u2550NH)NH2.
4. The compound according to claim 3 wherein X3 is selected from the group consisting of bromine and chlorine.
5. The compound according to claim 4 wherein the halogen is chlorine.
6. The compound according to claim 1 selected from the group consisting of:
6-Chloro-4-(3-aminopropoxy)-1-benzopyran-2-one,
6-Chloro-4-(3-methylamino-propoxy)-1-benzopyran-2-one,
4-(2-Amino-ethoxy)-6-chloro-1-benzopyran-2-one,
4-(3-Amino-propoxy)-6-bromo-1-benzopyran-2-one,
4-(3-Amino-propoxy)-6-fluoro-1-benzopyran-2-one,
6-Chloro-4-(3-dimethylamino-propoxy)-1-benzopyran-2-one,
N-3-(6-Chloro-2-oxo-2H-1-benzopyran-4-yloxy)-propyl-guanidine,
N-3-(6-Chloro-2-oxo-2H-1-benzopyran-4-yloxy)-propyl-acetamide,
4-(5-Amino-pentyloxy)-6-chloro- 1-benzopyran-2-one.
7. A pharmaceutical composition comprising an effective amount of a compound according to claim 6 and a pharmaceutical acceptable carrier.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. An information processing system comprising:
a first processor having a first local memory;
a second processor having a second local memory;
a third processor having a third local memory;
a shared memory shared by the first to third processors, the shared memory and the first to third local memories being mapped in a real address space;
means for mapping one of the second local memory and the third local memory in part of an effective address space of a first thread executed by the first processor, said one of the second local memory and the third local memory being the local memory of a corresponding one of the second processor and the third processor, which executes a second thread interacting with the first thread, the second thread holding thread context including contents of said one of the second local memory and the third local memory, the first thread accessing said one of the second local memory and the third local memory via said part of the effective address space of the first thread to interact with the second thread; and
means for mapping the other of the second local memory and the third local memory in said part of the effective address space of the first thread instead of said one of the second local memory and the third local memory when a processor that executes the second thread is changed from said one of the second processor and the third processor to the other of the second processor and the third processor, the first thread accessing the other of the second local memory and the third local memory via said part of the effective address space of the first thread to interact with the second thread.
2. The information processing system according to claim 1, further comprising:
means for storing contents of said one of the second local memory and the third local memory in a memory area on the shared memory when the second thread stops to run; and
means for mapping the memory area on the shared memory in said part of the effective address space of the first thread instead of said one of the second local memory and the third local memory, the first thread accessing the memory area on the shared memory via said part of the effective address space of the first thread to interact with the second thread.
3. The information processing system according to claim 2, further comprising:
means for restoring contents of the memory area on the shared memory to said one of the second local memory and the third local memory when the second thread is resumed by said one of the second processor and the third processor; and
means for mapping said one of the second local memory and the third local memory in said part of the effective address space of the first thread instead of the memory area on the shared memory.
4. The information processing system according to claim 2, further comprising:
means for restoring contents of the memory area on the shared memory to the other of the second local memory and the third local memory when the second thread is resumed by the other of the second processor and the third processor; and
means for mapping the other of the second local memory and the third local memory in said part of the effective address space of the first thread instead of the memory area on the shared memory.
5. A method of managing a local memory used for communication between a plurality of threads, the threads being executed by an information processing system including a first processor having a first local memory, a second processor having a second local memory, a third processor having a third local memory, and a shared memory shared by the first to third processors, the shared memory and the first to third local memories being mapped in a real address space, the method comprising:
mapping one of the second local memory and the third local memory in part of an effective address space of a first thread executed by the first processor, said one of the second local memory and the third local memory being the local memory of a corresponding one of the second processor and the third processor, which executes a second thread interacting with the first thread, the second thread holding thread context including contents of said one of the second local memory and the third local memory, the first thread accessing said one of the second local memory and the third local memory via said part of the effective address space of the first thread to interact with the second thread; and
mapping the other of the second local memory and the third local memory in said part of the effective address space of the first thread instead of said one of the second local memory and the third local memory when a processor that executes the second thread is changed from said one of the second processor and the third processor to the other of the second processor and the third processor, the first thread accessing the other of the second local memory and the third local memory via said part of the effective address space of the first thread to interact with the second thread.
6. The method according to claim 5, further comprising:
storing contents of said one of the second local memory and the third local memory in a memory area on the shared memory, when the second thread stops to run; and
mapping the memory area on the shared memory in said part of the effective address space of the first thread instead of said one of the second local memory and the third local memory, the first thread accessing the memory area on the shared memory via said part of the effective address space of the first thread to interact with the second thread.
7. The method according to claim 6, further comprising:
restoring contents of the memory area on the shared memory to said one of the second local memory and the third local memory, when the second thread is resumed by said one of the second processor and the third processor; and
mapping said one of the second local memory and the third local memory in said part of the effective address space of the first thread instead of the memory area on the shared memory.
8. The method according to claim 6, further comprising:
restoring contents of the memory area on the shared memory to the other of the second local memory and the third local memory, when the second thread is resumed by the other of the second processor and the third processor; and
mapping the other of the second local memory and the third local memory in said part of the effective address space of the first thread instead of the memory area on the shared memory.
9. A program stored in computer-readable media, which causes a computer to manage a local memory used for communication between a plurality of threads, the computer including a first processor having a first local memory, a second processor having a second local memory, a third processor having a third local memory, and a shared memory shared by the first to third processors, the shared memory and the first to third local memories being mapped in a real address space, the program comprising:
causing the computer to map one of the second local memory and the third local memory in part of an effective address space of a first thread executed by the first processor, said one of the second local memory and the third local memory being the local memory of a corresponding one of the second processor and the third processor, which executes a second thread interacting with the first thread, the second thread holding thread context including contents of said one of the second local memory and the third local memory, the first thread accessing said one of the second local memory and the third local memory via said part of the effective address space of the first thread to interact with the second thread; and
causing the computer to map the other of the second local memory and the third local memory in said part of the effective address space of the first thread instead of said one of the second local memory and the third local memory when a processor that executes the second thread is changed from said one of the second processor and the third processor to the other of the second processor and the third processor, the first thread accessing the other of the second local memory and the third local memory via said part of the effective address space of the first thread to interact with the second thread.
10. The program according to claim 9, further comprising:
causing the computer to store contents of said one of the second local memory and the third local memory in a memory area on the shared memory, when the second thread stops to run; and
causing the computer to map the memory area on the shared memory in said part of the effective address space of the first thread instead of said one of the second local memory and the third local memory, the first thread accessing the memory area on the shared memory via said part of the effective address space of the first thread to interact with the second thread.
11. The program according to claim 9, further comprising:
causing the computer to restore contents of a memory area on the shared memory to said one of the second local memory and the third local memory, when the second thread is resumed by said one of the second processor and the third processor; and
causing the computer to map said one of the second local memory and the third local memory in said part of the effective address space of the first thread instead of the memory area on the shared memory.
12. The program according to claim 9, further comprising:
causing the computer to restore contents of a memory area on the shared memory to the other of the second local memory and the third local memory, when the second thread is resumed by the other of the second processor and the third processor; and
causing the computer to map the other of the second local memory and the third local memory in said part of the effective address space of the first thread instead of the memory area on the shared memory.