1. A sheet processing apparatus comprising:
a pair of planar members configured to have a plane surface respectively to hold a booklet made of a folded sheet therebetween, the plane surfaces being substantially parallel to each other; and
a pressing member configured to enter between the plane surfaces to press a folded spine of the booklet, and to be moved along a direction of a length of the folded spine while pressing the folded spine.
2. The sheet processing apparatus according to claim 1, wherein the plane surfaces regulate the deformation, in a thickness direction of the booklet, of the folded spine by contacting the folded spine for preventing the thickness of the folded spine from exceeding the thickness of the booklet.
3. The sheet processing apparatus according to claim 1, wherein the pressing member presses the folded spine to deform the folded spine into a square shape, and a pressing position where the square shape is formed along the direction of the length of the folded spine is within a region defined by the plane surfaces.
4. The sheet processing apparatus according to claim 1, wherein the pressing member is a roller that rotates and moves along the direction of the length of the folded spine.
5. The sheet processing apparatus according to claim 1, wherein the folded spine is positioned in the region defined by the plane surfaces, and the pressing member enters the region to press the folded spine.
6. The sheet processing apparatus according to claim 1, further comprising:
a positioning member against which the folded spine of the booklet is abutted to position the booklet,
wherein the pair of planar members holds the booklet positioned by the positioning member, and the pressing member presses the folded spine of the booklet held by the holding unit.
7. The sheet processing apparatus according to claim 1, further comprising:
a folding unit configured to fold the sheet,
wherein the pressing member presses the folded spine of the booklet made of the sheet folded by the folding unit.
8. An image forming apparatus comprising:
an image forming portion that forms an image on a sheet; and
a sheet processing apparatus that processes the sheet having the image formed thereon,
wherein the sheet processing apparatus includes:
a pair of planar members configured to have a plane surface respectively to hold a booklet made of a folded sheet therebetween, the plane surfaces being substantially parallel to each other; and
a pressing member configured to enter between the plane surfaces to press a folded spine of the booklet, and to be moved along a direction of a length of the folded spine while pressing the folded spine.
9. The image forming apparatus according to claim 8, wherein the plane surfaces regulate the deformation, in a thickness direction of the booklet, of the folded spine by contacting the folded spine for preventing the thickness of the folded spine from exceeding the thickness of the booklet.
10. The image forming apparatus according to claim 8, wherein the pressing member presses the folded spine to deform the folded spine into a square shape, and a pressing position where the square shape is formed along the direction of the length of the folded spine is within a region defined by the plane surfaces.
11. The image forming apparatus according to claim 8, wherein the pressing member is a roller that rotates and moves along the direction of the length of the folded spine.
12. The image forming apparatus according to claim 8, further comprising:
a positioning member against which the folded spine of the booklet is abutted to position the booklet,
wherein the pair of planar members holds the booklet positioned by the positioning member, and the pressing member presses the folded spine of the booklet held by the holding unit.
13. The image forming apparatus according to claim 8, further comprising:
a folding unit configured to fold the sheet,
wherein the pressing member presses the folded spine of the booklet made of the sheet folded by the folding unit.
14. A image forming apparatus according to claim 8, wherein the folded spine is positioned in the region defined by the plane surfaces, and the pressing member enters the region to press the folded spine.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A semiconductor device comprising:
a power source terminal to which a first power source voltage and a second power source voltage higher than the first power source voltage are supplied;
a grounding terminal to which a grounding voltage is supplied;
a first power source line coupled to the power source terminal;
a logic semiconductor chip which is coupled to the first power source line and the grounding terminal, operates on any of the first power source voltage and the second power source voltage, and performs a logic process on input data;
a power supply interrupting semiconductor chip which is coupled to the first power source line and the grounding terminal, when the first power source voltage is supplied, outputs the voltage to a second power source line and, when the second power source voltage is supplied, stops supplying the voltage to the second power source line;
a nonvolatile semiconductor storage chip which is coupled to the second power source line and the grounding terminal and operates on supply of the voltage; and
a controller chip which is coupled to the second power source line and the grounding terminal, has a first terminal to which a signal is input and, on reception of the input signal, inputsoutputs data tofrom the nonvolatile semiconductor storage chip.
2. A semiconductor device comprising:
a power source terminal to which a first power source voltage and a second power source voltage higher than the first power source voltage are supplied;
a grounding terminal to which a grounding voltage is supplied;
a first power source line coupled to the power source terminal;
a logic semiconductor chip which is coupled to the first power source line and the grounding terminal, operates on any of the first power source voltage and the second power source voltage, and performs a logic process on input data;
a power supply interrupting semiconductor chip which is coupled to the first power source line and the grounding terminal, when the first power source voltage is supplied, outputs the voltage to a second power source line and, when the second power source voltage is supplied, stops supplying the voltage to the second power source line;
a nonvolatile semiconductor storage chip which is coupled to the second power source line and the first power source line and operates on supply of the voltage; and
a controller chip which is coupled to the second power source line and the first power source line, has a first terminal to which a signal is input and, on reception of the input signal, inputsoutputs data fromto the nonvolatile semiconductor storage chip.
3. The semiconductor device according to claim 1,
wherein area of the nonvolatile semiconductor storage chip is larger than that of the logic semiconductor chip, the power supply interrupting semiconductor chip, and the controller chip, and
wherein the logic semiconductor chip, the power supply interrupting semiconductor chip, and the controller chip are mounted over the nonvolatile semiconductor storage chip.
4. The semiconductor device according to claim 3,
wherein the nonvolatile semiconductor storage chip has a rectangular shape,
wherein pads are arranged along one of four sides of the rectangular shape,
wherein a plurality of nonvolatile semiconductor storage chips are stacked so that the pads of the nonvolatile semiconductor chips are aligned in the nonvolatile semiconductor storage chips, and
wherein the controller chip is mounted over the uppermost nonvolatile semiconductor storage chip in the stacked chips along a side different from the side along which the pads of the nonvolatile semiconductor storage chip are arranged in a position closer to the different side.
5. A semiconductor device comprising:
a power source terminal to which a first power source voltage and a second power source voltage higher than the first power source voltage are supplied;
a grounding terminal to which a grounding voltage is supplied;
a first power source line coupled to the power source terminal;
a logic semiconductor chip which has a power supply interrupting circuit, when the first power source voltage is supplied, for outputting the voltage to a second power source line and, when the second power source voltage is supplied, stops supplying the voltage to the second power source line, wherein the logic semiconductor chip is coupled to the first power source line and the grounding terminal, operates on any of the first power source voltage and the second power source voltage, and performs a logic process on input data;
a nonvolatile semiconductor storage chip which is coupled to the second power source line and the grounding terminal and operates on supply of the voltage; and
a controller chip which is coupled to the second power source line and the grounding terminal, has a first terminal to which a signal is input and, on reception of the input signal, inputsoutputs data fromto the nonvolatile semiconductor storage chip.
6. A semiconductor device comprising:
a power source terminal to which a power source voltage is supplied;
a grounding terminal to which a grounding voltage is supplied;
a first power source line coupled to the power source terminal;
a first semiconductor chip which is coupled to the first power source line and the grounding terminal;
a power source voltage supply control circuit which is coupled to the first power source line and the grounding terminal and controls whether or not voltage is output from the first power source line to a second power source line in accordance with a signal input from the outside; and
a second semiconductor chip which is coupled to the second power source line and the grounding terminal and operates on reception of the voltage supplied.
7. The semiconductor device according to claim 6, further comprising a third semiconductor chip different from the first and second semiconductor chips and having the power source voltage supply control circuit,
wherein the signal input from the outside is supplied to the first semiconductor chip, and
wherein a signal responding to the signal input from the outside supplied from the first semiconductor chip is supplied to the third semiconductor chip, and the power source voltage supply control circuit controls a voltage output.
8. The semiconductor device according to claim 6, wherein the second semiconductor chip has a nonvolatile semiconductor storage chip capable of retaining data even when supply of the power source voltage stops.
9. The semiconductor device according to claim 6, wherein the second semiconductor chip has an internal step-down circuit for stepping down the power source voltage supplied from the outside and supplying the resultant voltage to the inside.
10. A semiconductor device comprising:
a first semiconductor chip which is coupled to a power source terminal to which a first power source voltage is supplied and a grounding terminal to which a grounding voltage is supplied, and outputs a control signal in accordance with an input signal;
a power supply interrupting semiconductor chip coupled to the power source terminal and the grounding terminal and supplying or stopping a second power source voltage to a power source line in accordance with output of the control signal;
a nonvolatile semiconductor storage chip coupled to the power source line and the grounding terminal, operates on receipt of the second power source voltage, and inputsoutputs data in response to a signal input from a first terminal;
a controller chip for controlling the nonvolatile semiconductor storage chip; and
a wiring board having a first surface over which the first semiconductor chip, the power supply interrupting semiconductor chip, the nonvolatile semiconductor storage chip, or the controller chip is arranged, and a second surface having an external terminal for inputtingoutputting a signal fromto a second terminal provided for the first semiconductor chip and the first terminal of the controller chip,
wherein the wiring board, the first semiconductor chip, the power supply interrupting semiconductor chip, and the controller chip have pads to be coupled to each other via wires,
wherein the nonvolatile semiconductor storage chip has a rectangular shape and is provided over the wiring board,
wherein area of the first semiconductor chip is smaller than that of the nonvolatile semiconductor storage chip,
wherein the first semiconductor chip is arranged over the nonvolatile semiconductor storage chip,
wherein pads of the first semiconductor chip are provided along a first long side of the rectangular shape of the nonvolatile semiconductor storage chip and coupled to pads of the wiring board provided along the first long side via wires,
wherein area of the controller chip is smaller than that of the nonvolatile semiconductor storage chip,
wherein the controller chip is arranged over the nonvolatile semiconductor storage chip,
wherein pads of the controller chip are provided along a first short side or a second long side of the rectangular shape of the nonvolatile semiconductor storage chip and coupled to pads of the wiring board provided along the first short side or the second long side via wires,
wherein area of the power supply interrupting semiconductor chip is smaller than that of the nonvolatile semiconductor storage chip,
wherein the power supply interrupting semiconductor chip is arranged over the nonvolatile semiconductor storage chip, and
wherein pads of the power supply interrupting semiconductor chip are provided along the first long side of the rectangular shape of the nonvolatile semiconductor storage chip and coupled to pads over the wiring board provided along the first long side via wires.
11. The semiconductor device according to claim 10,
wherein the power supply interrupting semiconductor chip is provided between the pads of the wiring board provided along the first long side of the rectangular shape of the nonvolatile semiconductor storage chip and the first semiconductor chip,
wherein each of the first semiconductor chip and the power supply interrupting semiconductor chip has a rectangular shape, and
wherein one side of the rectangular shape of the first semiconductor chip facing the first long side of the rectangular shape of the nonvolatile semiconductor storage chip is longer than one side of the power supply interrupting semiconductor chip facing the first long side of the nonvolatile semiconductor storage chip.