1. A computer-readable storage medium storing a set of instructions executed by a data processing apparatus that is connected with at least one device, the instructions causing the data processing apparatus to provide functional units including:
a device determining unit for determining a candidate device from among at least one device, the candidate device possessing a first function that is used for performing a first process;
a first registering unit for registering the candidate device as a first device to be used for performing the first process;
a second registering unit for registering the candidate device as a second device to be used for performing the second process, the second process being different from the first process;
an accepting unit for accepting an instruction to perform one of the first process and the second process from a user; and
a controlling unit for controlling the first device to perform the first process when the accepting unit accepts the instruction to perform the first process and control the second device to perform the second process when the accepting unit accepts the instruction to perform the second process.
2. The computer-readable storage medium according to claim 1, wherein the first registering unit registers a plurality of candidate devices as a plurality of first devices,
wherein the functional units further include:
a first executing device setting unit for setting, when the first registering unit registers a new candidate device as the first device, the new candidate device as a first executing device to be exclusively used for executing the first function,
wherein the controlling unit controls the first executing device to perform the first process by executing the first function when the accepting unit accepts the instruction to perform the first process.
3. The computer-readable storage medium according to claim 2, wherein the functional units further include:
a judging unit for judging, when the device determining unit determines a new candidate device, whether or not the second registering unit has registered another device as the second device; and
a second executing device setting unit for setting the new candidate device as a second executing device to be exclusively used for executing the second function when the judging unit judges that the second registering unit has not registered another device as the second device,
wherein the controlling unit controls the new candidate device to perform the second process by executing the second function when the accepting unit accepts the instruction to perform the second process.
4. The computer-readable storage medium according to claim 1, wherein the first registering unit registers a plurality of candidate devices as a plurality of first devices;
wherein the functional units further include:
a selecting unit for enabling a user to select one of the plurality of first devices;
a first executing device setting unit for setting the one of the plurality of first devices as a first executing device to be exclusively used for executing the first function;
a judging unit for judging whether or not the second registering unit has registered the one of the plurality of first devices as the second device; and
a second executing device setting unit for setting the one of the plurality of first devices as a second executing device to be used for exclusively executing the second function when the judging unit judges that the second registering unit has registered the one of the plurality of first devices as the second device,
wherein the controlling unit controls the first executing device to perform the first process by executing the first function when the accepting unit accepts the instruction to perform the first process,
wherein the controlling unit controls the second executing device to perform the second process by executing the second function when the accepting unit accepts the instruction to perform the second process.
5. The computer-readable storage medium according to claim 1, wherein the data processing apparatus is connected with a plurality of devices whose models include a plurality of models.
6. The computer-readable storage medium according to claim 1, wherein the functional units further include a judging unit for judging whether or not the candidate device possesses a second function that is used for performing the second process,
wherein the second registering unit registers the candidate device as the second device when the judging unit judges that the candidate device possesses the second function and does not register the candidate device as the second device when the judging unit judges that the candidate device does not possess the second function.
7. The computer-readable storage medium according to claim 1, wherein the functional units further include:
a first judging unit for judging whether or not the candidate device possesses a second function that is used for performing the second process; and
a second judging unit for judging whether or not the second function of the candidate device is controllable by the data processing apparatus when the first judging unit judges that the candidate device possesses the second function,
wherein the second registering unit registers the candidate device as the second device when the second judging unit judges that the candidate device is controllable.
8. The computer-readable storage medium according to claim 1, wherein the data processing apparatus is connected with a plurality of devices possessing the first function,
wherein the device determining unit enables a user to determine, as the first device, the candidate device from among the plurality of devices possessing the first function,
wherein when the candidate device further possesses a plurality of functions different from the first function and including the second function, the second registering unit registers the candidate device as a device to be used for executing each of the plurality of functions.
9. The computer-readable storage medium according to claim 1, wherein the first process and the second process are a printing process and a scanning process, respectively.
10. The computer-readable storage medium according to claim 1, wherein the functional units further include:
a storage unit for storing identification data for the first device in correlation with the first process and storing identification data for the second device in correlation with the second process; and
a transmitting unit for transmitting, when the accepting unit accepts the instruction to perform the first process, a request to perform the first process to the first device whose identification data is stored in the storage unit;
wherein the first registering unit registers the candidate device as the first device by storing identification data for the candidate device in correlation with the first process in the storage unit,
wherein the second registering unit registers, when no identification data correlated with the second process is stored in the storage unit, the candidate device as the second device by storing the identification data for the candidate device in correlation with the second process in the storage unit.
11. The computer-readable storage medium according to claim 10, wherein the functional units further include:
an acquiring unit for acquiring device information relating to a function of the candidate device; and
a judging unit for judging whether or not the candidate device is suitable for the second process based on the device information, and
wherein the second registering unit stores the identification data for the candidate device in correlation with the second process in the storage unit when the judging unit judges that the candidate device is suitable for the second process.
12. The computer-readable storage medium according to claim 11, wherein when the first function is capable of performing the second process, the judging unit does not judge whether or not the candidate device is suitable for the second process and the second registering unit stores the identification data for the candidate device in correlation with the second process.
13. The computer-readable storage medium according to claim 10, wherein the first process is a process to print first type of data,
wherein the second process is a process to print second type of data, the second type being different from the first type.
14. The computer-readable storage medium according to claim 13, wherein the first type of data and the second type data are photo print data and Web print data, respectively.
15. The computer-readable storage medium according to claim 10, wherein the storage unit further stores settings data in correlation with the first process;
wherein the transmitting unit transmits, when the accepting unit accepts the instruction to perform the first process, a request to perform the first process based on the settings data that is stored in correlation with the first process to the first device whose identification data is stored in correlation with the first process.
16. The computer-readable storage medium according to claim 15, wherein the accepting unit further accepts the settings data from the user,
wherein when the accepting unit accepts the settings data, the storage unit further stores the settings data in correlation with the first process and the identification data of the first device.
17. A data processing apparatus comprising:
a memory;
an accepting unit for accepting an instruction to perform one of a first process and a second process from a user, the second process being different from the first process;
a controller that is configured to:
determine a candidate device from among at least one device, the candidate device possessing a first function that is used for performing the first process;
register the candidate device as a first device to be used for performing the first process;
register the candidate device as a second device to be used for performing the second process, the second process being different from the first process; and
control the first device to perform the first process when the accepting unit accepts the instruction to perform the first process and control the second device to perform the second process when the accepting unit accepts the instruction to perform the second process.
18. The data processing apparatus according to claim 17, wherein the controller is further configured to:
judge whether or not the candidate device possesses a second function that is used for performing the second process; and
judge whether or not the second function of the candidate device is controllable by the data processing apparatus when a judgment that the candidate device possesses the second function is made,
wherein the controller registers the candidate device as the second device when a judgment that the candidate device is controllable is made.
19. The data processing apparatus according to claim 17, wherein the first process and the second process are a printing process and a scanning process, respectively.
20. The data processing apparatus according to claim 17, wherein the memory stores identification data for the first device in correlation with the first process and stores identification data for the second device in correlation with the second process,
wherein the controller is further configured to transmit, when the accepting unit accepts the instruction to perform the first process, a request to perform the first process to the first device whose identification data is stored in the memory;
wherein the controller registers the candidate device as the first device by storing identification data for the candidate device in correlation with the first process in the memory,
wherein the controller registers, when no identification data correlated with the second process is stored in the memory, the candidate device as the second device by storing the identification data for the candidate device in correlation with the second process in the memory.
21. The data processing apparatus according to claim 20, wherein the first process is a process to print photo print data, and
wherein the second process is a process to print Web print data.
22. A method executed by a data processing apparatus, the method comprising:
determining a candidate device from among at least one device, the candidate device possessing a first function that is used for performing a first process;
registering the candidate device as a first device to be used for performing the first process;
registering the candidate device as a second device to be used for performing the second process, the second process being different from the first process;
accepting an instruction to perform one of the first process and the second process from a user; and
controlling the first device to perform the first process when the instruction to perform the first process is accepted and controlling the second device to perform the second process when the instruction to perform the second process is accepted.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
What is claimed is:
1. Circuitry for driving a motor by PWM (Pulse Width Modulation) control, comprising:
switching means respectively associated with drive coils, which are included in the motor and assigned to a particular phase each;
frequency oscillating means for generating a triangular wave;
first comparing means for generating a pulse sequence by comparing the triangular wave and a voltage for PWM oscillation frequency modulation;
position sensing means for sensing angular positions of the motor;
pulse generating means for counting a preselected number of pulses, which are included in the pulse sequence, by using each of positive-going edges and negative-going edges of position signals output from said position sensing means as a trigger to thereby generate pulse signals;
voltage adjusting means for converting a voltage for duty modulation to a plurality of voltage levels;
voltage selecting means for selecting one of the plurality of voltage levels in accordance with the pulse signals output from said pulse generating means, and outputting a voltage level selected as a duty modulation voltage;
second comparing means for outputting a first duty signal by comparing the voltage for duty modulation and the triangular wave;
third comparing means for outputting a second duty signal by comparing the duty modulation voltage output from said voltage adjusting means and the triangular wave; and
exciting pulse generating means for generating, based on the position signals output from said position sensing means and the first and second duty signals, a gate signal for switching control for a preselected period of time at each time of phase switching, wherein said gate signal includes a signal for reducing noise of the motor.
2. The circuitry as claimed in claim 1, wherein said voltage adjusting means divides the voltage for duty modulation with a plurality of resistors to thereby output the voltage levels, and said voltage selecting means selects one of the voltage levels in accordance with the pulse signals.
3. The circuitry as claimed in claim 2, wherein said frequency oscillating means generates the triangular wave on the basis of charging and discharging of a capacitor.
4. The circuitry as claimed in claim 3, wherein the capacitor has a variable capacitance.
5. The circuitry as claimed in claim 4, wherein the capacitor is replaceable.
6. The circuitry as claimed in claim 5, wherein the preselected number of pulses to be counted by said pulse generating means is variable.
7. The circuitry as claimed in claim 6, wherein the capacitor is replaced or the preselected number of pulses is varied when the motor is replaced.
8. The circuitry as claimed in claim 7, wherein said switching means comprises a plurality of MOSFETs (Metal Oxide Semiconductor Field Effect Transistors).
9. The circuitry as claimed in claim 8, wherein said switching means comprises bipolar transistors.
10. The circuitry as claimed in claim 9, wherein said exciting pulse generating means generates the gate signal when said switching means should be turned off.
11. The circuitry as claimed in claim 10, wherein said exciting pulse generating means generates the gate signal when said switching means should be turned on.
12. The circuitry as claimed in claim 11, wherein said exciting pulse generating means generates the gate signal when said switching means should be turned off and when said switching means should be turned on.
13. The circuitry as claimed in claim 12, wherein the plurality of voltage levels to be selected by said voltage selecting means and the pulse signals to be output from said pulse generating means correspond one-to-one to each other.
14. The circuitry as claimed in claim 13, wherein the plurality of voltage levels to be selected by said voltage selecting means and the pulse signals to be output from said pulse generating means have a 1:n correspondence to each other.
15. The circuitry as claimed in claim 1, wherein said frequency oscillating means generates the triangular wave on the basis of charging and discharging of a capacitor.
16. The circuitry as claimed in claim 15, wherein the capacitor has a variable capacitance.
17. The circuitry as claimed in claim 16, wherein the capacitor is replaceable.
18. The circuitry as claimed in claim 17, wherein the preselected number of pulses to be counted by said pulse generating means is variable.
19. The circuitry as claimed in claim 18, wherein the capacitor is replaced or the preselected number of pulses is varied when the motor is replaced.
20. The circuitry as claimed in claim 19, wherein said switching means comprises a plurality of MOSFETs.
21. The circuitry as claimed in claim 20, wherein said switching means comprises bipolar transistors.
22. The circuitry as claimed in claim 21, wherein said exciting pulse generating means generates the gate signal when said switching means should be turned off.
23. The circuitry as claimed in claim 22, wherein said exciting pulse generating means generates the gate signal when said switching means should be turned on.
24. The circuitry as claimed in claim 23, wherein said exciting pulse generating means generates the gate signal when said switching means should be turned off and when said switching means should be turned on.
25. The circuitry as claimed in claim 24, wherein the plurality of voltage levels to be selected by said voltage selecting means and the pulse signals to be output from said pulse generating means correspond one-to-one to each other.
26. The circuitry as claimed in claim 25, wherein the plurality of voltage levels to be selected by said voltage selecting means and the pulse signals to be output from said pulse generating means have a 1:n correspondence to each other.
27. The circuitry as claimed in claim 1, wherein the capacitor has a variable capacitance.
28. The circuitry as claimed in claim 27, wherein the capacitor is replaceable.
29. The circuitry as claimed in claim 28, wherein the preselected number of pulses to be counted by said pulse generating means is variable.
30. The circuitry as claimed in claim 29, wherein the capacitor is replaced or the preselected number of pulses is varied when the motor is replaced.
31. The circuitry as claimed in claim 30, wherein said switching means comprises a plurality of MOSFETs.
32. The circuitry as claimed in claim 31, wherein said switching means comprises bipolar transistors.
33. The circuitry as claimed in claim 32, wherein said exciting pulse generating means generates the gate signal when said switching means should be turned off.
34. The circuitry as claimed in claim 33, wherein said exciting pulse generating means generates the gate signal when said switching means should be turned on.
35. The circuitry as claimed in claim 34, wherein said exciting pulse generating means generates the gate signal when said switching means should be turned off and when said switching means should be turned on.
36. The circuitry as claimed in claim 35, wherein the plurality of voltage levels to be selected by said voltage selecting means and the pulse signals to be output from said pulse generating means correspond one-to-one to each other.
37. The circuitry as claimed in claim 36, wherein the plurality of voltage levels to be selected by said voltage selecting means and the pulse signals to be output from said pulse generating means have a 1:n correspondence to each other.
38. The circuitry as claimed in claim 1, wherein the capacitor is replaceable.
39. The circuitry as claimed in claim 38, wherein the preselected number of pulses to be counted by said pulse generating means is variable.
40. The circuitry as claimed in claim 39, wherein the capacitor is replaced or the preselected number of pulses is varied when the motor is replaced.
41. The circuitry as claimed in claim 40, wherein said switching means comprises a plurality of MOSFETs.
42. The circuitry as claimed in claim 41, wherein said switching means comprises bipolar transistors.
43. The circuitry as claimed in claim 42, wherein said exciting pulse generating means generates the gate signal when said switching means should be turned off.
44. The circuitry as claimed in claim 43, wherein said exciting pulse generating means generates the gate signal when said switching means should be turned on.
45. The circuitry as claimed in claim 44, wherein said exciting pulse generating means generates the gate signal when said switching means should be turned off and when said switching means should be turned on.
46. The circuitry as claimed in claim 45, wherein the plurality of voltage levels to be selected by said voltage selecting means and the pulse signals to be output from said pulse generating means correspond one-to-one to each other.
47. The circuitry as claimed in claim 46, wherein the plurality of voltage levels to be selected by said voltage selecting means and the pulse signals to be output from said pulse generating means have a 1:n correspondence to each other.
48. The circuitry as claimed in claim 1, wherein the preselected number of pulses to be counted by said pulse generating means is variable.
49. The circuitry as claimed in claim 48, wherein the capacitor is replaced or the preselected number of pulses is varied when the motor is replaced.
50. The circuitry as claimed in claim 49, wherein said switching means comprises a plurality of MOSFETs.
51. The circuitry as claimed in claim 50, wherein said switching means comprises bipolar transistors.
52. The circuitry as claimed in claim 51, wherein said exciting pulse generating means generates the gate signal when said switching means should be turned off.
53. The circuitry as claimed in claim 52, wherein said exciting pulse generating means generates the gate signal when said switching means should be turned on.
54. The circuitry as claimed in claim 53, wherein said exciting pulse generating means generates the gate signal when said switching means should be turned off and when said switching means should be turned on.
55. The circuitry as claimed in claim 54, wherein the plurality of voltage levels to be selected by said voltage selecting means and the pulse signals to be output from said pulse generating means correspond one-to-one to each other.
56. The circuitry as claimed in claim 55, wherein the plurality of voltage levels to be selected by said voltage selecting means and the pulse signals to be output from said pulse generating means have a 1:n correspondence to each other.
57. The circuitry as claimed in claim 1, wherein said switching means comprises a plurality of MOSFETs.
58. The circuitry as claimed in claim 1, wherein said switching means comprises bipolar transistors.
59. The circuitry as claimed in claim 58, wherein said exciting pulse generating means generates the gate signal when said switching means should be turned off.
60. The circuitry as claimed in claim 59, wherein said exciting pulse generating means generates the gate signal when said switching means should be turned on.
61. The circuitry as claimed in claim 60, wherein said exciting pulse generating means generates the gate signal when said switching means is turned off and when said switching means is turned on.
62. The circuitry as claimed in claim 61, wherein the plurality of voltage levels to be selected by said voltage selecting means and the pulse signals to be output from said pulse generating means correspond one-to-one to each other.
63. The circuitry as claimed in claim 62, wherein the plurality of voltage levels to be selected by said voltage selecting means and the pulse signals to be output from said pulse generating means have a 1:n correspondence to each other.
64. The circuitry as claimed in claim 1, wherein said exciting pulse generating means generates the gate signal when said switching means should be turned off.
65. The circuitry as claimed in claim 1, wherein said exciting pulse generating means generates the gate signal when said switching means should be turned on.
66. The circuitry as claimed in claim 1, wherein said exciting pulse generating means generates the gate signal when said switching means should be turned off and when said switching means should be turned on.
67. The circuitry as claimed in claim 66, wherein the plurality of voltage levels to be selected by said voltage selecting means and the pulse signals to be output from said pulse generating means correspond one-to-one to each other.
68. The circuitry as claimed in claim 66, wherein the plurality of voltage levels to be selected by said voltage selecting means and the pulse signals to be output from said pulse generating means have a 1:n correspondence to each other.
69. The circuitry as claimed in claim 1, wherein the plurality of voltage levels to be selected by said voltage selecting means and the pulse signals to be output from said pulse generating means correspond one-to-one to each other.
70. The circuitry as claimed in claim 1, wherein the plurality of voltage levels to be selected by said voltage selecting means and the pulse signals to be output from said pulse generating means have a 1:n correspondence to each other.
71. A method of controlling rotation of a motor by executing PWM control over switching devices associated with drive coils each of which is assigned to a particular phase of said motor, said method comprising the steps of:
(a) causing a frequency oscillator to generate a triangular wave and comparing said triangular wave and a voltage for PWM oscillation frequency modulation to thereby output a pulse sequence;
(b) counting a preselected number of pulses included in the pulse sequence by using each of negative-going edges and positive-going edges of position signals output from position sensing means, which is responsive to angular positions of the motor, as a trigger to thereby output pulse signals;
(c) converting a voltage for duty modulation to a plurality of voltage levels;
(d) selecting one of the plurality of voltage levels in accordance with the pulse signals, and outputting a voltage level selected as a duty modulation voltage;
(e) outputting a first duty signal by comparing the voltage for duty modulation and the triangular wave;
(f) outputting a second duty signal by comparing the duty modulation voltage and the triangular wave; and
(g) generating a gate signal in accordance with the position signals output from said position sensing means and the first and second duty signals.
72. The method as claimed in claim 71, wherein step (c) uses a plurality of resistors for voltage division.
73. The method as claimed in claim 72, wherein said frequency oscillating means generates the triangular wave on the basis of charging and discharging of a capacitor.
74. The method as claimed in claim 73, wherein the capacitor has a variable capacitance.
75. The method as claimed in claim 74, wherein the capacitor is replaceable.
76. The method as claimed in claim 75, wherein the preselected number of pulses to be counted is variable.
77. The method in accordance with claim 74, wherein the capacitor is replaced or the preselected number of pulses is varied when the motor is replaced.
78. The method as claimed in claim 77, wherein the second duty signal is fed to the switching devices when said switching devices should be turned off.
79. The method as claimed in claim 77, wherein the second duty is applied to the switching devices when said switching devices should be turned on.
80. The method as claimed in claim 79, wherein in step (d) the plurality of voltage levels and the pulse signals correspond one-to-one to each other.
81. The method as claimed in claim 79, wherein the plurality of voltage levels and the pulse signals have a 1:n correspondence to each other.
82. The method as claimed in claim 77, wherein the second duty signal is fed to the switching devices when said switching devices should be turned off and when said switching devices should be turned on.
83. The method as claimed in claim 71, wherein said frequency oscillating means generates the triangular wave on the basis of charging and discharging of a capacitor.
84. The method as claimed in claim 83, wherein the capacitor has a variable capacitance.
85. The method as claimed in claim 84, wherein the capacitor is replaceable.
86. The method as claimed in claim 85, wherein the preselected number of pulses to be counted is variable.
87. The method in accordance with claim 85, wherein the capacitor is replaced or the preselected number of pulses is varied when the motor is replaced.
88. The method as claimed in claim 87, wherein the second duty signal is fed to the switching devices when said switching devices should be turned off.
89. The method as claimed in claim 87, wherein the second duty is applied to the switching devices when said switching devices should be turned on.
90. The method as claimed in claim 89, wherein in step (d) the plurality of voltage levels and the pulse signals correspond one-to-one to each other.
91. The method as claimed in claim 89, wherein the plurality of voltage levels and the pulse signals have a 1:n correspondence to each other.
92. The method as claimed in claim 87, wherein the second duty signal is fed to the switching devices when said switching devices should be turned off and when said switching devices should be turned on.
93. The method as claimed in claim 71, wherein the capacitor has a variable capacitance.
94. The method as claimed in claim 93, wherein the capacitor is replaceable.
95. The method as claimed in claim 94, wherein the preselected number of pulses to be counted is variable.
96. The method in accordance with claim 94, wherein the capacitor is replaced or the preselected number of pulses is varied when the motor is replaced.
97. The method as claimed in claim 96, wherein the second duty signal is fed to the switching devices when said switching devices should be turned off.
98. The method as claimed in claim 96, wherein the second duty is applied to the switching devices when said switching devices should be turned on.
99. The method as claimed in claim 98, wherein in step (d) the plurality of voltage levels and the pulse signals correspond one-to-one to each other.
100. The method as claimed in claim 98, wherein the plurality of voltage levels and the pulse signals have a 1:n correspondence to each other.
101. The method as claimed in claim 96, wherein the second duty signal is fed to the switching devices when said switching devices should be turned off and when said switching devices are turned on.
102. The method as claimed in claim 71, wherein the capacitor is replaceable.
103. The method as claimed in claim 102, wherein the preselected number of pulses to be counted is variable.
104. The method in accordance with claim 102, wherein the capacitor is replaced or the preselected number of pulses is varied when the motor is replaced.
105. The method as claimed in claim 104, wherein the second duty signal is fed to the switching devices when said switching devices should be turned off.
106. The method as claimed in claim 104, wherein the second duty is applied to the switching devices when said switching devices should be turned on.
107. The method as claimed in claim 106, wherein in step (d) the plurality of voltage levels and the pulse signals correspond one-to-one to each other.
108. The method as claimed in claim 106, wherein the plurality of voltage levels and the pulse signals have a 1:n correspondence to each other.
109. The method as claimed in claim 104, wherein the second duty signal is fed to the switching devices when said switching devices should be turned off and when said switching devices should be turned on.
110. The method as claimed in claim 71, wherein the preselected number of pulses to be counted is variable.
111. The method as claimed in claim 71, wherein the second duty signal is fed to the switching devices when said switching devices should be turned off.
112. The method as claimed in claim 71, wherein the second duty is applied to the switching devices when said switching devices should be turned on.
113. The method as claimed in claim 112, wherein in step (d) the plurality of voltage levels and the pulse signals correspond one-to-one to each other.
114. The method as claimed in claim 112, wherein the plurality of voltage levels and the pulse signals have a 1:n correspondence to each other.
115. The method as claimed in claim 71, wherein the second duty signal is fed to the switching devices when said switching devices should be turned off and when said switching devices should be turned on.
116. The method as claimed in claim 71, wherein the plurality of voltage levels and the pulse signals have a 1:n correspondence to each other.