1. A substrate comprising a trench structure including a trench cavity, wherein the trench cavity includes a growth-blocking material on less than an entirety of any one surface in said trench cavity.
2. The substrate of claim 1, wherein the material comprises an oxide layer.
3. The substrate of claim 2, wherein the oxide layer comprises silicon dioxide.
4. The substrate of claim 1, wherein the trench cavity has a height to width aspect ratio that is less than 1.
5. The substrate of claim 1, wherein the trench cavity has a width in a range of from 15 to 60 \u03bcm.
6. The substrate of claim 1, further comprising a bridged lateral overgrowth formation overlying the trench cavity.
7. The substrate of claim 6, wherein the bridged lateral overgrowth formation has a defect density that is below 5\xd7105 defects cm\u22122.
8. The substrate of claim 6, wherein the bridged lateral overgrowth formation comprises a III-nitride.
9. The substrate of claim 6, wherein the bridged lateral overgrowth formation comprises GaN.
10. The substrate of claim 1, wherein the trench cavity has a depth in a range of from about 1 \u03bcm to about 5 \u03bcm.
11. A microelectronic device comprising the substrate of claim 1.
12. A microelectronic device comprising the substrate of claim 6.
13. The microelectronic device of claim 11, as selected from the group consisting of laser diodes, HEMTs, and UV LEDs.
14. A method of making a microelectronic device structure, comprising:
depositing an oxide layer on a substrate;
depositing a photoresist layer on the oxide layer;
patterning, exposing and developing the photoresist layer, and etching the oxide layer, to expose a surface of the substrate;
etching the exposed surface of the substrate to form a trench cavity therein;
depositing a patterned material supportive of a coalescent Pendeo layer thereon, on at least a portion of an inside surface of the trench cavity.
15. The method of claim 14, further comprising growing lateral epitaxial growth projections from side surfaces of the trench cavity toward and into contact with one another to form a bridged lateral overgrowth formation overlying the trench cavity above the patterned material.
16. A method of forming a trench lateral epitaxial overgrowth substrate on a base member, comprising:
depositing an oxide layer on the base member;
depositing a photoresist layer on the oxide layer;
patterning, exposing and developing the photoresist layer, and etching the oxide layer, to expose a surface of the base member;
etching the exposed surface of the base member to form a trench cavity therein;
depositing a patterned material supportive of a coalescent Pendeo layer thereon, on at least a portion of an inside surface of the trench cavity; and
growing lateral epitaxial growth projections from side surfaces of the trench cavity toward and into contact with one another to form a bridged lateral overgrowth formation overlying the trench cavity above the patterned material.
17. The method of claim 16, wherein said base member is heteroepitaxial.
18. A trench cavity structure adapted for lateral epitaxial overgrowth, comprising a trench cavity having floor and sidewall internal surfaces, and a growth-blocking material deposited on floor and lower sidewall internal surfaces, wherein said growth-blocking material on said lower sidewall surfaces is at a height greater than the thickness of the growth-blocking material deposited on the floor of said trench cavity, with upper sidewall internal surfaces being devoid of said growth-blocking material thereon, so that the growth-blocking material deposited on the floor of the trench cavity prevents vertical growth, and so that the lateral epitaxial overgrowth comprises laterally inwardly directed growth of projections from both upper sidewall internal surfaces of said trench cavity into contact with one another to form a bridge structure.
19. The trench cavity structure of claim 18, wherein the growth-blocking material comprises an oxide layer.
20. The trench cavity structure of claim 18, wherein the growth-blocking layer comprises silicon dioxide.
21. A method of making a microelectronic device assembly, comprising:
forming a first coalesced Pendeo layer of GaN on a heteroepitaxial substrate;
growing a layer of GaN on the coalesced Pendeo layer, by MOCVD;
growing a layer of GaN on the MOCVD layer of GaN, by HVPE;
forming a second coalesced Pendeo layer of GaN, on the HVPE layer of GaN;
growing a layer of GaN on the second coalesced Pendeo layer of GaN, by MOCVD; and
forming a microelectronic device structure on andor in the MOCVD layer of GaN on the second coalesced Pendeo layer of GaN.
22. The method of claim 21, wherein the second coalesced Pendeo layer of GaN is grown as pitched stripes on said HVPE layer of GaN.
23. The method of claim 21, wherein the second coalesced Pendeo layer of GaN is grown on said HVPE layer of GaN after masking of said HVPE layer with SiO2 stripes.
24. A microelectronic device assembly, comprising:
a first Pendeo layer of GaN;
a first MOCVD layer of GaN on the first Pendeo layer of GaN;
an HVPE layer of GaN on the first MOCVD layer of GaN;
a second Pendeo layer of GaN on the HVPE layer of GaN;
a second MOCVD layer of GaN on the second Pendeo layer of GaN; and
a microelectronic device structure on andor in the second MOCVD layer of GaN.
25. A microelectronic device assembly, comprising:
a sapphire substrate;
GaN pedestals on said sapphire substrate, defining a trench cavity, wherein the sapphire substrate constitutes a floor portion of the trench cavity, and includes convex shoulders adjacent to the GaN pedestals; and
a growth-blocking layer on said convex shoulders, whereby said growth-blocking layer suppresses vertical and angular growth from said convex shoulders, to accommodate lateral epitaxial overgrowth across the trench cavity above said convex shoulders.
26. A microelectronic device assembly, comprising a trench cavity having floor and sidewall internal surfaces, a growth-blocking material deposited on floor and lower sidewall internal surfaces, wherein said growth-blocking material on said lower sidewall surfaces is at a height greater than the thickness of the growth-blocking material deposited on the floor of said trench cavity, with upper sidewall internal surfaces being devoid of said growth-blocking material thereon, and laterally inwardly extended growth projections that extend from both upper sidewall internal surfaces of said trench cavity and contact with one another at their lateral inward extremeties to form a bridge structure above the floor of the cavity.
27. A microelectronic device assembly, comprising:
a heteroepitaxial substrate;
III-V nitride pedestals on said heteroepitaxial substrate, defining a trench cavity, wherein the substrate constitutes a floor portion of the trench cavity, and includes convex shoulders adjacent to the pedestals; and
a growth-blocking layer on said convex shoulders, whereby said growth-blocking layer suppresses vertical and angular growth from said convex shoulders, to accommodate lateral epitaxial overgrowth across the trench cavity above said convex shoulders.
28. The microelectronic device assembly of claim 27, wherein the heteroepitaxial substrate comprises a material selected from among sapphire, SiC, Si and AlN.
29. The substrate of claim 1, wherein the growth-blocking material includes spaced-apart elements on said surface.
30. The substrate of claim 1, wherein said trench cavity comprises a first sidewall, a second sidewall and a floor.
31. The substrate of claim 30, wherein said any one surface comprises surface of said floor.
32. The substrate of claim 30, wherein said any one surface comprises a sidewall surface.
33. The substrate of claim 30, wherein said growth-blocking material is on less than an entirety of surfaces of each of the first and second sidewalls.
34. The substrate of claim 30, wherein said growth-blocking material is on less than an entirety of surfaces of each of the first and second sidewalls and said floor.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A surface cleaning device comprising:
a cleaning chamber adapted to receive goods to be cleaned;
at least one tank for receiving a cleaning medium;
a cleaning medium circuit comprising a supply device that conveys the cleaning medium from the at least one tank to the cleaning chamber and a return device returning the cleaning medium from the cleaning chamber to the at least one tank;
an analytical device for measuring contamination of the cleaning medium.
2. The surface cleaning device according to claim 1, wherein the analytical device is connected by a bypass to the cleaning medium circuit.
3. The surface cleaning device according to claim 1, wherein the analytical device is connected to the supply device.
4. The surface cleaning device according to claim 1, wherein the analytical device is connected to the return device.
5. The surface cleaning device according to claim 1, wherein the analytical device is connected to the tank.
6. The surface cleaning device according to claim 1, further comprising a valve that controls a flow rate of the cleaning medium through the analytical device.
7. The surface cleaning device according to claim 1, wherein the analytical device comprises a measuring device and an evaluation device connected to the measuring device.
8. The surface cleaning device according to claim 7, wherein the evaluation device comprises a computer that controls the measuring device.
9. The surface cleaning device according to claim 7, wherein the measuring device has a flow passage through which the cleaning medium is passed for performing a measurement.
10. The surface cleaning device according to claim 9, wherein the flow passage is arranged at least partially between a light source and a measuring unit of the measuring device.
11. The surface cleaning device according to claim 10, wherein the light source is a white light source.
12. The surface cleaning device according to claim 7, wherein the measuring device has an area sensor for simultaneously recording a plurality of measured values.
13. The surface cleaning device according to claim 12, wherein the area sensor is a sensor for recording a plurality of pixels.
14. The surface cleaning device according to claim 10, wherein the measuring device comprises a camera.
15. The surface cleaning device according to claim 7, wherein the evaluation device continuously computes, using measured values provided by the measuring device, the contamination of the cleaning medium based on at least one calibration value that is saved by software or hardware.
16. The surface cleaning device according to claim 1, wherein the analytical device is adapted to measure turbidity of the cleaning medium.
17. The surface cleaning device according to claim 1, wherein the analytical device is adapted to measure the contamination of the cleaning medium by spectral analysis.
18. The surface cleaning device according to claim 1, wherein the analytical device is adapted to perform image evaluation.
19. The surface cleaning device according to claim 1, wherein the analytical device is adapted to evaluate color distribution or brightness distribution.
20. The surface cleaning device according to claim 1, wherein the analytical device is adapted to evaluate color distribution and brightness distribution.
21. The surface cleaning device according to claim 1, wherein the analytical device is adapted to evaluate fluorescent goods to be cleaned.
22. The surface cleaning device according to claim 21, further comprising a device for illuminating the fluorescent goods.