1-9. (canceled)
10. A method for fabrication of a stacked capacitor as part of a CMOS process, the method comprising the following steps:
applying a buried silicon layer on a substrate with a buried oxide insulating layer;
heavy n or p doping a portion of the buried silicon layer to form a base plate of the capacitor;
masking a connecting portion within the area of the base plate and forming a lower dielectric of the capacitor within the connecting portion when producing a gate-oxide layer as part of the CMOS process;
applying a poly-silicon layer in the area of the connecting portion to form a center plate of the capacitor;
forming an upper dielectric on the surface of the center plate;
applying a layer of a metallic conductor on the upper dielectric to form a cover plate of the capacitor.
11. The method according to claim 10, wherein at least part of the poly-silicon layer is covered by a silicide layer prior to the formation of the upper dielectric.
12. The method according to claim 10, wherein the upper dielectric is produced by the formation of an oxide layer.
13. The method according to claim 10, wherein the upper dielectric is produced by the formation of a nitride layer.
14. The method according to claim 10, wherein titanium nitride or a titanium alloy is used as the metallic conductor for the formation of the cover plate.
15. The method according to claim 13, wherein TiW is used as the metallic conductor for the formation of the cover plate.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A method for, from a timing unit, obtaining configuration data for a data processing apparatus, the method comprising the steps of:
storing configuration data in the timing unit via a circuit element having a value that corresponds to the configuration data;
commencing a first mode of the timing unit;
detecting a first event, which first event occurs after the commencement of the first mode, the first event being caused by the timing unit and responsive to the value of the circuit element;
calculating a first time interval between the commencement of the first mode and the first event;
performing a first comparison between the calculated first time interval and a first reference time interval; and
determining the configuration data in dependence on the result of the first comparison.
2. A method as claimed in claim 1, wherein following the step of performing a first comparison, the method further comprising the steps of:
I. calculating an error value in dependence on the result of the first comparison;
commencing a second mode of the timing unit;
detecting a second event, which second event occurs after the commencement of the second mode, the second event being caused by the timing unit;
calculating a second time interval between the commencement of the second mode and the second event;
adjusting the calculated second time interval in dependence on the error value; and
performing a second comparison between the adjusted second time interval and a second reference time interval;
wherein the step of determining the configuration data is also in dependence on the result of the second comparison.
3. A method as claimed in claim 2, wherein following the step of commencing a second mode, the method further comprises the step of:
counting time periods.
4. A method as claimed in claim 2, wherein following step I the method further comprises the step of:
determining configuration data in dependence on the result of the first comparison.
5. A method as claimed in claim 1, wherein following the step of commencing a first mode, the method further comprises the step of:
counting time periods.
6. A method as claimed in claim 5, wherein the first time interval is calculated using the counted time periods.
7. A method as claimed in claim 1, wherein the first mode is commenced in response to a voltage applied to the data processing apparatus.
8. A method as claimed in claim 1, wherein the first event is detected in response to a voltage applied to the data processing apparatus.
9. A method as claimed in claim 1, wherein the first mode is commenced in response to software running on the data processing apparatus.
10. A method as claimed in claim 1, wherein the first mode is commenced in nonnal operation of the timing unit independently of the data processing apparatus.
11. A method as claimed in claim 1, wherein the first time interval is calculated by using a timestamp.
12. A data processing apparatus comprising:
a timing unit to generate a first event signal, the timina unit having a first mode of operation;
a first port to receive the first event signal;
non-volatile storage to store a software program and data related to said software program; and
a CPU to calculate a first time interval between commencement of the first mode of operation of the timing unit and the receipt of the first event signal by the first port, to perform a first comparison between the calculated first time interval and a first reference time interval, to determine configuration data in dependence on a result of the first comparison, and to run said software program in response to the configuration data.
13. A data processing apparatus according to claim 12, wherein the first port outputs a mode indication signal.
14. A data processing apparatus according to claim 13, wherein the timing unit includes
a first port to receive the mode indication signal and to output the first event signal; and
a circuit to generate the first event signal in response to and subsequent to the mode indication signal.
15. A data processing apparatus according to claim 12, further comprising:
a second port to output a mode indication signal.
16. A data processing apparatus according to claim 15, wherein the timing unit includes:
a first port to receive the mode indication signal;
a second port to output the first event signal; and
a circuit to generate the first event signal in response to and subsequent to the mode indication signal.
17. A data processing apparatus according to claim 12, wherein the timing unit includes
a first port to output the first event signal; and
a circuit to generate the first event signal.
18. A data processing apparatus according to claim 12, wherein the first event signal is a voltage pulse.
19. A data processing apnaratus according to claim 12, wherein the first event signal is a voltage transition.
20. A data processing apparatus according to claim 12, wherein the first event signal is a periodically varying voltage.
21. A data processing apparatus according to claim 12, wherein the timing unit includes an RC network that determines the first time interval.
22. A data processing apparatus according to claim 12,
wherein the non-volatile storage further stores software configured to calculate the first time interval between commencement of the first mode of the timing unit and the receipt of the first event signal by the first port, to perform the first comparison between the calculated first time interval and the first reference time interval, and to determine the configuration data in dependence on the result of the first comparison.