1. A method of making a semiconductor device comprising:
forming a gate insulating film above a semiconductive substrate;
forming a gate electrode on the gate insulating film;
forming in or on the substrate at both sides of the gate electrode a pair of spaced-apart heavily-doped impurity layers of p-type conductivity to a concentration ranging from 5\xd71019 to 1\xd71021 atoms per cubic centimeter (cm3); and
forming a silicide layer by causing the impurity layers to react with a metal while simultaneously applying a compressive strain to the impurity layers.
2. The method of claim 1,
further comprising forming a SixGe1-x (where x is greater than or equal to zero and less than one) layer in or on the substrate at the both sides of the gate electrode,
wherein the impurity layers are formed at least in a region between the gate electrode and the SixGe1-x layer.
3. The method of claim 2,
further comprising
forming a first sidewall insulator film on both side faces of the gate electrode,
etching the substrate with the gate electrode and the first sidewall insulator film being as a mask,
removing the first sidewall insulator film, and
forming on the both faces of the gate electrode a second sidewall insulator film less in thickness than the first sidewall insulator film after having removed the first sidewall insulator film,
wherein
the SixGe1-x layer is formed after etching the substrate and yet prior to removal of the first sidewall insulator film and
wherein
the impurity layers are formed by doping an impurity by ion implantation with the gate electrode and the second sidewall insulator film as a mask.
4. The method of claim 2,
further comprising
forming a sidewall insulator film on both side faces of the gate electrode, and
etching the substrate with the gate electrode and the sidewall insulator film as a mask,
wherein
the impurity layers are formed after having etched the substrate and
wherein
the SixGe1-x layer is formed after having formed the impurity layers.
5. The method of claim 1, wherein the substrate is a silicon substrate and wherein the impurity is boron (B) whereas the metal is nickel (Ni).
6. The method of claim 1, wherein the impurity layers have their lattice constant under application of the compressive strain, the lattice constant being deviated from a lattice constant in a state free from the compressive strain by 0.2 percent (%) or more and less than 1.0% or below.
7. A method of making a semiconductor device comprising:
forming a gate insulating film above a semiconductive substrate;
forming a gate electrode on the gate insulating film;
forming in or on the substrate at both sides of the gate electrode a pair of spaced-apart heavily-doped impurity layers of n-type conductivity to a concentration ranging from 5\xd71019 to 1\xd71021 atomscm3; and
forming a silicide layer by causing the impurity layers to react with a metal while simultaneously applying a tensile strain to the impurity layers.
8. The method of claim 7,
further comprising forming a SixC1-x (where 0\u2266x<1) layer in or on the substrate at the both sides of the gate electrode,
wherein the impurity layers are formed in at least a region between the gate electrode and the SixC1-x layer.
9. The method of claim 8,
further comprising
forming a first sidewall insulator film on both side faces of the gate electrode,
etching the substrate with the gate electrode and the first sidewall insulator film being as a mask, removing the first sidewall insulator film, and
forming on the both faces of the gate electrode a second sidewall insulator film less in thickness than the first sidewall insulator film after having removed the first sidewall insulator film,
wherein
the SixC1-x layer is formed after etching the substrate and yet prior to removal of the first sidewall insulator film and
wherein
the impurity layers are formed by doping an impurity by ion implantation with the gate electrode and the second sidewall insulator film as a mask.
10. The method of claim 8,
further comprising
forming a sidewall insulator film on both side faces of the gate electrode, and
etching the substrate with the gate electrode and the sidewall insulator film as a mask,
wherein
the impurity layers are formed after having etched the substrate and
wherein
the SixC1-x layer is formed after having formed the impurity layers.
11. The method of claim 7, wherein the substrate is a silicon substrate and wherein the impurity is arsenic (As) whereas the metal is nickel (Ni).
12. A semiconductor device comprising:
a channel region in a semiconductor substrate;
a gate insulating film above the channel region;
a gate electrode on the gate insulating film;
a layer of silicon germanium at both sides of the channel region, the silicon germanium being defined by SixGe1-x, where x is greater than or equal to zero (0) but less than one (1);
a heavily-doped impurity layer of p-type conductivity residing between the channel region and the SixGe1-x layer and having an impurity concentration ranging from 5\xd71019 to 1\xd71021 atomcm3; and
a layer of metal silicide on the impurity layer, wherein
the impurity concentration is higher than a concentration of the impurity in the metal silicide layer.
13. The device of claim 12, wherein the substrate is a silicon substrate and wherein the impurity is boron (B) whereas the metal silicide is a nickel silicide (NiSi).
14. A semiconductor device comprising:
a channel region in a semiconductor substrate;
a gate insulating film above the channel region;
a gate electrode on the gate insulating film;
a layer of silicon carbide at both sides of the channel region, the silicon carbide being defined by SixC1-x, where x is more than or equal to zero and less than one;
a heavily-doped impurity layer of n-type conductivity residing between the channel region and the SixC1-x layer and having an impurity concentration ranging from 5\xd71019 to 1\xd71021 atomcm3; and
a layer of metal silicide on the impurity layer, wherein
the impurity concentration is higher than a concentration of the impurity in the metal silicide layer.
15. The device of claim 14, wherein the substrate is a silicon substrate and wherein the impurity is arsenic (As) whereas the metal silicide is nickel silicide (NiSi).
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A metro street address guide (MSAG) validation database, comprising:
a plurality of validated street addresses;
wherein each of said plurality of validated street addresses is correlated with a polygon area defined by latitudelongitude coordinates.
2. The metro street address guide (MSAG) validation database according to claim 1, wherein:
at least some, but not all, of said plurality of validated street addresses are defined by a street address of a corresponding cell tower.
3. A method of generating entries in an MSAG validation database, comprising:
defining, in an MSAG validation database, a plurality of newly defined MSAG-addressed polygons having a greater density than a plurality of existing MSAG-addressed polygons; and
replacing, in said MSAG validation database, said plurality of existing MSAG-addressed polygons with said plurality of newly defined MSAG-addressed polygons.
4. The method of generating entries in an MSAG validation database according to claim 3, wherein:
each of said plurality of newly defined MSAG-addressed polygons is defined by a single street address.
5. The method of generating entries in an MSAG validation database according to claim 4, wherein:
said single street address is a street address of an approximate center of each of said respective plurality of newly defined MSAG-addressed polygons.
6. The method of generating entries in an MSAG validation database according to claim 3, wherein:
each of said plurality of existing MSAG-addressed polygons is defined by a single street address.
7. The method of generating entries in an MSAG validation database according to claim 6, wherein:
said single street address is a street address of an approximate center of each of said respective plurality of existing MSAG-addressed polygons.
8. The method of generating entries in an MSAG validation database according to claim 3, wherein:
each of said plurality of newly defined MSAG-addressed polygons are defined by a plurality of latitudelongitude coordinates.
9. The method of generating entries in an MSAG validation database according to claim 3, wherein:
each of said plurality of existing MSAG-addressed polygons are defined by a plurality of latitudelongitude coordinates.
10. The method of generating entries in an MSAG validation database according to claim 3, wherein:
said number of newly defined MSAG-addressed polygons is greater than said number of existing MSAG-addressed polygons.
11. Apparatus for generating entries in an MSAG validation database, comprising:
means for defining, in an MSAG validation database, a plurality of newly defined MSAG-addressed polygons having a greater density than a plurality of existing MSAG-addressed polygons; and
means for replacing, in said MSAG validation database, said plurality of existing MSAG-addressed polygons with said plurality of newly defined MSAG-addressed polygons.
12. The apparatus for generating entries in an MSAG validation database according to claim 11, wherein:
each of said plurality of newly defined MSAG-addressed polygons is defined by a single street address.
13. The apparatus for generating entries in an MSAG validation database according to claim 12, wherein:
said single street address is a street address of an approximate center of each of said respective plurality of newly defined MSAG-addressed polygons.
14. The apparatus for generating entries in an MSAG validation database according to claim 11, wherein:
each of said plurality of existing MSAG-addressed polygons is defined by a single street address.
15. The apparatus for generating entries in an MSAG validation database according to claim 14, wherein:
said single street address is a street address of an approximate center of each of said respective plurality of existing MSAG-addressed polygons.
16. The apparatus for generating entries in an MSAG validation database according to claim 11, wherein:
each of said plurality of newly defined MSAG-addressed polygons are defined by a plurality of latitudelongitude coordinates.
17. The apparatus for generating entries in an MSAG validation database according to claim 11, wherein:
each of said plurality of existing MSAG-addressed polygons are defined by a plurality of latitudelongitude coordinates.
18. The apparatus for generating entries in an MSAG validation database according to claim 11, wherein:
said number of newly defined MSAG-addressed polygons is greater than said number of existing MSAG-addressed polygons.