1. A power source apparatus utilizing a synchronous rectification system, comprising:
a main transformer having a primary coil, and a first secondary coil and a second secondary coil having first ends connected to each other through a tap mutually electromagnetically coupled to said primary coil;
a first field effect transistor having a drain connected to a second end of said first secondary coil, a source connected to a reference electric potential, and a gate to which a first drive signal is supplied;
a second field effect transistor having a drain connected to a second end of said second secondary coil, a source connected to the reference electric potential, and a gate to which a second drive signal is supplied; and
a gate driver configured to generate the first drive signal and the second drive signal in accordance with a drain voltage of said first field effect transistor and a drain voltage of said second field effect transistor, for driving said first field effect transistor and said second field effect transistor in a complementary style,
wherein the first and second drive signals alternately turn on the first and second field effect transistors, such that the first field effect transistor is turned on when the second field effect transistor turns off, and the second field effect transistor turns on when the first field effect transistor turns off, and
wherein said gate driver includes:
a first comparator for comparing a drain voltage of said first field effect transistor with a reference voltage;
a second comparator for comparing a drain voltage of said second field effect transistor with the reference voltage;
a first delay circuit for delaying the first drive signal by a previously set dead time;
a second delay circuit for delaying the second drive signal by the previously set dead time;
a first circuit for generating the second drive signal in accordance with an output signal from said first comparator, and the first drive signal delayed by said first delay circuit, and outputting the second drive signal to each of said gate of said second field effect transistor, and an input of said second delay circuit; and
a second circuit for generating the first drive signal in accordance with an output signal from said second comparator, and the second drive signal delayed by said second delay circuit, and outputting the first drive signal to each of said gate of said first field effect transistor, and an input of said first delay circuit.
2. The power source apparatus according to claim 1, wherein
the first field effect transistor turns on when the first drive signal is high and the second drive signal is low to provide current through the first field effect transistor while the second field effect transistor is off, and the second field effect transistor turns on when the second drive signal is high and the first drive signal is low to provide current through the second field effect transistor while the first field effect transistor is off.
3. The power source apparatus according to claim 1, wherein in said main transformer,
in response to a resonance operation on the first end, pulses are induced in said first secondary coil and said second secondary coil on the second end, respectively, and
a first current is caused to flow through said first field effect transistor, and a second current, 180\xb0 out of phase with the first current, is caused to flow through said second field effect transistor, said first and second current being alternately supplied to said tap.
4. A power source apparatus, comprising:
a first converter for converting an alternating current voltage into a first direct current voltage; and
a second converter for converting the first direct current voltage obtained by said first converter into a second direct current voltage, said second comparator adopting a synchronous rectification system on a secondary side,
said second comparator including
a main transformer having a primary coil, and a first secondary coil and a second secondary coil having first ends connected to each other through a tap mutually electromagnetically coupled to said primary coil,
a first field effect transistor having a drain connected to a second end of said first secondary coil, a source connected to a reference electric potential, and a gate to which a first drive signal is supplied,
a second field effect transistor having a drain connected to a second end of said second secondary coil, a source connected to the reference electric potential, and a gate to which a second drive signal is supplied, and
a gate driver for generating the first drive signal and the second drive signal in accordance with a drain voltage of said first field effect transistor and a drain voltage of said second field effect transistor, thereby driving said first field effect transistor and said second field effect transistor in a complementary style,
wherein the first and second drive signals alternately turn on the first and second field effect transistors, such that the first field effect transistor is turned on when the second field effect transistor turns off, and the second field effect transistor turns on when the first field effect transistor turns off, and
wherein said gate driver includes:
a first comparator for comparing a drain voltage of said first field effect transistor with a reference voltage;
a second comparator for comparing a drain voltage of said second field effect transistor with the reference voltage;
a first delay circuit for delaying the first drive signal by a previously set dead time;
a second delay circuit for delaying the second drive signal by the previously set dead time;
a first circuit for generating the second drive signal in accordance with an output signal from said first comparator, and the first drive signal delayed by said first delay circuit, and outputting the second drive signal to each of said gate of said second field effect transistor, and an input of said second delay circuit; and
a second circuit for generating the first drive signal in accordance with an output signal from said second comparator, and the second drive signal delayed by said second delay circuit, and outputting the first drive signal to each of said gate of said first field effect transistor, and an input of said first delay circuit.
5. The power source apparatus according to claim 4, wherein
the first field effect transistor turns on when the first drive signal is high and the second drive signal is low to provide current through the first field effect transistor while the second field effect transistor is off, and the second field effect transistor turns on when the second drive signal is high and the first drive signal is low to provide current through the second field effect transistor while the first field effect transistor is off.
6. The power source apparatus according to claim 4, wherein in said main transformer,
in response to a resonance operation on the first end, pulses are induced in said first secondary coil and said second secondary coil on the second end, respectively, and a first current is caused to flow through said first field effect transistor, and a second current, 180\xb0 out of phase with the first current, is caused to flow through said second field effect transistor, said first and second current being alternately supplied to said tap.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
What is claimed is:
1. Joint structure of a cab mounting portion provided at a front lower portion of said cab for joining said cab with a chassis frame, comprising said structure integrally fixing a front mounting rail which is horizontally provided at said cab front lower portion and is fixed to front pillars on both sides of said cab, a cab-under-frame which is fixed to a floor panel outer surface and forms an upward portion extending toward a cab front upper portion, and a cab mount bracket which is fixed to said cab-under-frame and forms an upward portion extending toward said cab front upper portion along said cab-under-frame.
2. The joint structure of a cab mounting portion according to claim 1, wherein said cab-under-frame and said cab mount bracket are fixed to a front vertical surface of said front mounting rail.
3. The joint structure of a cab mounting portion according to claim 1, wherein said upward portion of said cab mount bracket extending to the vicinity of an upper surface of said front mounting rail is fixed to an outer surface of said floor panel in said front mounting rail.