1. A process for the manufacture of compounds of formula IV:
wherein R1 is an amino protecting group, and R2 is hydrogen or, C1-10 alkyl, or isoprenyl, the process comprising:
a) reacting a compound of formula Ia:
wherein M+is a cation with an ammonium salt NH4+X\u2212, wherein X\u2212 is an anion, in a solvent to obtain a compound of formula II:
b) reacting a compound of formula II with a nitrile R2\u2014CN in the presence of a base to obtain a compound of formula IV.
2. The process according to claim 1, wherein R1 is formyl or acetyl.
3. The process according to claim 1, wherein R2 is methyl, ethyl, propyl, isopropyl or isoprenyl.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
What is claimed is:
1. A surface mount typed electronic circuit, comprising
a plate-shaped bare chip where a semiconductor circuit is formed and a plate-shaped insulating substrate to be overlapped with the bare chip, the bare chip including a plurality of first electrodes connected to the semiconductor and at least two second electrodes connected to the semiconductor circuit on the bottom surface thereof, the insulating substrate including a plurality of first lands provided on the top surface thereof corresponding to the first electrodes, at least two second lands provided on the top surface thereof corresponding to the second electrodes, a plurality of terminals for external connection having conductive pattern provided on the bottom surface, with at least one of the terminals connected to the first land, and an inductance element having a conductive pattern whose end portions are connected to the second lands, wherein the bare chip is overlapped with the insulating substrate so as to respectively connect the first electrodes and the second electrodes to the first lands and the second lands.
2. The surface mount typed electronic circuit, according to claim 1, wherein
the first electrodes are provided in an outer peripheral portion of the bare chip and the second electrodes are provided in a center of the bare chip, and the first lands are provided in an outer peripheral portion of the insulating substrate and the second lands are provided in a center of the insulating substrate.
3. The surface mount typed electronic circuit, according to claim 1, wherein
the insulating substrate is formed by a stack of insulating thin plates.
4. The surface mount typed electronic circuit, according to claim 1, wherein
the inductance element is formed vortecosely.
5. The surface mount typed electronic circuit, according to claim 4, wherein
in the vortical inductance element, at least an intersecting portion thereof is formed on different surfaces in a thickness direction so as not to be in contact with each other.
6. The surface mount typed electronic circuit, according to claim 1, wherein
each of the respective terminals is formed in an area lager than each of the first lands.
7. The surface mount typed electronic circuit, according to claim 6, wherein
the terminals are distributed all over the bottom surface of the insulating substrate.
8. The surface mount typed electronic circuit, according to claim 1, wherein
a resistor andor a condenser is formed within the insulating substrate depending on a thick film or a thin film.