1. A switch to switch time division multiplexed (TDM) data and packet data from input ports to output ports, comprising:
a plurality of input ports to receive data, wherein each data comprises either TDM data or packet data;
a plurality of output ports to transmit switched data;
a single shared memory coupling said input ports to said output ports, said single shared memory to receive sequentially all TDM data and all packet data received from said input ports, said single shared memory to store both TDM data and packet data, said single shared memory to switch all sequentially received TDM data and packet data received from respective input ports to respective output ports, and wherein switching of any received TDM data is based on input time slots of said TDM data;
a time slot interchange controller coupled to said single shared memory to select addresses in said single shared memory to store TDM data, said time slot interchange controller to select an address of said single shared memory for a TDM data based on a time slot of a frame in which said switch received the TDM data, wherein said time slot interchange controller selects a same address for said single shared memory each time TDM data is received in a respective time slot of a respective frame; and
a packet switch controller coupled to said single shared memory to select addresses in said single shared memory to store packet data, said packet switch controller to select an address of said single shared memory for a packet data based on routing data embedded in the packet data and based on the input port which received the packet data.
2. A switch as claimed in claim 1, wherein each data is received by an input port as a time slot in a frame.
3. A switch as claimed in claim 1, wherein said single shared memory comprises a TDM data memory portion and a packet data memory portion.
4. A switch as claimed in claim 1, wherein said single shared memory treats the input ports as logical input ports.
5. A switch as claimed in claim 1, wherein said single shared memory to place sequentially received packet data in a queue for a respective output port.
6. A switch as claimed in claim 1, wherein the data are received by said input ports and transmitted by said output ports as data exchange units.
7. A switch as claimed in claim 1, wherein the switching of a data from a respective input port to a respective output port is controlled by a stored switch configuration.
8. A switch as claimed in claim 1, further comprising:
an input data router to route sequentially data from said input ports to said single shared memory; and
an output data router to route sequentially data from said single shared memory to said output ports.
9. A switch as claimed in claim 1, wherein the data are received by said input ports and transmitted by said output ports as data exchange units, the data exchange units for packet data comprise routing information, the switching of a data exchange unit from a respective input port to a respective output port is controlled by a stored switch configuration, said stored switch configuration uses the routing information of data exchange units for packet data to determine respective output ports to switch the data exchange units.
10. A switch for switching time division multiplexed (TDM) data and packet data from input ports to output ports, comprising:
a plurality of input ports to receive data, wherein each data comprises either TDM data or packet data;
a plurality of output ports to transmit switched data;
a shared memory coupling said input ports to said output ports, said shared memory to receive sequentially the data received from said input ports, said shared memory to switch a sequentially received data from a respective input port to a respective output port;
a time slot interchange controller coupled to said shared memory to select addresses in said shared memory to store TDM data, said time slot interchange controller to select an address of said shared memory for a TDM data based on a time slot of a frame in which said switch received the TDM data, wherein said time slot interchange controller selects a same address for said shared memory each time TDM data is received in a respective time slot of a respective frame; and
a packet switch controller coupled to said shared memory to select addresses in said shared memory to store packet data, said packet switch controller to select an address of shared memory for a packet data based on routing data embedded in the packet data and based on the input port which received the packet data.
11. A switch as claimed in claim 10, wherein each data is received by an input port as a time slot in a frame.
12. A switch as claimed in claim 10, wherein said shared memory treats the input ports as logical input ports.
13. A switch as claimed in claim 10, wherein said shared memory places sequentially received packet data in a queue for a respective output port.
14. A switch as claimed in claim 10, wherein the data are received by said input ports and transmitted by said output ports as data exchange units.
15. A switch to switch time division multiplexed (TDM) data and packet data from input ports to output ports, comprising:
a plurality of input ports to receive TDM data and packet data, each TDM data having an associated time slot of a frame;
a plurality of output ports to transmit switched data;
a single shared memory to switch TDM data and packet data from said input ports to said output ports, said single shared memory to store TDM data received at said input ports based on said time slot of said frame of each TDM data, said single shared memory to store packet data received at said input ports based on routing data embedded in each packet data and based on which input port received each packet data;
a time slot interchange controller external to and coupled to said single shared memory to direct said single shared memory regarding storage of TDM data, wherein said time slot interchange controller selects a same address for said single shared memory corresponding to a respective time slot of a respective frame when TDM data is received in said respective time slot of said respective frame; and
a packet switch controller external to and coupled to said single shared memory to direct said single shared memory regarding storage of packet data.
16. A switch as claimed in claim 15, wherein said single shared memory to treat the input ports as logical input ports.
17. A switch as claimed in claim 15, wherein said single shared memory to place sequentially received packet data in a queue for a respective output port.
18. A switch as claimed in claim 15, wherein said input ports to receive and said output ports to transmit TDM data and packet data as data exchange units.
19. A switch as claimed in claim 18, wherein the data exchange units for packet data comprise routing information used to determine output ports to switch the data exchange units.
20. A switch as claimed in claim 15, further comprising:
an input data router to route TDM data and packet data sequentially from said input ports to said single shared memory; and
an output data router to route TDM data and packet data sequentially from said single shared memory to said output ports.
21. A system to switch time division multiplexed (TDM) data and packet data from input ports to output ports, comprising:
said switch of claim 15; and
a stored switch configuration coupled to said switch to control switching of said TDM data and packet data from said input ports to said output ports.
22. A method to switch time division multiplexed (TDM) data and packet data, comprising:
receiving TDM data and packet data at N input ports;
storing received TDM data in a single shared memory based on a time slot of a frame of each TDM data, wherein each frame has M time slots;
storing received packet data in said single shared memory based on routing data embedded in each packet data and based on which input port received each packet data; and
forwarding stored TDM data and packet data from said single shared memory to said output ports,
wherein said single shared memory comprises a TDM data memory portion and a packet data memory portion, and wherein said TDM memory portion accommodates N\xd7M TDM data.
23. The method of claim 22, wherein TDM data are stored in a preselected area of said single shared memory based on said time slots of said frames.
24. The method of claim 23, wherein packet data are stored in an area other than said preselected area of said single shared memory.
25. The method of claim 23, wherein said preselected area of said single shared memory to store TDM data is sectioned according to time slots and frames.
26. The method of claim 22, wherein the output ports for TDM data are determined based on said time slots of said frames, and wherein the output ports for packet data are determined based on said embedded routing data and based the input ports which received the packet data.
27. A switch for switching time division multiplexed (TDM) data and packet data from input ports to output ports, comprising:
a plurality of input ports to receive data, wherein each data comprises either TDM data or packet data;
a plurality of output ports to transmit switched data;
a shared memory coupling said input ports to said output ports, said shared memory to receive sequentially the data received from said input ports, said shared memory to switch a sequentially received data from a respective input port to a respective output port, wherein said shared memory comprises a TDM data memory portion and a packet data memory portion and wherein each section of the TDM data memory portion is assigned to a respective time slot of a respective frame;
a time slot interchange controller coupled to said shared memory to select addresses in said shared memory to store TDM data, said time slot interchange controller to select an address of said shared memory for a TDM data based on a time slot of a frame in which said switch received the TDM data; and
a packet switch controller coupled to said shared memory to select addresses in said shared memory to store packet data, said packet switch controller to select an address of shared memory for a packet data based on routing data embedded in the packet data and based on the input port which received the packet data.
28. A switch to switch time division multiplexed (TDM) data and packet data from input ports to output ports, comprising:
a plurality of input ports to receive TDM data and packet data, each TDM data having an associated time slot of a frame;
a plurality of output ports to transmit switched data;
a single shared memory to switch TDM data and packet data from said input ports to said output ports, said single shared memory to store TDM data received at said input ports based on said time slot of said frame of each TDM data, said single shared memory to store packet data received at said input ports based on routing data embedded in each packet data and based on which input port received each packet data, wherein said single shared memory comprises a TDM data memory portion and a packet data memory portion and wherein each address of the TDM memory portion is assigned to a respective time slot of a respective frame.
29. A switch to switch time division multiplexed (TDM) data and packet data from input ports to output ports, comprising:
a plurality of input ports to receive TDM data and packet data, each TDM data having an associated time slot of a frame;
a plurality of output ports to transmit switched data;
a single shared memory to switch TDM data and packet data from said input ports to said output ports, said single shared memory to store TDM data received at said input ports based on said time slot of said frame of each TDM data, said single shared memory to store packet data received at said input ports based on routing data embedded in each packet data and based on which input port received each packet data, wherein said single shared memory comprises a TDM data memory portion and a packet data memory portion and wherein said TDM memory portion accommodates N\xd7M TDM data, wherein said switch has N input ports, wherein each frame has M time slots.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A size difference measuring method comprising:
an optical interference measuring step without wringing, of obtaining, through simultaneous measurement of interference fringes, size information relating to at least two end standards BGA and BGB which are set in parallel in the measuring optical path between a first interferometer and a second interferometer, by an optical interferometer without wringing that comprises: one light emitter that emits coherent light; a beam splitter; the first interferometer and the second interferometer which are arranged with predetermined separation interval between them and each of which has an optical axis in agreement with the length-measurement axes of at least two end standards BGA and BGB having known preliminary values; and a first interference fringe observation device and a second interference fringe observation device; and
a computing step of computing a difference of a size LA, which is the length between the opposing end faces of the end standard BGA and can be expressed by formula 24 below, and a size LB, which is the length between the opposing end faces of the end standard BGB and can be expressed by formula 25 below, (the size difference \u0394LAB=LB\u2212LA), based on the interference fringe phase differences acquired as the size information of the end standards BGA and BGB at the optical interference measuring without wringing step
LA=\u03bb2{NA+(\u03b5A4\u2212\u03b5A3)+(\u03b5A2\u2212\u03b5A1)},\u2003\u2003(Formula 24)
where \u03bb: wave length of the interference light,
NA: the integer part of the quotient obtained by dividing the size LA of the end standard BGA by \u03bb2,
(\u03b5A2\u2212\u03b5A1): phase difference between the reference interference fringe and the measured interference fringe relating to one end face of the end standard BGA, observed by the first interference fringe observation device,
(\u03b5A4\u2212\u03b5A3): phase difference between the reference interference fringe and the measured interference fringe relating to the other end face of the end standard BGA observed by the second interference fringe observation device,
LB=\u03bb2{NB+(\u03b5B4\u2212\u03b5B3)+(\u03b5B2\u2212\u03b5B1)},\u2003\u2003(Formula 25)
where \u03bb: wave length of the interference light,
NB: the integer part of the quotient obtained by dividing the size LB of the end standard BGB by \u03bb2,
(\u03b5B2\u2212\u03b5B1): phase difference between the reference interference fringe and the measured interference fringe relating to one end face of the end standard BGB, observed by the first interference fringe observation device,
(\u03b5B4\u2212\u03b5B3): phase difference between the reference interference fringe and the measured interference fringe relating to the other end face of the end standard BGB, observed by the second interference fringe observation device.
2. The size difference measuring method according to claim 1 comprising a setting step provided prior to the optical interference measuring step without wringing, wherein
the setting step performs adjustment of the posture or the position of the end standard to the measuring optical path of the optical interferometer without wringing, by a stage which is provided for each of the end standard individually and adjusts the posture or position of the end standard held thereon, independently for each stage.
3. A size difference measuring apparatus comprising:
an optical interferometer without wringing, which obtains, through simultaneous measurement of interference fringes, size information relating to at least two end standards BGA and BGB arranged in the optical measurement path in parallel between a first interferometer and a second interferometer and which comprises: one light emitter that emits coherent light; a beam splitter; the first interferometer and the second interferometer which are arranged with predetermined separation and each of which has the optical axis in agreement with the length-measurement axes of the end standards BGA and BGB having known preliminary values; and a first interference fringe observation device and a second interference fringe observation device; and
a computing unit that computes a difference of a size LA, which is the length between the opposing end faces of the end standard BGA, and a size LB, which is the length between the opposing end faces of the end standard BGB, based on the interference fringe phase differences acquired as the size information of the end standards BGA and BGB by the optical interferometer without wringing, wherein:
the light emitter sends onto the beam splitter coherent light having a beam diameter determined based on the magnitude of the end face of each of the end standards;
the beam splitter halves the coherent light from the light emitter, and sends one part onto the first interferometer, and the other part to the second interferometer;
the first interferometer sends a part of coherent light from the beam splitter onto one end of each of the end standards where the light is reflected and returned, and sends the remainder onto the second interferometer through the side of each of the end standards;
the second interferometer sends a part of coherent light from the beam splitter onto the other end of each of the end standards where the light is reflected and returned, and sends the remainder onto the first interferometer through the side of each of the end standards;
the first interferometer superimposes the coherent light sent from the second interferometer, which have passed through the side of each of the end standards, over the first reference light to obtain a standard interference light, and also superimposes each reflected light, obtained by sending the coherent light from the first interferometer onto one end of each of the end standards, over the first reference light to obtain each measured interference light;
the second interferometer superimposes the coherent light sent from the first interferometer, which have passed through the side of each of the end standards, over the second reference light to obtain a standard interference light, and also superimposes each reflected light, obtained by sending the coherent light from the second interferometer onto the other end of each of the end standards, over the second reference light to obtain each measured interference light;
the first interference fringe observation device observes simultaneously the standard interference light and each measured interference light which are obtained by the first interferometer, as interference fringes, respectively;
the second interference fringe observation device observes, simultaneously with the interference fringe observation by the first interference fringe observation device, the standard interference light and each measured interference light which are obtained by the second interferometer, as interference fringes, respectively; and
the computing unit computes a difference of the size LA, which is the length between the opposing end faces of the end standard BGA and is expressed with the following formula 26, and the size LB, which is the length between the opposing end faces of the end standard BGB and is expressed with the following formula 27, (the size difference \u0394LAB=LB\u2212LA), based on the interference fringe phase differences acquired as size information of the end standards BGA and BGB by the optical interferometer without wringing
LA=\u03bb2{NA+(\u03b5A4\u2212\u03b5A3)+(\u03b5A2\u2212\u03b5A1)},\u2003\u2003(Formula 26)
where \u03bb: wave length of the interference light;
NA: the integer part of the quotient obtained by dividing size LA of the end standard BGA by \u03bb2;
(\u03b5A2\u2212\u03b5A1): phase difference between the reference interference fringe and the measured interference fringe relating to one end face of the end standard BGA observed by the first interference fringe observation device;
(\u03b5A4\u2212\u03b5A3): phase difference between the reference interference fringe and the measured interference fringe relating to the other end face of the end standard BGA observed by the second interference fringe observation device,
LB=\u03bb2{NB+(\u03b5B4\u2212\u03b5B3)+(\u03b5B2\u2212\u03b5B1)},\u2003\u2003(Formula 27)
where \u03bb: wave length of the interference light,
NB: the integer part of the quotient obtained by dividing size LB of the end standard BGB by \u03bb2,
(\u03b5B2\u2212\u03b5B1): phase difference between the reference interference fringe and the measured interference fringe relating to one end face of the end standard BGB observed by the first interference fringe observation device,
(\u03b5B4\u2212\u03b5B3): phase difference between the reference interference fringe and the measured interference fringe relating to the other end face of the end standard BGB observed by the second interference fringe observation device.
4. The size difference measuring apparatus according to claim 3 comprising one stage for each of the end standards individually, wherein the stage adjusts the posture or position of the end standard held thereon, and each of the stages comprises:
a base,
a top plate which holds the end standard, and
an adjustor that enables free motion of the top plate relative to the base and adjusts the posture or position of the end standard to the measuring optical path of the optical interferometer without wringing,
wherein the adjustment of the posture or the position of each of the end standards to the measuring optical path of the optical interferometer without wringing is performed independently for each of the stages.
5. The size difference measuring apparatus according to claim 4, wherein, the adjustor adjusts, as posture adjustment, yawing angle in horizontal direction, pitching angle in longitudinal direction, or rolling angle in lateral direction of the end standard to the measuring optical path of the optical interferometer without wringing.
6. The size difference measuring apparatus according to claim 4, wherein the each stage comprises:
plural temperature sensors which are arranged along the longitudinal direction of the end standard with a separating distance to measure the temperature of plural points of the end standard, and
sensor dislocating devices enabling free dislocating of the temperature sensor in the longitudinal direction of the end standard,
wherein the temperature at plural points of the end standard according to the length thereof are measured for each end standard individually and the temperature of the end standard is estimated based on the measured temperature at the plural points thereof.
7. The size difference measuring apparatus according to claim 5, wherein the each stage comprises:
plural temperature sensors which are arranged along the longitudinal direction of the end standard with a separating distance to measure the temperature of plural points of the end standard, and
sensor dislocating devices enabling free dislocating of the temperature sensor in the longitudinal direction of the end standard,
wherein the temperature at plural points of the end standard according to the length thereof are measured for each end standard individually and the temperature of the end standard is estimated based on the measured temperature at the plural points thereof.
8. The size difference measuring apparatus according to claim 4, wherein the top plate has high heat conductivity so that the temperature of each part of the end standard held on the top plate becomes equal.
9. The size difference measuring apparatus according to claim 5, wherein the top plate has high heat conductivity so that the temperature of each part of the end standard held on the top plate becomes equal.
10. The size difference measuring apparatus according to claim 6, wherein the top plate has high heat conductivity so that the temperature of each part of the end standard held on the top plate becomes equal.
11. The size difference measuring apparatus according to claim 7, wherein the top plate has high heat conductivity so that the temperature of each part of the end standard held on the top plate becomes equal.
12. The size difference measuring apparatus according to claim 8 comprising thermal connection members which connect the top plates of the stages respectively and have high heat conductivity so that the temperature of each of the end standards becomes equal.
13. The size difference measuring apparatus according to claim 9 comprising thermal connection members which connect the top plates of the stages respectively and have high heat conductivity so that the temperature of each of the end standards becomes equal.
14. The size difference measuring apparatus according to claim 10 comprising thermal connection members which connect the top plates of the stages respectively and have high heat conductivity so that the temperature of each of the end standards becomes equal.
15. The size difference measuring apparatus according to claim 11 comprising thermal connection members which connect the top plates of the stages respectively and have high heat conductivity so that the temperature of each of the end standards becomes equal.
16. The size difference measuring apparatus according to claim 12, wherein the thermal connection member has one or more shapes selected from the group consisting of sheet-like shape, mesh-like shape, bellows-like shape, linear shape, so that the independent motion of each of the stages by the adjustor is not disturbed.
17. The size difference measuring apparatus according to claim 13, wherein the thermal connection member has one or more shapes selected from the group consisting of sheet-like shape, mesh-like shape, bellows-like shape, linear shape, so that the independent motion of each of the stages by the adjustor is not disturbed.
18. The size difference measuring apparatus according to claim 14, wherein the thermal connection member has one or more shapes selected from the group consisting of sheet-like shape, mesh-like shape, bellows-like shape, linear shape, so that the independent motion of each of the stages by the adjustor is not disturbed.
19. The size difference measuring apparatus according to claim 15, wherein the thermal connection member has one or more shapes selected from the group consisting of sheet-like shape, mesh-like shape, bellows-like shape, linear shape, so that the independent motion of each of the stages by the adjustor is not disturbed.