1. A semiconductor device comprising:
a semiconductor substrate having a first surface;
two first gate electrodes formed along a first direction on the first surface;
sourcedrain areas formed in the first surface and sandwiching a channel region under each of the first gate electrodes;
a first interlayer insulating layer filling a region between the first gate electrodes and having a top lower in level than a top of each of the first gate electrodes;
a second interlayer insulating layer formed above the first gate electrodes and the first interlayer insulating layer;
two interconnect layers formed in the second interlayer insulating layer along a direction which intersects the first direction and being electrically insulated from each other, a region between the interconnect layers being filled with the second interlayer insulating layer; and
a contact plug formed in the first interlayer insulating layer and the second interlayer insulating layer and being in contact with one of the interconnect layers and one of the sourcedrain areas.
2. The device according to claim 1, wherein a top of one of the first gate electrodes is formed from a metal compound.
3. The device according to claim 2, further comprising a first insulating layer formed between the first surface and the first interlayer insulating layer andor between a sidewall of one of the first gate electrodes and the first interlayer insulating layer.
4. The device according to claim 3, further comprising a second gate electrode formed on the first surface and covered by the first insulating layer.
5. The device according to claim 4, wherein a top of the second gate electrode is different in material from the top of one of the first gate electrodes.
6. The device according to claim 1, further comprising:
a second gate electrode formed on the first surface; and
a third interlayer insulating layer filling a region between one of the first gate electrodes and the second gate electrode, having a top higher in level than the top of the first interlayer insulating layer, and being formed from a material different in etching rate from a material forming the first interlayer insulating layer.
7. The device according to claim 1, wherein the contact plug comprises a first portion which is located in the first interlayer insulating layer and a second portion which is located in the second interlayer insulating layer and is larger in size in a plane parallel to the first surface than the first portion.
8. The device according to claim 7, wherein a top of one of the first gate electrodes is formed from a metal compound.
9. The device according to claim 8, further comprising a first insulating layer formed between the first surface and the first interlayer insulating layer andor between a sidewall of one of the first gate electrodes and the first interlayer insulating layer.
10. The device according to claim 9, further comprising a second gate electrode formed on the first surface and covered by the first insulating layer.
11. The device according to claim 10, wherein a top of the second gate electrode is different in material from the top of one of the first gate electrodes.
12. The device according to claim 7, further comprising:
a second gate electrode formed on the first surface; and
a third interlayer insulating layer filling a region between one of the first gate electrode and the second gate electrode, having a top higher in level than the top of the first interlayer insulating layer, and being formed from a material different in etching rate from a material forming the first interlayer insulating layer.
13. A method of manufacturing a semiconductor device comprising:
forming two first gate electrodes along a first direction on a first surface of a semiconductor substrate and sourcedrain areas sandwiching a channel region under each of the first gate electrodes;
forming a first interlayer insulating layer to fill a region between the first gate electrodes;
lowering a top of the first interlayer insulating layer;
depositing a second interlayer insulating layer on the first interlayer insulating layer and the first gate electrodes;
planarizing a surface of the second interlayer insulating layer; and
forming an interconnect layer in the second interlayer insulating layer and a contact plug in the first interlayer insulating layer and the second interlayer insulating layer so that the contact plug is in contact with the interconnect layer and one of the sourcedrain areas.
14. The method according to claim 13, further comprising:
covering an exposed portion of a top of one of the first gate electrodes with a first insulating layer before forming the first interlayer insulating layer; and
exposing the top of one of the first gate electrodes after forming the first interlayer insulating layer, exposing the top of one of the first gate electrodes involving lowering a top of the first interlayer insulating layer.
15. The method according to claim 14, further comprising forming a metal compound on the top of one of the first gate electrodes before the second interlayer insulating layer is deposited after exposing the top of one of the first gate electrodes.
16. The method according to claim 14, further comprising forming a second gate electrode on the first surface before forming the first interlayer insulating layer, and wherein covering the exposed portion of the top of one of the first gate electrodes with the first insulating layer involves covering the second gate electrode with the first insulating layer.
17. The method according to claim 13, wherein forming the contact plug includes:
forming a groove in an upper portion of the first interlayer insulating layer;
forming a hole, which is larger in size in a plane parallel to the first surface than the groove, in the second interlayer insulating layer to communicate with the groove and digging the groove down to the first surface to form a contact hole; and
filling the contact hole with a conductive material.
18. The method according to claim 17, further comprising:
covering an exposed portion of a top of one of the first gate electrodes with a first insulating layer before forming the first interlayer insulating layer; and
exposing the top of one of the first gate electrodes after forming the first interlayer insulating layer, exposing the top of one of the first gate electrodes involving lowering a top of the first interlayer insulating layer.
19. The method according to claim 18, further comprising forming a metal compound on the top of one of the first gate electrodes before the second interlayer insulating layer is deposited after exposing the top of one of the first gate electrodes.
20. The method according to claim 18, further comprising forming a second gate electrode on the first surface before forming the first interlayer insulating layer, and wherein covering the exposed portion of the top of one of the first gate electrodes with the first insulating layer involves covering the second gate electrode with the first insulating layer.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A composition suitable to be consumed by an animal, the composition comprising:
a plurality of active ingredients comprising pyruvate as a first active ingredient, niacin as a second active ingredient, riboflavin as a third active ingredient, ubiquinone as a fourth active ingredient, lipoic acid as a fifth active ingredient, thiamine as a sixth active ingredient, amidated arginine as a seventh active ingredient and amidated L-methionine as an eighth active ingredient;
wherein the concentration by weight of the first active ingredient (pyruvate) in the composition is greater than the concentration by weight of each one of the other active ingredients individually;
wherein the concentration by weight of amidated arginine in the composition is less than the concentration by weight of each of pyruvate, niacin, riboflavin, ubiquinone, and lipoic acid individually; and
wherein the concentration by weight of amidated L-methionine in the composition is less than the concentration by weight of each of pyruvate, niacin, riboflavin, ubiquinone, and lipoic acid individually.
2. The composition of claim 1, wherein the composition comprises no creatine.
3. The composition of claim 1, further comprising creatine.
4. The composition of claim 3, wherein the concentration by weight of creatine in the composition is less than the concentration by weight of thiamine.
5. The composition of claim 1, further comprising amidated glycine.