1. A compound diethyl(R)-2-(1-(tert-butoxycarbonyl)pyrrolidin-3-yl)malonate.
2. A compound (R)-2-(1-(tert-butoxycarbonyl)pyrrolidin-3-yl)malonic acid.
3. A compound tert-butyl(R)-3-(2-hydroxyethyl)pyrrolidine-1-carboxylate.
4. A compound tert-butyl(R)-3-(2-iodoethyl)pyrrolidine-1-carboxylate.
5. A method of making tert-butyl(R)-3-vinylpyrrolidine-1-carboxylate through the intermediacy of one or more of diethyl(R)-2-(1-(tert-butoxycarbonyl)pyrrolidin-3-yl)malonate, (R)-2-(1-(tert-butoxycarbonyl)pyrrolidin-3-yl)malonic acid, tert-butyl(R)-3-(2-hydroxyethyl)pyrrolidine-1-carboxylate, and tert-butyl(R)-3-(2-iodoethyl)pyrrolidine-1-carboxylate.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. An offset correction circuit of an encoder sampling a first phase signal and second phase signal with phases differing from each other by about 90 degrees at the same timing, converting them from an analog to digital format, and detecting an angle signal based on the obtained digital signals, comprising:
offset detection circuits using a second phase AD converted value of when a first phase AD converted value is near a first value to find a second phase offset value, using a first phase AD converted value of when a second phase AD converted value is near a second value to find a first phase offset value, and using the currently found first offset value for the first value and the currently found second offset value for the second value when calculating the next first offset value and second offset value; and
a correction circuit using a first offset value and second offset value to correct offsets of the first phase signal and second phase signal.
2. An offset correction circuit as set forth in claim 1, wherein said offset detection circuits make the initial values of the first value and the second value zero.
3. An offset correction circuit as set forth in claim 1, wherein said offset detection circuits calculate the average value of the second phase positive AD converted value and second phase negative AD converted value when the first phase AD converted value is within a range set by a threshold value near the first value and detect said average value as a second phase offset value and calculate the average value of the first phase positive AD converted value and first phase negative AD converted value when the second phase AD converted value is within a range set by a threshold value near the second value and detect said average value as a first phase offset value.
4. An offset correction circuit as set forth in claim 3, wherein said offset values are values calculated from a plurality of positive AD converted values and a plurality of negative AD converted values.
5. An offset correction circuit as set forth in claim 4, wherein the positive AD converted value and the negative AD converted value for finding the average value are alternately updated.
6. An offset correction circuit as set forth in claim 1, wherein the correction circuit is comprised of subtraction circuits for subtracting from one phase AD converted value one phase offset value found by the offset detection circuit.