We claim:
1. A method for optimizing communication on a network comprising a master device and a slave device, each device utilizing TCP and IP protocols, the method comprising the steps of:
transmitting a request message from the master device, the request message having a first part;
transmitting a response message from the slave device, the response message being responsive to the first part of the request message; and,
limiting the request message and the response message to a length that is less than both a TCP transaction length and a maximum transmission unit.
2. The method of claim 1 wherein MODBUS is utilized as an application layer protocol.
3. The method of claim 2 further including:
designating a set of predetermined response messages comprising at least one predetermined response message, each predetermined response message being distinguishable by the first part of the request message; and,
selecting a predetermined response message in response to the first part of the request message wherein the predetermined response message is rapidly determined from the content of the first part of the request message for quickly responding to the request message.
4. The method of claim 3 wherein the set of predetermined response messages comprises a response message to an address resolution protocol request message.
5. The method of claim 3 wherein the set of predetermined response messages comprises a response message to an Internet control management protocol request message.
6. The method of claim 3 wherein the set of predetermined response messages comprises a response message to a TCP connection request message.
7. The method of claim 3 wherein the set of predetermined response messages comprises a response message to a TCP disconnect request message.
8. The method of claim 3 wherein the set of predetermined response messages comprises a response message to a MODBUS request message as a TCP data frame.
9. The method of claim 1 wherein the message is received exclusively on TCP port number 502.
10. The method of claim 9 further including ignoring any message that is not transmitted via a TCP port number 502.
11. A network communication system comprising:
a master device for initiating a request message;
a slave device being exclusively responsive to the request message of the master device; and,
an optimal protocol utilized to communicate the request message and the response message between the master and the slave devices, the optimal protocol comprising:
an IP protocol;
a TCP protocol; and,
an application layer protocol wherein the building and parsing of the response message is responsive to a first part of the request message.
12. The network communication system of claim 11 wherein the application layer protocol is MODBUS.
13. The network communication system of claim 11 wherein the response message is responsive to the content of the first part of the request message 14. The network communication system of claim 11 wherein the master device exclusively initiates the request message.
14. The network communication system of claim 11 wherein the master device exclusively initiates the request message.
15. The network communication system of claim 11 further comprising a set of predetermined response messages including at least one predetermined response message, each predetermined response message being distinguishable by the first part of the request message wherein the predetermined response message is determined from the content of the first part of the request message and rapidly selected for quickly responding to the request message.
16. The network communication system of claim 15 wherein the set of predetermined response messages comprises a response message to an address resolution protocol request message.
17. The network communication system of claim 15 wherein the set of predetermined response messages comprises a response message to an Internet control management protocol request message.
18. The network communication system of claim 15 wherein the set of predetermined response messages comprises a response message to a TCP connection request message.
19. The network communication system of claim 15 wherein the set of predetermined response messages comprises a response message to a TCP disconnect request message.
20. The network communication system of claim 15 wherein the set of predetermined response messages comprises a response message to a MODBUS request message as a TCP data frame.
21. The network communication system of claim 11 wherein each device limits its message to a length that is less than both a TCP transaction length and a maximum transmission unit.
22. The network communication system of claim 11 wherein the optimal protocol exclusively utilizes a TCP port number 502.
23. The network communication system of claim 22 wherein any message not transmitted via the TCP port number 502 is ignored.
24. A high performance Ethernet module comprising:
an Ethernet controller operably coupled to a network connection;
a control processing unit operably coupled to the Ethernet controller; and,
an optimal communication stack that executes on the control processing unit, the optimal communication stack being capable of simultaneously processing a TCP protocol, an IP protocol and an application layer protocol, the simultaneous processing further including building and parsing a communication message dependent upon a predetermined index of the message.
25. The Ethernet module of claim 24 wherein the application layer protocol is MODBUS.
26. The Ethernet module of claim 25 wherein the communication message is limited to a length that is less than both a TCP transaction length and a maximum transmission unit.
27. The Ethernet module of claim 24 wherein the optimal communication stack is configured to quickly provide a response message responsive to a request message.
28. The Ethernet module of claim 27 wherein the communication message further comprises the request message having a first portion and the response message being responsive to the first portion of the request message wherein the response message is determined from the content of the first portion of the request message and rapidly selected for responding to the request message.
29. The Ethernet module of claim 27 wherein the communication message is limited to a length that is less than both a TCP transaction length and a maximum transmission unit.
30. The Ethernet module of claim 24 wherein the communication protocol exclusively utilizes a TCP port number 502.
31. The Ethernet module of claim 24 wherein the control processing unit is operably coupled to a factory automation device.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A current source comprising:
a first stage coupled to an input current source, the first stage containing circuitry to receive an input current provided by the input current source;
a second stage coupled to the first stage, the second stage comprising:
a first transistor and a second transistor serially coupled together, wherein a first terminal of the second transistor is coupled to a second terminal of the first transistor;
a third transistor having a first terminal coupled to a third terminal of the first transistor; and
a level shifter coupled to a third terminal of the third transistor and the first terminal of the second transistor, the level shifter containing circuitry to elevate a voltage at a third terminal of the second transistor, wherein the level shifter is arranged in a source-follower configuration.
2. The current source of claim 1, wherein the level shifter comprises a fourth transistor having a first terminal coupled to the third terminal of the third transistor and a third terminal coupled to the first terminal of the second transistor.
3. The current source of claim 2, wherein the first, second, and third transistors are N-type MOSFET (metal-oxide semiconductor field-effect transistors), and wherein the fourth transistor is a P-type MOSFET.
4. The current source of claim 2, wherein a first current source is coupled between a substrate power supply and the first terminal of the third transistor and a second current source is coupled between the substrate power supply and the first terminal of the fourth transistor.
5. The current source of claim 4, wherein the first current source provides a first current that is approximately four times a second current provided by the second current source.
6. The current source of claim 1, wherein the level shifter comprises a plurality of transistors coupled in parallel, wherein each transistor has a first terminal coupled to the third terminal of the third transistor and a third terminal coupled to the first terminal of the second transistor.
7. The current source of claim 6, wherein each transistor in the plurality of transistors are P-type MOSFET (metal-oxide semiconductor field-effect transistors).
8. The current source of claim 6, wherein each transistor in the plurality of transistors have identical geometries.
9. The current source of claim 1, wherein the first stage comprises:
a fifth transistor and a sixth transistor serially coupled together, wherein a first terminal of the sixth transistor is coupled to a second terminal of the fifth transistor;
a seventh transistor having a first terminal coupled to a third terminal of the fifth transistor; and
a second level shifter coupled to a third terminal of the seventh transistor and the first terminal of the sixth transistor, the second level shifter containing circuitry to elevate a voltage at a third terminal of the sixth transistor.
10. The current source of claim 9, wherein the second level shifter is arranged in a source-follower configuration.
11. The current source of claim 9, wherein the second level shifter comprises an eighth transistor having a first terminal coupled to the third terminal of the seventh transistor and a third terminal coupled to the first terminal of the sixth transistor.
12. The current source of claim 11, wherein the fifth, sixth, and seventh transistors are N-type MOSFET (metal-oxide semiconductor field-effect transistors), and wherein the eighth transistor is a P-type MOSFET.
13. The current source of claim 11, wherein a third current source is coupled between a substrate power supply and the first terminal of the seventh transistor and a fourth current source is coupled between the substrate power supply and the first terminal of the eighth transistor.
14. The current source of claim 13, wherein the third current source provides a third current that is approximately four times a fourth current provided by the fourth current source.
15. The current source of claim 9, wherein the first terminal of the fifth transistor is coupled to the input current source.
16. The current source of claim 1, wherein the first terminal is a source terminal, the second terminal is a drain terminal, and the third terminal is a gate terminal.
17. A current source comprising:
a first stage coupled to an input current source, the first stage comprising:
a first transistor and a second transistor serially coupled together, wherein a first terminal of the second transistor is coupled to a second terminal of the first transistor;
a third transistor having a first terminal coupled to a third terminal of the first transistor;
a second level shifter coupled to a third terminal of the third transistor and the first terminal of the second transistor, the second level shifter containing circuitry to elevate a voltage at a third terminal of the second transistor;
the current source further comprising a second stage coupled to the first stage, the second stage comprising:
a fourth transistor and a fifth transistor serially coupled together, wherein a first terminal of the fifth transistor is coupled to a second terminal of the fourth transistor;
a sixth transistor having a first terminal coupled to a third terminal of the fourth transistor; and
a level shifter coupled to a third terminal of the sixth transistor and the first terminal of the fifth transistor, the level shifter containing circuitry to elevate a voltage at a third terminal of the fifth transistor, wherein the level shifter is arranged in a source-follower configuration.
18. The current source of claim 17, wherein the level shifter comprises a seventh transistor having a first terminal coupled to the third terminal of the sixth transistor and a third terminal coupled to the first terminal of the fifth transistor and wherein the second level shifter comprises an eighth transistor having a first terminal coupled to the third terminal of the third transistor and a third terminal coupled to the first terminal of the second transistor.
19. The current source of claim 18, wherein the seventh and the eighth transistors have identical geometries.
20. The current source of claim 17, wherein the level shifter comprises a plurality of transistors coupled in parallel, wherein each transistor has a first terminal coupled to the third terminal of the sixth transistor and a third terminal coupled to the first terminal of the fifth transistor and wherein the second level shifter comprises a second plurality of transistors coupled in parallel, wherein each transistor has a first terminal coupled to the third terminal of the third transistor and a third terminal coupled to the first terminal of the second transistor.
21. The current source of claim 20, wherein each transistor in the plurality of transistors and the second plurality of transistors have identical geometries.
22. The current source of claim 17, wherein the current source is used in a wireless device.
23. A current source comprising:
a first stage coupled to an input current source, the first stage containing circuitry to receive an input current provided by the input current source;
a second stage coupled to the first stage, the second stage comprising:
a first transistor and a second transistor serially coupled together, wherein a first terminal of the second transistor is coupled to a second terminal of the first transistor;
a level shifter coupled to a third terminal of the second transistor and a second terminal of the first transistor, the level shifter containing circuitry to elevate a voltage at the third terminal of the second transistor, wherein the level shifter is arranged in a source-follower configuration; and
a third transistor having a third terminal coupled to the level shifter.
24. The current source of claim 23, wherein the level shifter comprises a fourth transistor having a second terminal coupled to the third terminal of the second transistor and to the third terminal of the third transistor.
25. The current source of claim 24, wherein the first, second, and third transistors are P-type MOSFET (metal-oxide semiconductor field-effect transistors), and wherein the fourth transistor is an N-type MOSFET.
26. The current source of claim 24, wherein a first current source is coupled between a substrate ground and the fourth transistor.
27. The current source of claim 23, wherein the first terminal is a source terminal, the second terminal is a drain terminal, and the third terminal is a gate terminal.