1. Method for synchronizing a frequency of a client clock with a server clock frequency, such synchronization being performed through timing packets transmitted by the server towards the client through a telecommunication network, wherein the method comprises:
transmission, by the server, of groups of timing packets such that an emission timing packet period (\u03c41) is smaller than an emission group period (\u03c43),
the emission timing packet period (\u03c41) being a period of time between transmissions of successive timing packets within individual groups of timing packets from among the groups of timing packets,
the emission group period (\u03c43) being a period of time between transmissions of the timing packets that are transmitted first from each of successive groups from among the groups of timing packets,
the emission timing packet period (\u03c41) being such that transmission delays of timing packets within a same group are practically correlated, and
the emission group period (\u03c43) being such that transmission delays of timing packets from different groups are practically uncorrelated.
2. Method according to claim 1, further comprising:
using, by the client, an average (<\u03c41>) of timing packets inter-arrival times, measured between successive timing packets within a group, to estimate a distributed reference frequency (1\u03c4est).
3. Method according to claim 2, further comprising:
using, by the client, an average (<\u03c43>) of group inter-arrival times, measured between first timing packets of successive groups, to estimate the distributed reference frequency (1\u03c4est) through a weighted equation such as:
\u03c4
est
=
a
\xd7
\u2329
\u03c4
1
\u232a
N
+
(
1
–
a
)
\xd7
\u2329
\u03c4
3
\u232a
M
wherein N and M are integers, \u201ca\u201d is a weighting coefficient, <\u03c41> is an average of timing packets inter-arrival times, <\u03c43> is an average of group inter-arrival times and 1\u03c4est is an estimation of the distributed reference frequency.
4. Method according to claim 1 wherein each group comprises a pair of timing packets.
5. Method according to claim 4 wherein, to achieve a given timing packet bandwidth equivalent to a periodic transmission of timing packets with a period of T, the emission timing packet period \u03c41 and the emission group packet period \u03c43 are such that:
\u03c43=2\xd7T=\u03c41+\u03c42
wherein \u03c42 is an emission period measured between the last timing packet of a first group and the first timing packet of a successive group.
6. Method according to claim 1 wherein a function is used to determine the emission timing packet period (\u03c41) andor the emission group period (\u03c43) according to monitored queuing effects in the transmission of the timing packets between the server and the client.
7. Method according to claim 6 wherein the queuing effects are monitored according to a Deviation Lag function (DLF).
8. Method according to claim 1 wherein groups of timing packets are transmitted by sets so that the emission group period (\u03c43) is smaller than an emission set period, measured between successive sets of groups.
9. A server comprising:
a clock aimed to synchronize in frequency a client clock through timing packets transmitted via a telecommunication network,
wherein the server is configured to transmit groups of timing packets such that an emission timing packet period (\u03c41) is smaller than an emission group period (\u03c43),
the emission timing packet period (\u03c41) being a period of time between transmissions of successive timing packets within individual groups of timing packets from among the groups of timing packets,
the emission group period (\u03c43) being a period of time between transmissions of the timing packets that are transmitted first from each of successive groups from among the groups of timing packets,
the emission timing packet period (\u03c41) being such that transmission delays of timing packets within a same group are practically correlated, and
the emission group period (\u03c43) being such that transmission delays of timing packets from different groups are practically uncorrelated.
10. A client terminal comprising:
a clock to be frequency synchronized through timing packets transmitted by a server clock through a telecommunication network,
wherein the client is configured to filter and use groups of timing packets for synchronization such that timing packets inter-arrival periods are smaller than group inter-arrival periods,
each timing packet inter-arrival periods being a period of time between transmissions of successive timing packets within individual groups of timing packets from among the groups of timing packets,
each group inter-arrival period being a period of time between transmissions of the timing packets that are transmitted first from each of successive groups from among the groups of timing packets,
the timing packets inter-arrival periods being such that transmission delays of timing packets within a same group being practically correlated, and
the group inter-arrival periods being such that transmission delays of timing packets from different groups being practically uncorrelated.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. An integrated circuit, comprising:
A. a shift register;
B. a test bus;
C. plural target circuits; and
D. plural test interfaces separate from the shift register and coupled between the test bus and the respective target circuits, each test interface having a select output for coupling the register with the test bus.
2. The circuit of claim 1 in which the test bus includes a test data input lead and a test data output lead, each test interface connects to the test data input and is selectively coupled to the test data output, and the shift register is located outside of the target circuits and the test interfaces.
3. The circuit of claim 1 including a test access port linking module that includes the shift register and that receives the select outputs from the test interfaces, the linking module including control circuits selectively coupling the shift register with the test bus in response to receiving a select output.
4. The circuit of claim 1 including a test access port linking module that includes the shift register and that receives the select outputs from the test interfaces, the linking module including an enable output connected to each test interface.
5. The circuit of claim 1 in which the shift register is a two bit register.
6. The circuit of claim 1 in which the test bus includes a test data in lead, a test data out lead, a test clock in lead, and a test mode select lead.
7. The circuit of claim 1 in which each test interface includes a state machine coupled with an instruction register and a data register, and the data register is coupled with a target circuit.
8. The circuit of claim 1 including a state machine separate from the test interfaces and coupled with the test bus and the shift register.
9. The circuit of claim 1 including a first test access port controller including a state machine and having control outputs coupled to the shift register and in which each of the plural test interfaces include a test access port controller including a state machine, the test access port controllers of the plural test interfaces being separate from the first test access port controller.
10. The circuit of claim 1 in which the shift register includes a serial input and the test bus includes a serial test data input lead, the select output for coupling the serial input of the shift register to the serial test data input lead.
11. The circuit of claim 1 including a first test access port controller including a state machine and having control outputs coupled to the shift register and in which each of the plural test interfaces include a test access port controller including a state machine, the test access port controllers of the plural test interfaces being separate from the first test access port controller, the first test access port controller selected by the select output for controlling the shift register.