1. A method of optimizing a design to be formed on a substrate, comprising the steps of:
(a) determining a deviation between a first representation of the design and a second representation of an image of the design at each of a plurality of evaluation points for each section of a plurality of sections of the design;
(b) determining an amount of modification of the design at each section based on an evaluation of the plurality of evaluation points; and
(c) modifying the design at each section based on the amount determined step (b).
2. The method of optimizing the design, according to claim 1, further comprising the steps of:
(i) dividing the first representation of the design into the plurality of sections; and
(ii) dividing the second representation of the image of the design into a corresponding plurality of sections.
3. The method of optimizing the design, according to claim 1, further comprising the steps of:
(i) identifying a section type for each of the plurality of sections; and
(ii) determining whether each section type corresponds to a corner of the design.
4. The method of optimizing the design, according to claim 3, wherein when the section type corresponds to the corner, further comprising the step of not modifying the design at the section corresponding to the corner.
5. The method of optimizing the design, according to claim 3, wherein when the section type corresponds to the corner, further comprising the step of identifying whether the corner is a concave corner or a convex corner.
6. The method of optimizing the design, according to claim 5, wherein the corner is the concave corner, further comprising the steps of:
(i) determining a minimum deviation value from the plurality of evaluation points of the section; and
(ii) modifying the design at the section corresponding to the concave corner based on the minimum deviation value.
7. The method of optimizing the design, according to claim 5, wherein the corner is the convex corner, further comprising the steps of:
(i) determining a maximum deviation value from the plurality of evaluation points of the section; and
(ii) modifying the design at the section corresponding to the convex corner based on the maximum deviation value.
8. The method of optimizing the design, according to claim 1, further comprising the steps of:
(i) determining an evaluation method for each section of the plurality of sections according to each section type;
(ii) evaluating the deviation at each section based on the corresponding evaluation method identified in step (i);
(iii) modifying the design at each of the plurality of sections based on the results of step (ii).
9. The method of optimizing the design, according to claim 8, further comprising the step of identifying each section type of the plurality of sections.
10. The method of optimizing the design, according to claim 8, wherein each evaluation method is selected from a group consisting of minimum, maximum, middle, mean and median.
11. The method of optimizing the design, according to claim 1, for a given section of the plurality of sections, further comprising the steps of:
(i) determining the deviation at each of the evaluation points of the given section;
(ii) determining the deviation at each of a predetermined number of evaluation points of a section adjacent to the given section;
(iii) modifying the design at the given section based on an evaluation of the deviation at each of the evaluation points of step (i) and at each of the evaluation points of step (ii).
12. The method of optimizing the design, according to claim 11, further comprising the step of modifying the design at a corner section by an adjustment factor.
13. The method of optimizing the design, according to claim 1, for a given section, further comprising the steps of:
(i) evaluating the plurality of evaluation points of the given section by determining at least two deviation values comprising a first deviation value for the given section based on a first evaluation method and a second deviation value for the given section based on a second evaluation method;
(ii) determining a resulting deviation value based on the at least two deviation values; and
(iii) modifying the design at the given section based on a result of step (ii).
14. The method of optimizing the design, according to claim 13, wherein the first evaluation method is selected from a group consisting of minimum, maximum, middle, mean and median and the second evaluation method corresponds to a different method selected from the group.
15. The method of optimizing the design, according to claim 13, wherein the at least two deviation values further comprises a third deviation value for the given section based on a third evaluation method.
16. The method of optimizing the design, according to claim 15, wherein the first, second and third evaluation methods correspond to three methods selected from the group consisting of minimum, maximum, middle, mean and median.
17. The method of optimizing the design, according to claim 13, wherein step (ii) further comprises the step of determining the resulting deviation value by averaging the first deviation value and the second deviation value.
18. A computer program product, comprising executable code transportable by at least one machine readable medium, wherein execution of the code by at least one programmable computer causes the at least one programmable computer to perform a sequence of steps as in any one claims 1-17 for optimizing the design to be fabricated on the substrate.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A correction method being adapted to use a normalization circuit, including:
two input lines to which two signals are respectively input;
an addition section which adds offset signals to the two signals which have been respectively input to the two input lines;
a calculation section which divides the difference between the two signals to which the offset signals have been added in the addition section, by the sum of the two signals, to thereby perform normalization; and
an output line which outputs a signal representing the result of the normalization which has been obtained through the calculation section,
and to adjust the values of the offset signals of the normalization circuit to thereby correct the error of the normalization circuit, comprising:
a same-signal pair input step respectively inputting to the two input lines two signals of a same-signal pair that consists of the two signals each having the same signal waveform; and
a difference-adjusting step adjusting the difference between the values of the two offset signals in the addition section to thereby make the value of the signal output from the output line of the normalization circuit, the two input lines thereof having input thereto the two signals of the same-signal pair, fixed or coincide with a predetermined value.
2. The correction method according to claim 1, comprising:
a fixed-ratio-signal pair input step inputting to the two input lines, after the difference-adjusting step, two signals of a fixed-ratio-signal pair which consists of the two signals in which the ratio between the amplitudes of waveforms is fixed; and
an offset value-adjusting step adjusting each of the two offset signals while the difference between the values of the two offset signals is maintained as is, to thereby make the value of the signal output from the output line of the normalization circuit, the two input lines thereof having input thereto the two signals of the fixed-ratio-signal pair, fixed or coincide with a predetermined value.
3. The correction method according to claim 1, wherein the addition section of the normalization circuit is the one which can set the values of the offset signals only once; and
the difference-adjusting step uses, in substitution for the addition section, a replacement adder which adds the offset signals in place of the addition section; and
the correction method comprises
an offset value-setting step setting the values of the offset signals in the addition section such that they may have the same difference as that between the offset signals to which adjustment has been made by the replacement adder being used in the difference-adjusting step.
4. The correction method according to claim 2, wherein the addition section of the normalization circuit is the one which can set the values of the offset signals only once; and
the difference-adjusting step and the offset value-adjusting step use, in substitution for the addition section, a replacement adder which adds the offset signals in place of the addition section; and
the correction method comprises
an offset value-setting step setting the values of the offset signals in the addition section such that they may have the same difference as that between the offset signals to which adjustment has been made by the replacement adder being used in the offset value-adjusting step.
5. A correction circuit being adapted to use a normalization circuit, comprising:
two input lines to which two signals are respectively input;
an addition section which adds offset signals to the two signals which have been respectively input to the two input lines;
a calculation section which divides the difference between the two signals to which the offset signals have been added in the addition section, by the sum of the two signals, to thereby perform normalization; and
an output line which outputs an analog signal representing the result of the normalization which has been obtained through the calculation section,
and to adjust the values of the offset signals of the normalization circuit to thereby correct the error of the normalization circuit, comprising:
a testing signal input section which inputs testing signals to the two input lines; and
an adjusting section which adjusts the values of the offset signals in the addition section correspondingly to the value of the signal output from the output line,
wherein the testing signal input section inputs two signals of a same-signal pair consisting of the two testing signals each have the same signal waveform, and
wherein the adjusting section adjusts the difference between the values of the two offset signals in the addition section, to thereby make the value of the signal output from the output line of the normalization circuit, the two input lines thereof having input thereto the two signals of the same-signal pair, fixed or coincide with a predetermined value.
6. A light information storage apparatus being adapted to access a predetermined information storage medium by using a light, comprising:
a light emission section that emits a light;
a condenser section that causes a light emitted by the light emission section to be focused onto a surface of the predetermined information storage medium;
a light reception section that divides the light reflected by the information storage medium into a plurality of light rays and thereby outputs a plurality of reception light signals;
a normalization circuit that receives two sets of signals input via two input lines respectively, the two signals being obtained by adding up for each of two sets of signals the plurality of reception light signals output from the light receiving section and classified into the two sets of signals, adds offset signals respectively to the two signals input to the two input lines, divides by the sum of the two signals the difference between the two signals to which the offset signals have been added to thereby perform normalization, and outputs the signal representing the result of the normalization from an output line thereof; and
an adjusting section which, with two signals of a same-signal pair consisting of two signals each having the same signal waveform being input to the normalization circuit via the two input lines, adjusts the difference between the values of the two offset signals in the normalization circuit to thereby make the value of the signal output from the output line fixed or coincide with a predetermined value.