1. A liquid ejection head comprising:
a flow path unit which includes:
a plurality of liquid ejection ports arranged in a matrix form in a two-dimensional area of a parallelogram; and
a plurality of pressure chambers communicating with the plurality of liquid ejection ports, respectively, and each pressure chamber being long in a first direction,
wherein the flow path unit is long in a second direction,
wherein the second direction comprises a main scanning direction,
wherein each of the pressure chambers has a length in the second direction larger than a length in a direction orthogonal to the second direction, and
wherein the plurality of pressure chambers are arranged in a matrix form in a substantially same area as the two-dimensional area.
2. The liquid ejection head according to claim 1,
wherein the plurality of pressure chambers configure a plurality of pressure chamber columns along one of sides of the parallelogram, which has a larger acute angle with respect to the second direction.
3. The liquid ejection head according to claim 1, further comprising:
an actuator which includes:
a plurality of connection parts corresponding to the plurality of pressure chambers; and
a plurality of individual electrodes electrically connected to the connection parts, respectively, and arranged to face the pressure chambers, respectively, wherein the actuator is configured to apply ejection energy to liquid in a pressure chamber facing an individual electrode when a driving signal is supplied to the individual electrode from a corresponding connection part; and
a plurality of driving signal lines connected to the connection parts, respectively,
wherein the plurality of connection parts configure a plurality of connection part columns along one of sides of the parallelogram, which has a larger acute angle with respect to the second direction, and are arranged in a matrix form having an arrangement interval in the second direction larger than that in the direction orthogonal to the second direction, and
wherein the plurality of driving signal lines are drawn out, in a band-shaped area extending along the one of the sides between adjacent connection part columns, from the connection parts toward one end of the band-shaped area in a longitudinal direction of the band-shaped area.
4. The liquid ejection head according to claim 3,
wherein a plurality of the two-dimensional areas are provided, and
wherein a flexible printed circuit having the plurality of driving signal lines is drawn out from each of the two-dimensional areas along the direction orthogonal to the second direction.
5. The liquid ejection head according to claim 4,
wherein the plurality of two-dimensional areas are arranged such that the two-dimensional areas have the same position in the direction orthogonal to the second direction and are spaced at an equal interval in the second direction and sides thereof are parallel with each other.
6. The liquid ejection head according to claim 1,
wherein the first direction is parallel with the second direction.
7. The liquid ejection head according to claim 1,
wherein the first direction is orthogonal to one of sides of the parallelogram, which has a larger acute angle with respect to the second direction.
8. The liquid ejection head according to claim 1,
wherein the first direction is parallel with one of sides of the parallelogram, which has a smaller acute angle with respect to the second direction.
9. The liquid ejection head according to claim 2,
wherein in a direction along the one of sides of the parallelogram, a pressure chamber included in one of the pressure chamber columns is arranged at a center position of an interval between pressure chambers adjacent to each other included in a pressure chamber column adjacent to the one of the pressure chamber columns.
10. The liquid ejection head according to claim 1,
wherein all sides of the parallelogram are inclined with respect to the second direction.
11. The liquid ejection head according to claim 1,
wherein the plurality of liquid ejection ports are arranged at an equal interval in the second direction.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A package method of a Micro-Electro-Mechanical System (MEMS) chip comprising:
making a capping wafer by:
providing a first substrate; and
forming an etch stop layer on the first substrate; making a device wafer by:
providing a second substrate; and
forming a MEMS device and a material layer surrounding the MEMS device on the second substrate;
bonding the capping wafer and the device wafer;
after bonding, etching the first substrate to form at least one via;
etching the etch stop layer through the via; and
etching the material layer.
2. The method of claim 1, further comprising: forming a sealing layer on the first substrate.
3. The method of claim 2, wherein the sealing layer is made of a material including metal.
4. The method of claim 1, wherein the etch stop layer and the material layer are made of the same material.
5. The method of claim 1, wherein the etch stop layer and the material layer are made of a material including oxide.
6. The method of claim 5, wherein the etch stop layer and the material layer are etched by vapor hydrogen fluoride (HF).
7. The method of claim 1, wherein the step of making the device wafer further includes providing a bond pad on the material layer.
8. The method of claim 7, wherein the step of making the device wafer further includes depositing an insulation layer on the bond pad.
9. The method of claim 8, wherein the insulation layer includes silicon carbide (SiC) or amorphous silicon.
10. The method of claim 1, wherein the step of etching the first substrate includes inductive coupling plasma (ICP) etch.
11. The method of claim 1, further comprising: after bonding, reducing a thickness of the first substrate, the second substrate, or both, by grinding.
12. The method of claim 1, wherein the first substrate has a thickness between 100 \u03bcm\u02dc200 \u03bcm.
13. The method of claim 1, wherein the step of bonding the capping wafer and the device wafer includes: providing at least one bonding layer between the capping wafer and the device wafer to bond both wafers together.
14. The method of claim 13, wherein the step of bonding the capping wafer and the device wafer is by hermetical package or non-hermetical package.
15. The method of claim 14, wherein the hermetical package includes glass frit or solder.
16. The method of claim 15, wherein when the hermetical package includes solder, the at least one bonding layer is made of a material including metal or one of the following alloys: aluminum-silicon alloy, silicon-gold alloy, tin-silver alloy, gold-germanium alloy, gold-tin alloy, and lead-tin alloy.
17. The method of claim 14, wherein when the step of bonding the capping wafer and the device wafer is by non-hermetical package, the at least one bonding layer is made of a material including photosensitive polymer.
18. The method of claim 14, wherein the at least one bonding layer is made of a material including one of the followings: parylene, PDMS (Polydimethylsiloxane), epoxy, or photo-imagable resin.
19. The method of claim 1, wherein the step of making the capping wafer includes:
before etching to form the via, defining a pattern of the etch stop layer, such that at least a portion of the etch stop layer covers a position of the via to be formed in the first substrate.
20. The method of claim 1, wherein the step of making the capping wafer includes:
before etching to form the via, defining a pattern on the first substrate, the pattern at least covering a position of the via to be formed in the first substrate;
etching the first substrate according to the pattern; and
forming the etch stop layer within the etched region of the first substrate.