1. An apparatus comprising:
a plurality of point-to-point interfaces to communicate with remote processing entities;
a plurality of trackers configured to function as a plurality of queues to store non-snoop read andor non-snoop write operations in order of reception and categorized by associated priority, the trackers to provide data coherency in a multi-node system including the remote processing entities, wherein the trackers are organized as a two-dimensional queue structure to resolve conflicts between conflicting read and write operations, the trackers to be utilized in processing both non-snoop and snoop operations; and
a control circuit coupled with the plurality of trackers to cause the highest priority, non-conflicted non-snoop readnon-conflicted non-snoop write operation to be performed.
2. The apparatus of claim 1 wherein at least one of the remote processing entities comprises a processing core.
3. The apparatus of claim 1 wherein at least one of the remote processing entities comprises a memory controller.
4. The apparatus of claim 1 wherein one or more of the trackers comprise a register.
5. The apparatus of claim 1 wherein the plurality of queues comprise:
a critical first in, first out (FIFO) queue;
a priority FIFO queue;
an ordered FIFO queue; and
an unordered queue.
6. A system comprising:
a dynamic random access memory (DRAM)
a plurality of point-to-point interfaces to communicate with remote processing entities;
a plurality of trackers configured to function as a plurality of queues to store non-snoop read andor non-snoop write operations in order of reception and categorized by associated priority, the trackers to provide data coherency in a multi-node system including the remote processing entities, wherein the trackers are organized as a two-dimensional queue structure to resolve conflicts between conflicting read and write operations, the trackers to be utilized in processing both non-snoop and snoop operations; and
a control circuit coupled with the plurality of trackers to cause the highest priority, non-conflicted non-snoop readnon-conflicted non-snoop write operation to be performed utilizing the DRAM.
7. The system of claim 6 wherein at least one of the remote processing entities comprises a processing core.
8. The system of claim 6 wherein at least one of the remote processing entities comprises a memory controller.
9. The system of claim 6 wherein one or more of the trackers comprise a register.
10. The system of claim 6 wherein the plurality of queues comprise:
a critical first in, first out (FIFO) queue;
a priority FIFO queue;
an ordered FIFO queue; and
an unordered queue.
11. A method comprising:
maintaining a plurality of tracking structures organized as at least two or more queues to store posted non-snoop memory access operations, the two or more queues having associated priorities, the trackers to provide data coherency in a multi-node system, wherein the trackers are organized as a two-dimensional queue structure to resolve conflicts between conflicting read and write operations, the trackers to be utilized in processing both non-snoop and snoop operations;
receiving a non-snoop memory access operation;
determining whether a posted non-snoop memory access operation conflicts with the received non-snoop memory access operation; and
halting processing of at least one higher priority queue in favor of a lower priority queue to resolve the conflict between the posted non-snoop memory access operation and the received non-snoop memory access operation.
12. The method of claim 11, wherein the two or more queues comprise:
a critical first in, first out (FIFO) queue;
a priority FIFO queue;
an ordered FIFO queue; and
an unordered queue.
13. The method of claim 11 wherein the two or more queues comprise one or more general-purpose trackers.
14. The method of claim 13 wherein one or more of the trackers comprise a register.
15. The method of claim 13 wherein one or more of the trackers comprise a memory location.
16. An article comprising a computer-readable medium having stored thereon instructions that, when executed, cause one or more processors to:
maintain a plurality of tracking structures organized as at least two or more queues to store posted non-snoop memory access operations, the two or more queues having associated priorities, the trackers to provide data coherency in a multi-node system, wherein the trackers are organized as a two-dimensional queue structure to resolve conflicts between conflicting read and write operations, the trackers to be utilized in processing both non-snoop and snoop operations;
receive a non-snoop memory access operation;
determine whether a posted non-snoop memory access operation conflicts with the received non-snoop memory access operation; and
halt processing of at least one higher priority queue in favor of a lower priority queue to resolve the conflict between the posted non-snoop memory access operation and the received non-snoop memory access operation.
17. The article of claim 16, wherein the two or more queues comprise:
a critical first in, first out (FIFO) queue;
a priority FIFO queue;
an ordered FIFO queue; and
an unordered queue.
18. The article of claim 17 wherein the two or more queues comprise one or more general-purpose trackers.
19. The article of claim 18 wherein one or more of the trackers comprise a register.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A liquid additive for CMP abrasive comprising a dispersant and water, wherein the dispersant is one of a polyammonium-acrylate or a polyamine-acrylate and has a weight average molecular weight of 1,000 to 100,000, and wherein the liquid additive contains 1 to 10% by weight of the dispersant.
2. The liquid additive for CMP abrasive of claim 1, wherein the dispersant has a weight average molecular weight of 10,000 to 40,000.
3. A liquid additive for CMP abrasive comprising a dispersant and water, wherein the dispersant is a polymer dispersant, wherein said polymer dispersant is a polymer containing ammonium acrylate as a copolymerized ingredient, a polyammonium-acrylate or a polyamine-acrylate and has a weight average molecular weight of 1,000 to 100,000, and wherein the liquid additive contains 1 to 10% by weight of the dispersant and is pH 4 to 8.
4. The liquid additive for CMP abrasive of claim 3, wherein the dispersant is one of a polyammonium-acrylate or a polyamine-acrylate.
5. A liquid additive for CMP abrasive comprising a dispersant and water, wherein the dispersant is one of a polyammonium-acrylate or a polyamine-acrylate and has a molecular weight distribution (weight average molecular weightnumber average molecular weight) of 1.005 to 1.300, and wherein the liquid additive contains 1 to 10% by weight of the dispersant and is pH 4 to 8.
6. A liquid additive for CMP abrasive comprising a dispersant and water, wherein the dispersant is one of a polyammonium-acrylate or a polyamine-acrylate and contains 10 mol % or less of free ammonia or a free amine, which does not form a salt, and wherein the liquid contains 1 to 10% by weight of the dispersant and is pH 4 to 8.
7. A liquid additive for CMP abrasive comprising a dispersant and water, wherein the dispersant is one of a polyammonium-acrylate or a polyamine-acrylate, and wherein the liquid additive contains 1 to 10% by weight of the dispersant, is pH 4 to 8 and has a viscosity of 1.20 to 2.50 mPas.
8. A liquid additive for CMP abrasive comprising a dispersant and water, wherein the dispersant is a polymer dispersant, wherein said polymer dispersant is a polymer containing ammonium acrylate as a copolymerized ingredient, a polyammonium-acrylate or a polyamine-acrylate, and has a weight average molecular weight of 10,000 to 40,000, and wherein the liquid additive contains 1 to 10% by weight of the dispersant and is pH 4 to 8.
9. The liquid additive for CMP abrasive of claim 8, wherein the dispersant is one of a polyammonium-acrylate or a polyamine-acrylate.