1. A liquid crystal (LC) panel, comprising:
a plurality of thin film transistors (TFTs);
scan lines;
data lines;
a scan driving chip that drives the scan lines; and
a data driving chip that drives the data lines;
wherein the data lines and the scan lines crisscrossed each other; gate electrodes of each row of TFTs are connected with one scan line, source electrodes of each column of TFTs are connected with one data line, and a drain electrode of each of the TFTs is connected with a pixel electrode; the scan driving chip comprises a compensation driving unit coupled to the scan lines;
the compensation driving unit drives the TFTs corresponding to a next-row of scan line to turn on when the scan driving chip drives the TFTs corresponding to a current-row of scan line to turn on or after the scan driving chip drives the TFTs corresponding to the current-row of scan line to turn on; the compensation driving unit drives the TFTs corresponding to the next-row of scan line to turn off when the TFTs corresponding to the current-row of scan line receive a data signal of the data driving chip or before the TFTs corresponding to the current-row of scan line receive the data signal of the data driving chip.
2. The LC panel of claim 1, wherein a second switch unit is connected between each of the data lines and the data driving chip, and a control end of the second switch unit is coupled to a second driving unit; the second driving unit drives the second switch unit to turn on after a preset delay time when the scan driving chip drives the TFTs corresponding to the current-row of scan line to turn on or after the scan driving chip drives the TFTs corresponding to the current-row of scan line to turn on; the TFTs corresponding to the current-row of scan line receive the data signal of the data driving chip through the second switch unit after the preset delay time; the next-row of scan line drives the corresponding TFTs to turn off when the preset delay time ends or before the preset delay time ends.
3. The LC panel of claim 1, further comprising a first switch unit, and a control end of the first switch unit is coupled to a first driving unit, the first switch unit is connected between adjacent data lines;
wherein the first driving unit drives the first switch unit to turn on when the scan driving chip drives the TFTs corresponding to the current-row of scan line to turn on or after the scan driving chip drives the TFTs corresponding to the current-row of scan line to turn on; the first driving unit drives the first switch unit to turn off when the TFTs corresponding to the current-row of scan line receive the data signal of the data driving chip or before the TFTs corresponding to the current-row of scan line receive the data signal of the data driving chip.
4. The LC panel of claim 3, wherein the first switch unit is connected between each of the data lines and one of the adjacent data lines.
5. The LC panel of claim 4, wherein a second switch unit is connected between each of the data lines and the data driving chip, and a control end of the second switch unit is coupled to a second driving unit; the second driving unit drives the second switch unit to turn on at a preset delay time when the scan driving chip drives the TFTs corresponding to the current-row of scan line to turn on or after the scan driving chip drives the TFTs corresponding to the current-row of scan line to turn on; the TFTs corresponding to the current-row of scan line receive the data signal of the data driving chip through the second switch unit after the preset delay time; the next-row of scan line drives the corresponding TFTs to turn off when the corresponding TFTs to turn off when the preset delay time ends or before the preset delay time ends.
6. A method for driving a liquid crystal (LC) panel, the LC panel comprising a plurality of thin film transistors (TFTs), scan lines, data lines, a scan driving chip that drives the scan lines, and a data driving chip that drives the data lines; the data lines and the scan lines crisscrossing with each other; gate electrodes of each row of TFTs being connected with one scan line, source electrodes of each column of TFTs being connected with one data line, and a drain electrode of each of the TFTs being connected with a pixel electrode; the scan driving chip comprising a compensation driving unit coupled to the scan lines; the method comprising:
step A: controlling the scan driving chip to drive the TFTs corresponding to a current-row of scan line to turn on;
step B: controlling the scan driving chip to drive the TFTs corresponding to a next-row of scan line to turn on; and
step C: determining whether the TFTs corresponding to the current-row of scan line receive the data signal, and driving the TFTs corresponding to the next-row of scan line to turn off when the TFTs corresponding to the current-row of scan line receive a data signal of the data driving chip or before the TFTs corresponding to the current-row of scan line receive the data signal of the data driving chip.
7. The method for driving the LC panel of claim 6, wherein a second switch unit is connected between each of the data lines and the data driving chip; the method further comprising a step A1 before the step A, comprising:
controlling the second switch unit to turn off;
the step C comprises:
controlling the second switch unit to turn on after the preset delay time, and determining whether the TFTs corresponding to the current-row of scan line receive the data signal.
8. The method for driving the LC panel of claim 6, wherein a first switch unit is connected between adjacent data lines; the step B comprises:
controlling the first switch unit to turn on;
the step C further comprises:
determining whether the TFTs corresponding to the current-row of scan line receive the data signal of the data driving chip, and controlling the first switch unit to turn off when the TFTs corresponding to the current-row of scan line receive the data signal of the data driving chip or before the TFTs corresponding to the current-row of scan line receive the data signal of the data driving chip.
9. The method for driving the LC panel of claim 8, wherein the step B further comprises:
controlling the first switch unit to turn on, and controlling the scan driving chip to drive the TFTs corresponding to the next-row of scan line to turn on after the first switch unit turns off.
10. The method for driving the LC panel of claim 9, wherein a second switch unit is connected between each of the data lines and the data driving chip; the method further comprising a step A1 before the step A, comprising:
controlling the second switch unit to turn off;
the step C comprises:
controlling the second switch unit to turn on after the preset delay time, and determining whether the TFTs corresponding to the current-row of scan line receive the data signal.
11. The method for driving the LC panel of claim 8, wherein the step B further comprises:
controlling the scan driving chip to drive the TFTs corresponding to the next-row of scan line to turn on, and controlling the first switch unit to turn on after the scan driving chip drives the TFTs corresponding to the next-row of scan line to turn on.
12. The method for driving the LC panel of claim 11, wherein a second switch unit is connected between each of the data lines and the data driving chip; the method further comprising a step A1 before the step A, comprising:
controlling the second switch unit to turn off;
the step C comprises:
controlling the second switch unit to turn on after the preset delay time, and determining whether the TFTs corresponding to the current-row of scan line receive the data signal.
13. The method for driving the LC panel of claim 8, wherein the step B further comprises:
controlling the scan driving chip to drive the TFTs corresponding to the next-row of scan line to turn on, and simultaneously controlling the first switch unit to turn on.
14. The method for driving the LC panel of claim 13, wherein a second switch unit is connected between each of the data lines and the data driving chip; the method further comprising a step A1 before the step A, comprising:
controlling the second switch unit to turn off;
the step C comprises:
controlling the second switch unit to turn on after the preset delay time, and determining whether the TFTs corresponding to the current-row of scan line receive the data signal.
15. A liquid crystal (LC) panel, comprising:
scan lines;
data lines;
a scan driving chip that drives the scan lines; and
a data driving chip that drives the data lines;
wherein the data lines and the scan lines crisscross with each other; the scan driving chip comprises a compensation driving unit coupled to the scan lines; time of driving each of the scan lines is one scanning interval in one frame picture of the LC panel; the compensation driving unit outputs a first driving signal and a second driving signal in one scanning interval of each of the scan lines, the first driving signal and the second driving signal drive thin film transistor (TFTs) to turn on;
the compensation driving unit outputs the first driving signal of a next-row of scan line when the compensation driving unit outputs the second driving signal of a current-row of scan line or after the compensation driving unit outputs the second driving signal of the current-row of scan line; and the compensation driving unit terminates output of the first driving signal of the next-row of scan line when the TFTs corresponding to the current-row of scan line receive the data signal of the data driving chip or before the TFTs corresponding to the current-row of scan line receive the data signal of the data driving chip; when output of the second driving signal of the current-row of scan line is terminated, the compensation driving unit outputs the second driving signal of the next-row of scan line.
16. LC panel of claim 15, wherein it second switch unit is connected between each of the data lines and the data driving chip, and a control end of the second switch unit is coupled to a second driving unit; the second driving unit drives the second switch unit to turn on at a preset delay time when the scan driving chip drives the TFTs corresponding to the current-row of scan line to turn on or after the scan driving chip drives the TFTs corresponding to the current-row of scan line to turn on; the TFTs corresponding to the current-row of scan line receive the data signal of the data driving chip through the second switch unit after the preset delay time; the next-row of scan line drives the corresponding TFTs to turn off when the corresponding TFTs to turn off when the preset delay time ends or before the preset delay time ends.
17. The LC panel of claim 15, further comprising a first switch unit, and a control end of the first switch unit is coupled to a first driving unit, the first switch unit is connected between adjacent data lines;
wherein the first driving unit drives the first switch unit to turn on when the scan driving chip drives the TFTs corresponding to the current-row of scan line to turn on or after the scan driving chip drives the TFTs corresponding to the current-row of scan line to turn on; the first driving unit drives the first switch unit to turn off when the TFTs corresponding to the current-row of scan line receive the data signal of the data driving chip or before the TFTs corresponding to the current-row of scan line receive the data signal of the data driving chip.
18. The LC panel of claim 17, wherein the first switch unit is connected between each of the data lines and one of the adjacent data lines.
19. The LC panel of claim 18, wherein a second switch unit is connected between each of the data lines and the data driving chip, and a control end of the second switch unit is coupled to a second driving unit; the second driving unit drives the second switch unit to turn on at a preset delay time when the scan driving chip drives the TFTs corresponding to the current-row of scan line to turn on or after the scan driving chip drives the TFTs corresponding to the current-row of scan line to turn on; the TFTs corresponding to the current-row of scan line receive the data signal of the data driving chip through the second switch unit after the preset delay time; the next-row of scan line drives the corresponding TFTs to turn off when the corresponding TFTs to turn off when the preset delay time ends or before the preset delay time ends.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A method of initializing a disk surface included in a disk in an assembled hard disk drive, comprising the steps:
determining a voice coil motor control contribution and a voice coil motor plant contribution to a Repeatable Run-Out (RRO) corrector function of a track on said disk surface;
determining a micro-actuator control contribution to said RRO corrector function of said track on said disk surface; and
writing the parameters of said RRO corrector function for said track to said disk surface to create a written-in RRO corrector function parameter list on said disk surface included in a hard disk drive;
wherein said parameters of said RRO corrector function, include:
at least one parameter for said voice coil motor control contribution;
at least one parameter for said voice coil motor plant contribution; and
at least one parameter for said micro-actuator control contribution;
wherein said hard disk drive includes a voice coil motor and a micro-actuator contributing to at least the lateral position of a read-write head to said track on said disk surface.
2. The method of claim 1, further comprising the step:
determining a micro-actuator plant contribution to said RRO corrector function of said track on said disk surface.
3. The method of claim 2, wherein said parameters of said RRO corrector function, further include:
at least one parameter for said micro-actuator plant contribution.
4. The method of claim 1, for each of said tracks for use in data access on said disk surface, further comprising:
determining said voice coil motor control contribution and said voice coil motor plant contribution to said RRO corrector function of said track;
determining said micro-actuator control contribution to said RRO corrector function of said track; and
writing the parameters of said RRO corrector function for said track to said disk surface.
5. The method of claim 4, wherein said disk includes a second disk surface; and
wherein said method further comprises, for each track for use in data access on said second disk surface, further comprises the steps:
determining said voice coil motor control contribution and said voice coil motor plant contribution to said RRO corrector function of said track on said second disk surface;
determining said micro-actuator control contribution to said RRO corrector function of said track on said second disk surface; and
writing the parameters of said RRO corrector function for said track to said second disk surface.
6. An embedded circuit included in the assembled hard disk drive implementing the method of claim 1, comprising:
a servo computer accessibly coupled to a servo memory and directed by a burn-in program system, comprising program steps residing in said servo memory;
wherein said burn-in program system, comprises the program steps:
determining said voice coil motor control contribution and said voice coil motor plant contribution to said RRO corrector function of said track on said disk surface;
determining said micro-actuator control contribution to said RRO corrector function of said track on said disk surface; and
writing the parameters of said RRO corrector function for said track to said disk surface.
7. The hard disk drive including said disk surface containing said written-in RRO corrector parameter list, as a product of the process of claim 1.
8. A method of using said written-in RRO corrector parameter list in said hard disk drive of claim 7, comprising the steps:
acquiring said written-in RRO corrector parameter list for said track from said disk surface to recreate said voice coil motor control contribution, said voice coil motor plant contribution, and said micro-actuator control contribution, each for said track used for data access on said disk surface;
controlling actuation of said hard disk drive using said RRO corrector function for said track, based upon said voice coil motor control contribution, said voice coil motor plant contribution, and said micro-actuator control contribution, further comprising the steps:
calculating the RRO corrector filter based upon
said micro-actuator control contribution applied to a micro-actuator control queue,
said voice coil motor control contribution applied to a voice coil motor control queue, and
said voice coil motor plant contribution applied to a voice coil motor plant queue,
to create the RRO micro-actuator control corrector value, and the RRO voice coil assembly corrector value;
calculating the RRO corrector value as said RRO micro-actuator control corrector value added to said RRO voice coil assembly corrector value;
calculating the Position Error Signal (PES) post-RRO as the PES pre-RRO minus said RRO corrector value;
performing Non-Repeatable Run-Out (NRRO) control based upon said PES post-RRO and updating said micro-actuator control queue, said voice coil motor control queue, and said voice coil motor plant queue;
wherein said hard disk drives operates in a single stage actuation mode when said micro-actuator control queue is updated with zero and otherwise operates in a dual stage actuation mode.
9. The method of claim 8, wherein the step calculating said RRO corrector filter, further comprises the steps:
calculating said micro-actuator control contribution applied to a micro-actuator control queue to create the RRO micro-actuator control corrector value;
calculating said voice coil motor control contribution applied to a voice coil motor control queue to create the RRO voice coil motor control corrector value;
calculating said voice coil motor plant contribution applied to a voice coil motor plant queue to create the RRO voice coil motor plant corrector value; and
calculating the RRO voice coil assembly corrector value as said RRO voice coil motor control corrector value added to said RRO voice coil motor plant corrector value.
10. The method of claim 8, further comprising at least one member of the group consisting of the steps:
following said track in said single stage actuation mode; and
following said track in said dual stage actuation mode.
11. The method of claim 10, wherein the step following said track in said single stage actuation mode, further comprises the step:
following said track in said single stage actuation mode, when the micro-actuator is damaged.
12. The method of claim 8, wherein said parameters of said RRO corrector function, further include: at least one parameter for a micro-actuator plant contribution; and
wherein the step calculating said RRO corrector filter, further comprises the step:
calculating the RRO corrector filter based upon
said micro-actuator plant contribution applied to a micro-actuator plant queue,
said micro-actuator control contribution applied to a micro-actuator control queue,
said voice coil motor control contribution applied to a voice coil motor control queue, and
said voice coil motor plant contribution applied to a voice coil motor plant queue,
to create the RRO micro-actuator control corrector value, and the RRO voice coil assembly corrector value;
wherein the step performing NRRO control, further comprises the step:
updating said micro-actuator plant queue.
13. The method of claim 12, wherein the step calculating said RRO filter, further comprises the steps:
calculating said micro-actuator plant contribution applied to a micro-actuator plant queue to create the RRO micro-actuator plant corrector value;
calculating said micro-actuator control contribution applied to a micro-actuator control queue to create the RRO micro-actuator control corrector value;
calculating said voice coil motor control contribution applied to a voice coil motor control queue to create the RRO voice coil motor control corrector value;
calculating said voice coil motor plant contribution applied to a voice coil motor plant queue to create the RRO voice coil motor plant corrector value; and
calculating the RRO voice coil assembly corrector value as said RRO voice coil motor control corrector value added to said RRO voice coil motor plant corrector value added to said RRO micro-actuator plant corrector value.
14. The method of claim 8, wherein said hard disk drive includes a second micro-actuator further contributing to the lateral position of said read-write head to said track on said disk surface;
wherein said parameters of said RRO corrector function for said track on said disk surface, further include: at least one parameter for a second micro-actuator control contribution;
wherein the step acquiring said written-in RRO corrector parameter list, further comprises the step:
acquiring said written-in RRO corrector parameter list for said track from said disk surface to recreate said second micro-actuator control contribution for said track;
wherein the step calculating said RRO corrector filter, further comprises the step:
calculating said RRO corrector filter based upon
said second micro-actuator control contribution applied to a micro-actuator control queue,
said micro-actuator control contribution applied to a micro-actuator control queue,
said voice coil motor control contribution applied to a voice coil motor control queue, and
said voice coil motor plant contribution applied to a voice coil motor plant queue,
to create the RRO second micro-actuator control corrector value, said RRO micro-actuator control corrector value, and said RRO voice coil assembly corrector value;
wherein the step calculating said RRO corrector value, further comprises the step:
calculating said RRO corrector value as said RRO second micro-actuator control corrector value added to said RRO micro-actuator control corrector value added to said RRO: voice coil assembly corrector value;
wherein the step performing NRRO control, further comprises the step:
updating said second micro-actuator control queue;
wherein said hard disk drive operates in said single stage actuation mode when said micro-actuator control queue is updated with zero and said second micro-actuator control queue is updated with zero;
wherein said hard disk drive operates in said dual stage actuation mode when one of said micro-actuator control queue and said second micro-actuator control queue is updated with zero; and
wherein said hard disk drive operates in said triple stage actuation mode when both of said micro-actuator control queue and said second micro-actuator control queue are updated with non-zero.
15. The method of claim 14,
wherein the step calculating said RRO corrector filter, further comprises the step:
calculating based upon said second micro-actuator control contribution applied to said second micro-actuator control queue to create said RRO second micro-actuator control corrector value.
16. The hard disk drive implementing the method of claim 8, comprising:
a servo controller driving a micro-actuator to laterally position a slider near said track on said disk surface to update said micro-actuator control queue;
said servo controller driving said voice coil motor to laterally position said slider close to said track on said disk surface to update said voice coil motor control queue and said voice coil motor plant queue.
17. The hard disk drive of claim 16, wherein said servo controller, further comprises:
a servo computer accessibly coupled to a servo memory and directed by a servo program system, including program steps residing in said servo memory;
wherein said servo program system, comprises the program steps:
acquiring said written-in RRO corrector parameter list for said track from said disk surface to recreate said voice coil motor control contribution, said voice coil motor plant contribution, and said micro-actuator control contribution, each for said track used for data access on said disk surface; and
controlling actuation of said hard disk drive using said RRO corrector function for said track, based upon said voice coil motor control contribution, said voice coil motor plant contribution, and said micro-actuator control contribution.
18. The hard disk drive of claim 16, wherein said servo controller further comprises:
means for calculating the RRO corrector filter based upon
said micro-actuator control contribution applied to said micro-actuator control queue,
said voice coil motor control contribution applied to said voice coil motor control queue, and
said voice coil motor plant contribution applied to said voice coil motor plant queue,
to create said RRO micro-actuator control corrector value, and said RRO voice coil assembly corrector value;
means for calculating said RRO corrector value as said RRO micro-actuator control corrector value added to said RRO voice coil assembly corrector value;
means for calculating said Position Error Signal (PES) post-RRO as said PES pre-RRO minus said RRO corrector value; and
means for performing Non-Repeatable Run-Out (NRRO) control based upon said PES post RRO and updating said micro-actuator control queue, said voice coil motor control queue, and said voice coil motor plant queue.
19. The hard disk drive of claim 18, wherein at least one of said means includes at least one instance of at least one member of the group consisting of a computer, a finite state machine, an inferential engine, and a neural network.
20. The method of claim 1,
wherein said hard disk drive includes a second micro-actuator further contributing to the lateral position of said read-write head to said track on said disk surface;
wherein said method, further comprises the step:
determining a second micro-actuator control contribution to said RRO corrector function of said track on said disk surface; and
wherein said parameters of said RRO corrector function for said track on said disk surface, further include: at least one parameter for said second micro-actuator control contribution.
21. The method of claim 20, further comprising the step:
determining a second micro-actuator plant contribution to said RRO corrector function of said track on said disk surface.
22. The method of claim 21, wherein said parameters of said RRO corrector function, further include:
at least one parameter for said second micro-actuator plant contribution.