1. A computer implemented system that facilitates operation of a component based application comprising a memory having stored therein the following computer executable components:
a graceful load fail over engine that provides real time information about missing or corrupted objects, to self heal the component based application for a proper read, validation, and execution thereof on a user’s machine, the graceful load fail over engine including a packet resolver component that determines availability of a component for an upload; and
a processor that executes the computer executable components.
2. The computer implemented system of claim 1, the graceful load fail over engine includes a detector component that detects a missing or corrupted reference.
3. The computer implemented system of claim 1, the graceful load fail over engine includes a notification component that notifies a user where to download the missing object or obtain additional information about resolving problems associated with the missing object.
4. The computer implemented system of claim 1, the graceful load fail over engine includes a monitor component that provides a process to install the missing objects.
5. The computer implemented system of claim 4, the monitor component supplies real-time hyper links to download the missing objects on the user’s machine.
6. The computer implemented system of claim 1, the packet resolver includes a metadata reader component to obtain information about missing data packets.
7. The computer implemented system of claim 1, the packet resolver includes an attribute identifying subsystem that identifies attributes of the missing data packets.
8. The computer implemented system of claim 1, the packet resolver includes an attribute populating subsystem that provides attributes for the missing data packets.
9. The computer implemented system of claim 1 further comprising an artificial intelligence component that facilitates operation of the graceful load fail over engine.
10. A method of self healing a component based application comprising:
detecting a missing object as part of a component based application;
determining availability of a component for an upload; and
supplying information about the missing object, to properly read, validate, and execute the component based application.
11. The method of claim 10 further comprising providing at least one of a dummy object or a stub in place of the missing object.
12. The method of claim 10 further comprising supplying information about the missing objects via a persistence infrastructure of the component based application.
13. The method of claim 10 further comprising persistently storing information about objects as part of an infrastructure of the component based application.
14. The method of claim 10 further comprising referring back to a persistence state to supply information about the missing object.
15. The method of claim 10 further comprising supplying various forms of streaming information for the missing objects.
16. The method of claim 15 further comprising providing a class definition for the missing objects.
17. A computer implemented system that facilitates operation of a component based application, comprising a memory having stored therein computer executable components and a processor that executes the following computer executable components:
means for providing real time information about missing objects, to self heal the component based application for a proper read, validation, and execution thereof on a user’s machine;
means for determining availability of a component for an upload; and
means for detecting the missing objects.
18. The computer implemented system of claim 17 further comprising means for notifying a user where to download the missing objects.
19. The computer implemented system of claim 17 further comprising means for monitoring the missing objects.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A method for manufacturing a thin film transistor, comprising:
forming a gate electrode on a substrate;
forming a gate insulating layer, a semiconductor material layer, a barrier material layer, and a metal wire material layer on the gate electrode;
forming a photoresist pattern on the metal wire material layer;
performing a first step of etching, using a first etchant, through the metal wire material layer, the barrier material layer, and the semiconductor material layer to form a metal wire pattern portion, a barrier pattern portion, and a semiconductor layer covering the gate electrode and a peripheral area of the gate electrode, respectively;
performing a second step of etching, using a second etchant, through a portion of the metal wire material layer and the barrier material layer that overlaps the gate electrode,
wherein the first etchant and the second etchant have different compositions,
wherein the second etchant includes a chloride-containing compound,
wherein the photoresist pattern covers the metal wire pattern portion overlapping the gate electrode during the first step of etching, and
wherein the first etchant is configured to etch the semiconductor material layer while the second etchant is configured not to etch the semiconductor material layer.
2. The method of claim 1, wherein the semiconductor layer is formed of an oxide semiconductor.
3. The method of claim 2, wherein:
the metal wire material layer includes a first metal layer and a second metal layer disposed on the first metal layer, and
wherein the first metal layer includes copper, and the second metal layer includes a copper manganese alloy.
4. The method of claim 1, wherein the semiconductor layer includes indium gallium zinc oxide (IGZO).
5. The method of claim 4, wherein the barrier material layer includes gallium zinc oxide (GZO).
6. The method of claim 1, wherein the first etchant includes ammonium persulfate (((NH4)2)S2O8), an azole-based compound, a water-soluble amine compound, a sulfonic acid-containing compound, a nitrate-containing compound, a fluorine-containing compound, and residual water.
7. The method of claim 6, wherein the second etchant includes ammonium persulfate (((NH4)2)S2O8), an azole-based compound, a water-soluble amine compound, a sulfonic acid-containing compound, an assistance oxidizer, a nitrate-containing compound, a phosphate-containing compound, and residual water.
8. The method of claim 7, wherein in the second etchant, the ammonium persulfate content is about 0.1 wt % to about 20 wt %, the azole-based compound content is about 0.01 wt % to about 2 wt %, the water-soluble amine compound content is about 0.1 wt % to about 5 wt %, the sulfonic acid-containing compound content is about 0.1 wt % to about 10 wt %, the assistance oxidizer content is about 0.1 wt % to about 2 wt %, and the nitrate-containing compound content is about 0.1 wt % to about 10 wt %.
9. The method of claim 8, wherein the phosphate-containing compound content is about 0.1 wt % to about 5 wt %, and the chloride-containing compound content is about 0.001 wt % to about 1 wt %.
10. The method of claim 1, wherein the exposing of the semiconductor layer disposed on an overlapping portion with the gate electrode includes forming a source electrode and a drain electrode facing each other with respect to the gate electrode.
11. A method for manufacturing a thin film transistor, comprising:
forming a gate electrode on a substrate;
forming a gate insulating layer, a semiconductor material layer, a barrier material layer, and a metal wire material layer on the gate electrode;
forming a photoresist pattern on the metal wire material layer;
performing a first step of etching, using a first etchant, through the metal wire material layer, the barrier material layer, and the semiconductor material layer to form a metal wire pattern portion, a barrier pattern portion, and a semiconductor layer covering the gate electrode and a peripheral area of the gate electrode, respectively;
performing a second step of etching, using a second etchant, through a portion of the metal wire material layer and the barrier material layer that overlaps the gate electrode,
wherein the first etchant and the second etchant have different compositions,
wherein the second etchant includes a chloride-containing compound,
wherein the photoresist pattern covers the metal wire pattern portion overlapping the gate electrode during the first step of etching, and
wherein the first etchant includes a fluorine-containing compound and omits a chloride-containing compound while the second etchant includes the chloride-containing compound and omits a fluorine-containing compound.
12. The method of claim 11, wherein the semiconductor layer is formed of an oxide semiconductor.
13. The method of claim 12, wherein:
the metal wire material layer includes a first metal layer and a second metal layer disposed on the first metal layer, and
wherein the first metal layer includes copper, and the second metal layer includes a copper manganese alloy.
14. The method of claim 11, wherein the semiconductor layer includes indium gallium zinc oxide (IGZO).
15. The method of claim 14, wherein the barrier material layer includes gallium zinc oxide (GZO).
16. The method of claim 11, wherein the first etchant includes ammonium persulfate (((NH4)2)S2O8), an azole-based compound, a water-soluble amine compound, a sulfonic acid-containing compound, a nitrate-containing compound, a fluorine-containing compound, and residual water.
17. The method of claim 16, wherein the second etchant includes ammonium persulfate (((NH4)2)S2O8), an azole-based compound, a water-soluble amine compound, a sulfonic acid-containing compound, an assistance oxidizer, a nitrate-containing compound, a phosphate-containing compound, and residual water.
18. The method of claim 17, wherein in the second etchant, the ammonium persulfate content is about 0.1 wt % to about 20 wt %, the azole-based compound content is about 0.01 wt % to about 2 wt %, the water-soluble amine compound content is about 0.1 wt % to about 5 wt %, the sulfonic acid-containing compound content is about 0.1 wt % to about 10 wt %, the assistance oxidizer content is about 0.1 wt % to about 2 wt %, and the nitrate-containing compound content is about 0.1 wt % to about 10 wt %.
19. The method of claim 18, wherein the phosphate-containing compound content is about 0.1 wt % to about 5 wt %, and the chloride-containing compound content is about 0.001 wt % to about 1 wt %.
20. The method of claim 11, wherein the exposing of the semiconductor layer disposed on an overlapping portion with the gate electrode includes forming a source electrode and a drain electrode facing each other with respect to the gate electrode.