1. A device comprising a porous polymeric structure composition, a disease-associated antigen, and a toll-like receptor (TLR) agonist, wherein said TLR agonist preferentially binds to TLR3.
2. The device of claim 1, wherein said disease-associated antigen comprises a tumor antigen.
3. The device of claim 1, wherein said polymeric structure composition comprises poly-lactide-co-glycolide (PLG).
4. The device of claim 1, wherein said TLR agonist comprises a TLR3 agonist.
5. The device of claim 1, wherein said TLR3 agonist comprises polyinosine-polycytidylic acid (poly I:C) or PEI-poly (I:C).
6. The device of claim 1, wherein said TLR agonist further comprises pathogen associated molecular patterns (PAMPs).
7. The device of claim 1, wherein said TLR agonist comprises a nucleic acid.
8. The device of claim 1, wherein said TLR agonist further comprises a TLR9 agonist.
9. The device of claim 8, wherein said TLR9 agonist comprises a cytosine-guanosine oligonucleotide (CpG-ODN) or a PEI-CpG-ODN.
10. The device of claim 1, wherein said device further comprises a recruitment composition.
11. The device of claim 11, wherein said recruitment composition comprises granulocyte macrophage colony stimulating factor (GM-CSF), Flt3L, or CCL20.
12. The device of claim 10, wherein said recruitment composition comprises encapsulated GM-CSF.
13. The device of claim 2, wherein said tumor antigen comprises a tumor lysate, purified protein tumor antigen, or synthesized tumor antigen.
14. The device of claim 6, wherein said PAMPs comprises a monophosphoryl lipid A (MPLA).
15. The device of claim 1, wherein said device comprises a combination of TLR agonists, said combination comprising a TLR3 agonist and a TLR9 agonist.
16. The device of claim 15, wherein said TLR3 agonist comprises poly (I:C) and said TLR9 agonist comprises CpG-ODN.
17. The device of claim 1, wherein said device comprises a combination of TLR agonists, said combination comprising a TLR3 agonist and a TLR4 agonist.
18. The device of claim 17, wherein said TLR3 agonist comprises poly (I:C) and said TLR4 agonist comprises MPLA.
19. The device of claim 1, wherein said TLR3 agonist is present in an amount to preferentially stimulate CD8+ dendritic cells or CD141+ dendritic cells.
20. A device comprising a polymeric structure composition, a tumor antigen, and a combination of TLR agonists, wherein said TLR agonist is selected from the group consisting of TLR1, TLR2, TLR3, TLR4, TLR5, TLR6, TLR7, TLR8, TLR9, TLR10, TLR11, TLR12, and TLR13.
21. A method for eliciting an anti-tumor immune response, comprising contacting or implanting into a subject device comprising a polymeric structure composition, a tumor antigen, and a TLR agonist, wherein said TLR agonist preferentially binds to TLR3.
22. The method of claim 21, wherein said TLR agonist comprises a TLR3 agonist.
23. The method of claim 21, wherein said TLR agonist comprises a TLR3 agonist and a TLR9 agonist.
24. The method of claim 21, wherein said anti-tumor immune response comprises activation of a CD8+ dendritic cell or a CD141+ dendritic cell.
25. The method of claim 23, wherein said anti-tumor immune response comprises activation of a plasmacytoid dendritic cell or a CD141+ dendritic cell.
26. The method of claim 23, wherein said anti-tumor immune response comprises a reduction in tumor burden.
27. The method of claim 21, wherein said TLR agonist is present at a concentration effective to induce production of interleukin-12 (IL-12) by dendritic cells.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A manufacturing method of a multilayer wiring board which includes a plurality of insulating layers, a plurality of conductive layers, a conductive non-through hole for electrically connecting the plurality of conductive layers to each other, and a capacitor produced by forming electrodes on upper and lower surfaces of at least one insulating layer containing a high-dielectric material, comprising at least:
the step of forming conductive patterns including one of the electrodes of the capacitor, the conductive patterns having a recessed portion between the conductive patterns;
the step of filling and hardening an insulating material different from the high-dielectric material in the recessed portion between the conductive patterns;
the step of planarizing the surfaces of the conductive patterns and the surface of the insulating material filled and hardened in the recessed portion between the conductive patterns by polishing, so as to form planarized surfaces of both the conductive patterns and the insulating material filled and hardened in the recessed portion between the conductive patterns;
the step of providing a high-dielectric material sheet in a semi-hardened state, said high-dielectric material sheet having the at least one insulating layer containing the high-dielectric material and a metal foil laminated thereto, and
the step of heating and laminating the high-dielectric material sheet in the semi-hardened state on the planarized surfaces of both the conductive patterns and the insulating material filled and hardened in the recessed portion, so that the at least one insulating layer of the high-dielectric material sheet is between (a) the conductive patterns and the insulating material filled and hardened in the recessed portion, and (b) the metal foil.
2. The manufacturing method of a multilayer wiring board according to claim 1, further comprising a step of forming a conductive pattern including another of the electrodes of the capacitor by etching the metal foil.
3. The manufacturing method of a multilayer wiring board according to claim 1, further comprising the step of forming an inductor in at least one of the conductive layers.
4. A semiconductor device wherein a semiconductor chip is mounted on a multilayer wiring board manufactured by a manufacturing method according to claim 1.
5. A wireless electronic device wherein a semiconductor device according to claim 4 is mounted.
6. The manufacturing method of a multilayer wiring board according to claim 1, wherein said recessed portion exposes an insulating structure underlying the conductive patterns, said insulating material being provided on the insulating structure.
7. The manufacturing method of a multilayer wiring board according to claim 1, wherein said conductive patterns are formed on an underlying substrate; and, subsequent to forming the conductive patterns, the insulating material is filled and hardened in said recessed portions.
8. The manufacturing method of a multilayer wiring board according to claim 7, wherein said recessed portions expose the underlying substrate on which the conductive patterns are formed, and said insulating material is provided on the underlying substrate.