1. A method for supplying a controllable current to a high intensity discharge lamp, comprising:
providing the controllable current to the high intensity discharge lamp, wherein the controllable current includes current waveform including an absolute value amplitude in each half cycle thereof that is generally constant during a first portion thereof and that increases non-linearly from the generally constant amplitude to a peak amplitude during a second portion thereof.
2. The method of claim 1, further comprising sensing a voltage across a pair of electrodes of the high intensity discharge lamp.
3. The method of claim 2, comprising controlling formation of protrusions from electrodes of the high intensity discharge lamp based upon the sensed voltage.
4. The method of claim 1, comprising altering at least one of frequency of the controllable current, and amplitude of the controllable current.
5. The method of claim 1, comprising altering the controllable current based on a measured voltage across the pair of electrodes.
6. A method for reducing changes in morphology of at least one electrode disposed within a high intensity discharge lamp, comprising:
sensing a voltage between a pair of electrodes of the high intensity discharge lamp; and
supplying a controllable current that defines a current waveform including an absolute value amplitude in each half cycle thereof that is generally constant at a non-zero value during a first portion thereof and that increases non-linearly from the generally constant amplitude to a peak amplitude during a second portion thereof to the high intensity discharge lamp to increase temperature at tip of the at least one electrode based upon the sensed voltage.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A thin film transistor substrate of a horizontal electric field type LCD, comprising:
a substrate;
a gate line and a common line disposed on the substrate and arranged parallel with each other;
a data line disposed on the substrate intersecting with the gate line and the common line, the data line insulated from the gate line and the common line by a gate insulating film therebetween, a pixel area being defined by the intersection of the data line with the gate line;
a thin film transistor disposed at the intersection of the data line and the gate line, and connected to the gate line and the data line;
a common electrode disposed having a portion extended into the pixel area and connected the common line;
a pixel electrode disposed having a portion extended into the pixel area and connected to the thin film transistor, wherein a horizontal electric field is formed by the pixel electrode and the common electrode;
a protective film disposed over the common electrode, pixel electrode, data line, gate line, common line, and the thin film transistor; and
at least one pad structure including a lower pad electrode and an upper pad electrode, wherein the lower pad electrode is connected to a respective one of the data line, gate line, and common line, and the upper pad electrode is disposed within a first contact hole defined through the protective film to contact the lower pad electrode such that the upper pad electrode is absent from the upper surface of the protective film.
2. The thin film transistor substrate of a horizontal electric field type LCD according to claim 1, wherein the at least one pad structure includes a gate pad, a common pad, and a data pad.
3. The thin film transistor substrate of a horizontal electric field type LCD according to claim 2, further comprises first to fourth contact holes defined through the protective film for the gate pad, common pad, data pad, pixel electrode, and a portion of a drain electrode, wherein a contact electrode disposed within at least one of the contact holes to contact a portion of the pixel electrode and the portion of the drain electrode such that the contact electrode is absent from the upper surface of the protective film.
4. The thin film transistor substrate of a horizontal electric field type LCD according to claim 3, further comprises a plurality of dummy transparent conductive pattern disposed within a plurality of stripper penetration paths defined through the protective film such that the plurality of dummy transparent conductive pattern are absent from the upper surface of the protective film.
5. The thin film transistor substrate of a horizontal electric field type LCD according to claim 4, wherein the plurality of stripper penetration paths are formed on at least respective one of the gate line, data line, common line, pixel electrode, and common electrode.
6. The thin film transistor substrate of a horizontal electric field type LCD according to claim 5, wherein the first to fourth contact holes and the plurality of stripper penetration paths are formed either through the gate insulating film and the protective film or through the protective film alone.
7. The thin film transistor substrate of a horizontal electric field type LCD according to claim 4, wherein the plurality of stripper penetration paths define a shape of a slit or a hole.
8. The thin film transistor substrate of a horizontal electric field type LCD according to claim 4, wherein a plurality of dummy transparent conductive pattern are contacted on at least respective one of the gate line, data line, common line, pixel electrode through the plurality of stripper penetration paths.
9. The thin film transistor substrate of a horizontal electric field type LCD according to claim 4, wherein an upper gate pad electrode, an upper common pad electrode, an upper data pad electrode, the contact electrode and the plurality of dummy transparent conductive pattern interface with the protective film.
10. The thin film transistor substrate of a horizontal electric field type LCD according to claim 1, further comprises a first storage capacitor including a first lower storage electrode disposed continuous with the gate line, a first upper storage electrode disposed overlapping the first lower storage electrode, wherein the gate insulating film is disposed between the first upper storage electrode and the first lower storage electrode, and the first upper storage electrode is connected to a drain electrode of the thin film transistor.
11. The thin film transistor substrate of a horizontal electric field type LCD according to claim 10, wherein the drain electrode has an extended portion that overlaps the extended portion of the pixel electrode, and the extended portion of the drain electrode is integrated with an extended portion of the first upper storage electrode.
12. The thin film transistor substrate of a horizontal electric field type LCD according to claim 10, further comprises a second storage capacitor including a second lower storage electrode disposed continuous with the common line and the common electrode, a second upper storage electrode disposed overlapping the second lower storage electrode, wherein the gate insulating film is disposed between the second upper storage electrode and the second lower storage electrode, and wherein the second upper storage electrode is disposed between the drain electrode and the first upper storage electrode.
13. The thin film transistor substrate of a horizontal electric field type LCD according to claim 12, wherein the second upper storage electrode extends from the first upper storage electrode and crosses the common line, wherein the second upper storage electrode overlaps a portion of the common electrodes connected to the common line, and wherein a portion of the second upper storage electrode is integrated with the drain electrode.
14. The thin film transistor substrate of a horizontal electric field type LCD according to claim 13, further comprises a semiconductor pattern of an active layer and an ohmic contact layer, the semiconductor pattern overlapping the data line, the lower data pad electrode, the first and second upper storage electrodes, source electrode, and the drain electrode.
15. The thin film transistor substrate of a horizontal electric field type LCD according to claim 1, wherein the pixel electrode is formed from a metal material identical to that of the gate line, common line, and the common electrode.
16. A method of fabricating a thin film transistor substrate of a horizontal electric field type LCD, comprising the steps of:
forming a gate metal pattern group including a gate line, a common line, a gate electrode, a common electrode, a pixel electrode, a lower gate pad electrode, and a lower common pad electrode on a substrate, wherein
the gate electrode is connected to the gate line, the common line is parallel with the gate line, the lower common pad electrode is connected to the common line, portions of the common electrode is extended from the common line into a pixel area, a portion of pixel electrode extended into the pixel area, and the extended portions of the pixel area and the common electrode form a horizontal electric field in the pixel area;
providing a gate insulating film on the substrate and the gate metal pattern group;
forming a semiconductor pattern including an active layer and an ohmic contact layer on the gate insulating film;
forming a sourcedrain metal group including a data line, a source electrode, a drain electrode, a lower pad electrode, a first upper storage electrode, and a second upper storage electrode on the semiconductor pattern, wherein
the data line crosses the gate line and the common line, the source electrode and the lower data pad electrode are connected to the data line, and the drain electrode is formed opposite to the source electrode;
providing a protective film on the sourcedrain metal group and the thin film transistor to protect the thin film transistor; and
patterning the protective film and the gate insulating film disposed on the substrate to provide first to fourth contact holes and forming a transparent conductive pattern group including an upper gate pad electrode, an upper common pad electrode, and upper data pad electrode, a contact electrode, wherein the transparent conductive pattern group is disposed within the first to fourth contact holes such that the transparent conductive pattern group is absent from the entire upper surface of the protective film.
17. The method according to claim 16, wherein the step of patterning the protective film and the gate insulating film includes:
forming a photo-resist pattern on the protective film using a mask; and
etching the protective film and the gate insulating film at portions where the photo-resist pattern is absent.
18. The method according to claim 17, wherein the step of patterning the transparent conductive pattern includes:
disposing a transparent conductive film on the photo-resist pattern disposed on the patterned protective film; and
removing the photo-resist pattern covered with the transparent conductive film.
19. The method according to claim 18, further comprising the steps of:
providing a plurality of stripper penetration paths to remove the photo-resist pattern formed on at least one of the gate line, data line, common line, pixel electrode, and the common electrode; and
forming a plurality of dummy transparent conductive pattern within the plurality of stripper penetration paths such that the plurality of dummy transparent conductive pattern are absent from the upper surface of the protective film.
20. The method according to claim 19, wherein the first to fourth contact holes and the plurality of stripper penetration paths are formed either through the gate insulating film and the protective film or through the protective film alone.
21. The method according to claim 19, wherein the plurality of stripper penetration paths define a shape of a slit and a hole.
22. The method according to claim 19, wherein the transparent conductive pattern group disposed within the first to fourth contact holes and the plurality of stripper penetration paths interface with the patterned protective film.
23. The method according to claim 19, wherein the plurality of dummy transparent conductive pattern are contacted on at least respective one of the gate line, data line, common line, pixel electrode through the plurality of stripper penetration paths.
24. The method according to claim 16, further comprising the step of forming a first lower storage electrode disposed continuous with the gate line, a first upper storage electrode disposed overlapping the first lower storage electrode, the gate insulating film and the semiconductor pattern are disposed between the first upper storage electrode and the first lower storage electrode, and the first upper storage electrode is connected to the drain electrode.
25. The method according to claim 24, wherein the pixel electrode includes an extended portion disposed parallel with an extended portion of the common electrode, wherein an extended portion of the drain electrode overlaps the extended portion of the pixel electrode, and wherein the extended portion of the drain electrode is integrated with an extended portion of the first upper storage electrode.
26. The method according to claim 24, further comprising the step of forming a second lower storage electrode continuous with the common electrode and the common line to be disposed between the first upper storage electrode and the drain electrode, wherein a second upper storage electrode overlaps the second lower storage electrode, and the gate insulating film and the semiconductor pattern are disposed between the second upper storage electrode and the second lower storage electrode.
27. The method according to claim 26, wherein the second upper storage electrode is an extended portion of the first upper storage electrode and is crossing the common line, wherein the second upper storage electrode overlaps a portion of the common electrodes connected to the common line, and a portion of the second upper storage electrode is integrated with the drain electrode.
28. The method according to claim 16, wherein the pixel electrode is formed from a metal material identical to that of the gate line, common line, and the common electrode.
29. A method of fabricating a thin film transistor substrate of a horizontal electric field type LCD, the method comprising:
a first mask process including forming a gate metal pattern group on a substrate including a gate line, a common line, a gate electrode, a common electrode, a pixel electrode, a lower common pad electrode, and a lower gate pad electrode, wherein
the gate electrode is connected to the gate line, the common line is parallel with the gate line, the lower common pad electrode is connected to the common line, portions of the common electrode is extended from the common line into a pixel area, a portion of pixel electrode extended into the pixel area, and the extended portions of the pixel area and the common electrode form a horizontal electric field in the pixel area;
a second mask process including disposing a gate insulating film on the gate metal pattern group, forming a semiconductor pattern including an active layer and an ohmic contact layer on the gate insulating film, forming a sourcedrain metal group including a data line, a source electrode, a drain electrode, a lower pad electrode, a first upper storage electrode, and a second upper storage electrode on the semiconductor pattern, wherein
the data line crosses the gate line and the common line, the source electrode and the lower data pad electrode are connected to the data line, and the drain electrode is formed opposite to the source electrode; and
a third mask process including disposing a protective film on the sourcedrain metal group and the thin film transistor, patterning the protective film and the gate insulating film to provide first to fourth contact holes, and forming a transparent conductive pattern group including an upper gate pad electrode, an upper common pad electrode, upper data pad electrode, a contact electrode.
30. The method according to claim 29, wherein said third mask process includes the steps of:
providing the protective film on the substrate;
forming a photo-resist pattern on the protective film using a mask;
patterning the protective film and the gate insulating film by the photo-resist pattern;
disposing a transparent conductive film on the photo-resist pattern; and
removing the photo-resist pattern covered with the transparent conductive film to pattern the transparent conductive film.
31. The method according to claim 30, wherein said third mask process further includes the steps of:
providing a plurality of stripper penetration paths passing through either the gate insulating film and the protective film or the protective film alone to remove the photo-resist pattern, wherein the plurality of stripper penetration paths are formed on at least respective one of the data line, gate line, common line, pixel electrode, and the common electrode; and
forming a plurality of dummy transparent conductive pattern within the plurality of stripper penetration paths such that the plurality of dummy transparent conductive pattern are absent from the upper surface of the protective film.
32. The method according to claim 31, wherein the plurality of dummy transparent conductive pattern are contacted on at least respective one of the gate line, data line, common line, pixel electrode through the plurality of stripper penetration paths.
33. The method according to claim 31, wherein the transparent conductive pattern group disposed within the first to fourth contact holes and the plurality of stripper penetration paths interface with the patterned protective film.
34. The method according to claim 29, wherein the second mask process further includes the step of forming a first lower storage electrode disposed continuous with the gate line, a first upper storage electrode disposed overlapping the first lower storage electrode, the gate insulating film and the semiconductor pattern disposed between the first upper storage electrode and the first lower storage electrode, wherein the first upper storage electrode is connected to the drain electrode.
35. The method according to claim 34, the pixel electrode includes an extended portion disposed parallel with an extended portion of the common electrode, wherein an extended portion of the drain electrode overlaps an extended portion of the pixel electrode, and wherein the extended portion of the drain electrode is integrated with an extended portion of the first upper storage electrode.
36. The method according to claim 34, wherein the second mask process further includes the step of forming a second lower storage electrode continuous with the common electrode and the common line to be disposed between the first upper storage electrode and the drain electrode, wherein a second upper storage electrode overlaps the second lower storage electrode, and the gate insulating film and the semiconductor pattern are disposed between the second upper storage electrode and the second lower storage electrode.
37. A thin film transistor substrate of a horizontal electric field type LCD, comprising:
a substrate;
a gate line and a common line disposed on the substrate and arranged parallel with each other;
a data line disposed on the substrate intersecting with the gate line and the common line, the data line insulated from the gate line and the common line by a gate insulating film therebetween, a pixel area being defined by the intersection of the data line with the gate line;
a thin film transistor disposed at the intersection of the data line and the gate line, and connected to the gate line and the data line;
a common electrode disposed having a portion extended into the pixel area and connected the common line;
a pixel electrode disposed having a portion extended into the pixel area and connected to the thin film transistor, wherein a horizontal electric field is formed by the pixel electrode and the common electrode;
a protective film disposed over the common electrode, pixel electrode, data line, data line, common line, and the thin film transistor;
first to fourth contact holes and a plurality of stripper penetration paths provided on the substrate;
a gate pad including a lower gate pad electrode connected to the gate line and an upper gate pad electrode disposed within a first contact hole defined through the protective film to contact the lower gate pad electrode such that the upper gate pad electrode is absent from the upper surface of the protective film;
a common pad including a lower common pad electrode connected to the common line and an upper common pad electrode disposed within a second contact hole defined through the protective film to contact the lower common pad electrode such that the upper common pad electrode is absent from the upper surface of the protective film;
a data pad including a lower data pad electrode connected to the data line and an upper data pad electrode disposed within a third contact hole defined through the protective film to contact the lower data pad electrode such that the upper data pad electrode is absent from the upper surface of the protective film;
a contact electrode disposed within a fourth contact hole defined through the protective film to contact the portion of pixel electrode and a portion of a drain electrode such that the contact electrode is absent from the upper surface of the protective film; and
a plurality of dummy transparent conductive pattern disposed within the plurality of stripper penetration paths defined through the protective film such that the plurality of dummy transparent conductive pattern are absent from the upper surface of the protective film.