1. A digital device for maintaining a state of a precharged dot line, periodically precharged by a global precharge signal, comprising:
a. a data input signal that can have a selected one of a first value and a second value, the first value being a value that would be reflected by the dot line being in a charged state;
b. a precharge circuit, responsive to a global precharge signal, that is configured to precharge the dot line;
c. a guaranteed write through logic device, responsive to the data input signal, that ensures that charge is applied to the dot line whenever the data signal has the first value; and
d. a guaranteed write through inhibitor, responsive to a write through gate signal, that is configured to inhibit selectively the guaranteed write through logic device from applying charge to the dot line when the write through gate signal is in a guarantee inhibit state.
2. The digital device of claim 1, wherein the precharge circuit comprises a transistor having a source coupled to a voltage source, a drain coupled to the dot line and a gate coupled to the global precharge signal, so that the transistor to enters a conducting state when the global precharge signal is in a precharge state.
3. The digital device of claim 2, wherein the guaranteed write through inhibitor comprises:
a. an inverter that receives input from the data input signal;
b. a NAND gate that receives input from the inverter and the write through gate signal; and
c. an AND gate that receives input from the NAND gate and the global precharge signal.
4. The digital device of claim 1, wherein the write through gate signal is in a guarantee inhibit state when the write through gate signal has a logical \u201c0\u201d value.
5. A static read only memory with write-through capability, comprising:
a. a memory cell configured to store a bit of data;
b. an enable signal configured to enable writing a value from an input into the memory cell and to enable reading a value from the memory cell onto a dot line;
c. a write-through circuit that allows a value being written into the memory cell to be read at the dot line in a single clock cycle;
d. a precharge circuit configured to precharge the dot line to a predetermined value when the dot line is not being read, the precharge circuit including a transistor having a source coupled to a voltage source, a drain coupled to the dot line, and a gate that causes the dot line to be coupled to a voltage source when the transistor is in a conducting state;
e. a guaranteed write through logic device configured to drive the transistor into a conducting state and recharge the dot line when a current state of the memory cell and a current value of the input causes the dot line to discharge prematurely and when the current state of the input corresponds to a state in which the dot line should be charged, and
f. a guaranteed write through inhibitor, responsive to a write through gate signal, that is configured to inhibit selectively the guaranteed write through logic device from applying charge to the dot line when the write through gate signal is in a guarantee inhibit state.
6. The digital device of claim 5, wherein the transistor comprises a p-type field effect transistor and wherein the guaranteed write through inhibitor comprises:
a. an inverter that receives input from the data input signal;
b. a NAND gate that receives input from the inverter and the write through gate signal; and
c. wherein the logic gate comprises an AND gate that receives input from the NAND gate and the global precharge signal, the precharge signal having a logic \u201c0\u201d state when the dot line is to be precharged and the data input signal having a logic \u201c0\u201d state when a logic \u201c1\u201d is to be written to the dot line.
7. The digital device of claim 5, wherein the write through gate signal is in a guarantee inhibit state when the write through gate signal has a logical \u201c0\u201d value.
8. A method of ensuring that a precharged dot line, that is coupled to an output from an SRAM cell having a write-through capability, can recover from a premature discharge, the SRAM configured to store a value indicated by a data input signal and including a precharge circuit that causes the dot line to be precharged when a precharge signal is asserted, the method comprising the actions of:
a. asserting a charge signal onto the dot line when either the precharge signal has been asserted or the data input signal has a value that would cause the SRAM cell to store a logical \u201c1\u201d;
b. coupling the dot line to a charge source when the charge signal is asserted if a write through gate signal is in a guaranteed write through enable state; and
c. preventing coupling of the dot line to a charge source when the charge signal is asserted if the write through gate signal is in a guarantee inhibit state.
9. The method of claim 8 wherein the write through gate signal is in a guarantee inhibit state when the write through gate signal has a logical \u201c0\u201d value.
10. The method of claim 9, wherein the data input signal is a complement of a value that is being written to the SRAM cell and wherein the precharge signal has a logical \u201c0\u201d state when the dot line is to be precharged, method further comprising the actions of:
a. inverting the data input signal, thereby generating an inverted signal;
b. NAND’ing the inverted signal with the write through gate signal, thereby generating a NAND’ed signal;
c. AND’ing the NAND’ed signal with the global precharge signal, thereby generating an AND’ed signal; and
d. driving a gate of a p-type field effect transistor that selectively couples the dot line to a voltage source with the AND’ed signal.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A man-hour management system which manages man-hours for producing automobiles, comprising:
a server, a database, connection terminals, and an Ethernet;
said database comprising:
a walk man-hour conversion table for performing registration management of standardized man-hours for walks which are generated by works;
a work constituent condition table for performing registration management of constituent works for use in managing the man-hours, end having conditions for each of the constituent works;
a standardized man-hour table for performing registration management of standardized man-hour analysis contents and standardized man-hours for the constituent works or the constituent work conditions which are under the registration management of said work constituent condition table;
a main man-hour management table for managing item data for constituent works in process units and for performing registration management andor reorganization management of constituent work items in the units of processes, data being assigned to the constituent work items from said walk awn-hour conversion table, said work constituent condition table and said standardized man-hour table, or data being inputted and set to the constituent work items; and
a process name table for performing registration management andor reorganization management of names of the processes; and
said man-hour management system further including man-hour output means including a man-hour output system program, a timing graph output program, a process balancing table output program, a net & loss aggregation table output program, an individual-process specification aggregation table output program, a history management table output program, and a main man-hour management output program, for outputting man-hour information by being assigned data from said main man-hour management table and said process name table.
2. A man-hour management system according to claim 1, comprising a change history table for performing save management of work change contents in units of the processes;
wherein said man-hour output means outputs the man-hour information by being assigned data also from said change history table.
3. A man-hour management system according to claim 1, comprising a timing graph data table for performing registration management of data of a timing graph, data being assigned to said timing graph data table from said main man-hour management table;
wherein said man-hour output means outputs the man-hour information by being assigned data also from said timing graph data table.
4. A man-hour management system according to claim 1, comprising a line name table for performing registration management of modes of lines which implement works;
wherein said main man-hour management table is assigned data also from said line name table.
5. A man-hour management system according to claim 1, comprising a series table for performing registration management of series and types associated with the series;
wherein said main man-hour management table is assigned data also from said series table.
6. A man-hour management system according to claim 1, comprising a derivation table for performing registration management of derivatives associated with each of the series and types;
wherein said main man-hour management table is assigned data also from said derivation table.
7. A man-hour management system according to claim 1, comprising:
a database in which the tables are stored; and
series data backup means for extracting the data of said tables in series units as have become unnecessary, from said database, and for re-storing said data of said tables extracted in series units, in said database.
8. A man-hour management system according to claim 1, wherein the constituent work has its each movement classified into one of a main movement, an auxiliary movement and a quasi movement, and standardized man-hours analyzed are set for said each movement.