1. A Customer Replacement Unit Monitor, CRUM, unit which is mountable on a consumable unit of an image forming apparatus, the CRUM unit comprising:
a plurality of interfaces configured to be connected to the consumable unit;
a power extracting circuit configured to, when a clock signal is received through one of the plurality of interfaces, extract power from the clock signal; and
an interface controller configured to transmitreceive data through at least one of the plurality of interfaces according to the clock signal,
wherein the clock signal has a first pulse width in a data section where a data signal is received and has a second pulse width which is different from the first pulse width in an idle section where a data signal is not received.
2. The CRUM unit as claimed in claim 1, wherein the interface controller, when it is determined that the idle section is changed to the data section based on the clock signal, is operable to transmitreceive the data signal in the data section.
3. The CRUM unit as claimed in claim 2, wherein the interface controller, when a high value and a low value of the clock signal repeatedly alternate in the idle section and a section where a low value of the clock signal is maintained exceeds a predetermined first time, is operable to determine that the time when the section exceeds the first time as a time when reception of the data signal starts, and
when a high value and a low value of the clock signal repeatedly alternate in the data section or the idle section and a section where a high value of the clock signal is maintained exceeds a predetermined second time, is operable to determine that the time when the section exceeds the second time as a time when reception of the data signal ends.
4. The CRUM unit as claimed in claim 2, wherein the power extracting circuit is operable to extract the power using a clock signal having the first pulse width and a clock signal having the second pulse width,
wherein the interface controller is operable to transmitreceive a decoding signal corresponding to the data section based on the clock signal.
5. The CRUM unit as claimed in claim 2, further comprising:
a memory; and
a controller configured to be activated by the power and manage the memory according the data signal which is transmittedreceived tofrom the interface controller.
6. The CRUM unit as claimed in claim 5, wherein the interface controller, the memory, and the controller consist of at least one Integrated Chip, IC.
7. The CRUM unit as claimed in claim 2, wherein the power extracting circuit comprises:
a diode configured to pass a clock signal having a high value out of the clock signal; and
a capacitor configured to be recharged by the clock signal which is passed from the diode.
8. The CRUM unit as claimed in claim 2, wherein the power extracting circuit comprises:
a switching element configured to be connected to the interface and pass a clock signal having the high value by performing a switching operation according to the clock signal which is received through the interface; and
a capacitor configured to be recharged by the clock signal which is passed from the switching element.
9. The CRUM unit as claimed in claim 1, wherein the plurality of interfaces comprises:
a first interface configured to receive the clock signal from a clock terminal provided on the consumable unit;
a second interface configured to transmitreceive the data signal tofrom a data terminal provided on the consumable unit;
a third interface configured to be connected to a power terminal provided on the consumable unit; and
a fourth interface configured to be connected to a ground terminal provided on the consumable unit,
wherein the third interface maintains an inactive state.
10. The CRUM unit as claimed in claim 1, wherein the plurality of interfaces comprises:
a first interface configured to receive the clock signal from a clock terminal provided on the consumable unit;
a second interface configured to receive the data signal from a first data terminal provided on the consumable unit;
a third interface configured to transmit a data signal to the image forming apparatus through a second data terminal provided on the consumable unit; and
a fourth interface configured to be connected to a ground terminal provided on the consumable unit.
11. The CRUM unit as claimed in claim 1, wherein the clock signal has a clock wave form where a high value section and a low value section having the second pulse width repeatedly alternate in the idle section, and a size of the clock signal in the high value section exceeds \u20180\u2019.
12. The CRUM unit as claimed in claim 1, wherein the clock signal has a clock wave form where a high value section and a low value section having the second pulse width repeatedly alternate in the idle section, and a size of the clock signal in the low value section is smaller than the high value.
13. An image forming apparatus, comprising:
a main body having a main controller which is configured to control an operation of the image forming apparatus;
a consumable unit configured to be mounted on the main body to operable to communicate with the main controller; and
a CRUM unit configured to be provided on the consumable unit,
wherein the main controller is configured to transmit a clock signal where a high value and a low value repeatedly alternate in a predetermined pattern in an idle section where a data signal is not received to the CRUM unit through the consumable unit,
wherein the clock signal has a first pulse width in a data section where the data signal is received and a second pulse width which is a different from the first pulse width in the idle section.
14. An apparatus as claimed in claim 13, wherein the first pulse width of the clock signal is greater than the second pulse width.
15. The apparatus as claimed in claim 14, wherein the consumable unit comprises:
a data terminal configured to transmitreceive the data signal tofrom the main controller;
a clock terminal configured to receive the clock signal which is transmitted from the main controller; and
a ground terminal.
16. The apparatus as claimed in claim 15, wherein the CRUM unit comprises:
a first interface configured to transmitreceive the data signal tofrom the data terminal;
a second interface configured to receive the clock signal from the clock terminal;
a power extracting circuit configured to, when the clock signal is received through the first interface, extract power from the clock signal;
an interface controller configured to transmitreceive the data signal through at least one of the plurality of interfaces according to the clock signal;
a memory; and
a controller configured to be activated by the power and manage the memory according to the data signal which is transmittedreceived tofrom the interface controller.
17. The apparatus as claimed in claim 16, wherein the interface controller, when it is determined that the idle section is changed to the data section based on the clock signal, transmitsreceives the data signal in the data section.
18. The apparatus as claimed in claim 17, wherein the interface controller, when a high value and a low value of the clock signal repeatedly alternate in the idle section and a section where one of the high value and the low value is maintained exceeds a predetermined first time, is operable to determine that the idle section is changed to the data section, and
when a high value and a low value of the clock signal repeatedly alternate in the data section and a section where one of the high value and the low value is maintained has the first time, is operable to determine that the data section is changed to the idle section.
19. The apparatus as claimed in claim 16, wherein the consumable unit further comprises:
a power terminal,
wherein the CRUM unit further comprises a third interface which is connected to the power terminal,
wherein the third interface maintains an inactive state at all times.
20. The apparatus as claimed in claim 16, wherein the consumable unit further comprises:
an additional data terminal,
wherein the CRUM unit further comprises:
a third interface configured to transmit a data signal to the main controller through the additional data terminal.
21. A CRUM unit which is mountable on a consumable unit of an image forming apparatus, the CRUM unit comprising:
a plurality of interfaces configured to be connected to the consumable unit;
a power extracting circuit configured to, when a clock signal is received through one of the plurality of interfaces, extract power from the clock signal; and
an interface controller configured to transmitreceive a data signal through at least one of the plurality of interfaces according to the clock signal,
wherein the clock signal is a signal where a high value and a first low value repeatedly alternate in a data section where a data signal is received, and one of a high value and a second low value is maintained in an idle section where the data signal is not received,
wherein the second low value exceeds \u20180\u2019 and less than the high value.
22. The CRUM unit as claimed in claim 21, wherein the clock signal is a signal where the high value and the first low value repeatedly alternate according to a predetermined first time in the data section, and one of the high value and the second low value is maintained for a time which is longer than the first time in the idle section.
23. The CRUM unit as claimed in claim 21, wherein the interface controller, when it is determined that the idle section is changed to the data section based on the clock signal, is operable to transmitreceive the data signal in the data section.
24. The CRUM unit as claimed in claim 23, wherein the interface controller, when a high value of the clock signal is maintained and changed to the first low value in the idle section, is operable to determine that a point of time when the high value is changed to the first low value as a point of time when reception of the data signal starts, and
when a section where the high value of the clock signal is maintained exceeds the first time in the data section or the idle section, is operable to determine the time as a point of time when reception of the data signal ends.
25. The CRUM unit as claimed in claim 23, wherein the interface controller, when one of a high value and a second low value of the clock signal is maintained longer than a first time in the idle section and the high value and the first low value have the first time, is operable to determine that the idle section is changed to the data section, and
when a high value and a first low value of the clock signal repeatedly alternate in the data section and a section where one of the high value and the second low value is maintained exceeds the first time, is operable to determine that the data section is changed to the idle section.
26. The CRUM unit as claimed in claim 1, wherein the plurality of interfaces comprises:
a first interface configured to receive the clock signal from a clock terminal provided on the consumable unit;
a second interface configured to transmitreceive the data signal tofrom a data terminal provided on the consumable unit; and
a third interface configured to be connected to a ground terminal provided on the consumable unit.
27. The CRUM unit as claimed in claim 22, wherein the first low value is the same as the second low value.
28. The CRUM unit as claimed in claim 22, wherein the first low value is \u20180\u2019.
29. A consumable unit which is mountable on an image forming apparatus, comprising:
a first contact point configured to receive a clock signal from a main body of the image forming apparatus;
a second contact point configured to transmitreceive a data signal tofrom the main body of the image forming apparatus;
a third contact point configured to be connected to a ground terminal of the main body of the image forming apparatus; and
a CRUM unit configured to receive the clock signal and the data signal,
wherein the CRUM unit is operable to extract and use power from the clock signal in an idle section in which the data signal is not received,
wherein the clock signal has a first pulse width in a data section where a data signal is received and a second pulse width which is different from the first pulse width in the idle section in which data is not received.
30. A consumable unit which is mountable on an image forming apparatus, comprising:
a first contact point configured to receive a clock signal from a main body of the image forming apparatus;
a second contact point configured to transmitreceive a data signal tofrom the main body of the image forming apparatus;
a third contact point configured to be connected to a ground terminal of the main body of the image forming apparatus; and
a CRUM unit configured to receive the clock signal and the data signal,
wherein the CRUM unit is operable to extract and use power from the clock signal in an idle section in which the data signal is not received,
wherein the clock signal is a signal where a high value and a low value repeatedly alternate in a data section where the data signal is received and one of the high value and the low value is maintained in the idle section,
wherein the low value exceeds \u20180\u2019 and less than the high value.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A polyamide resin composition comprising (A) a polyamide, (B) an apatite compound, and (C) (i) a higher fatty acid metal salt andor (ii) a mixture of a metal halide and a copper compound, wherein the polyamide resin composition is obtained by adding component (C) after the formation of the apatite compound.
2. The polyamide resin composition according to claim 1, wherein the amount of (B) is from 0.05 to 200 parts by weight and the amount of (C) is from 0.01 to 20 parts by weight relative to 100 parts by weight of (A).
3. The polyamide resin composition according to claim 2, which is obtained by adding 0.01 to 20 parts by weight of component (C) in a step after the completion of formation of the apatite compound in the steps of producing a polyamide composite comprising the polyamide (A) and the apatite compound (B) by incorporating 0.05 to 200 parts by weight of an apatite compound-forming component into 100 parts by weight of a polyamide-forming component and promoting the polymerization of the polyamide and the synthesis of the apatite compound.
4. The polyamide resin composition according to any one of claims 1 to 3, wherein the higher fatty acid metal salt of (C) (i) is represented by the general formula (1): CH3(CH2)mCOO (M1) wherein n is from 8 to 30 and a metal element (M1) is at least one metal element selected form the elements of Groups 1, 2, and 3 of the periodic table, zinc, and aluminums.
5. The polyamide resin composition according to any one of claims 1 to 3, wherein the metal halide of the mixture (C) (ii) is potassium iodide, the copper compound is copper acetate or copper iodide, and the molar ratio of the halogen to copper is from 21 to 401.
6. The polyamide resin composition according to any one of claims 1 to 3, wherein 1 to 300 parts by weight of a polyphenylene ether resin is incorporated into 100 parts by weight of (A), and wherein components (B) and (C) are mainly present in component (A).
7. The polyamide resin composition according to claim 3, wherein the apatite compound-forming component is a phosphoric acid metal compound having a maximum particle size of 30 \u03bcm or less.
8. The polyamide resin composition according to claim 3, wherein the apatite compound-forming component is a phosphoric acid metal compound having a specific surface area of 0.1 to 100 m2g.
9. The polyamide resin composition according to any one of claims 1 to 3, wherein an apatite compound having an average particle size of 0.01 to 1 \u03bcm is homogeneously dispersed in a polyamide having a weight-average molecular weight of 20,000 to 200,000.
10. A process for producing a polyamide resin composition comprising, relative to (A) 100 parts by weight of a polyamide, (B) 0.05 to 200 parts by weight of an apatite compound, and (C) 0.01 to 20 parts by weight of (i) a higher fatty acid metal salt andor (ii) a mixture of a metal halide and a copper compound, wherein component (C) is added after the formation of the apatite compound.