What is claimed is:
1. A computer comprising:
a printed circuit board;
a memory controller mounted on said printed circuit board;
a bus switch mounted on said printed circuit board;
a first data bus connecting said memory controller and said bus switch;
a plurality of memory devices including at least a first and a second memory device mounted on said printed circuit board; and
a second data bus connecting said bus switch to said first memory device and a third data bus connecting said bus switch to said second memory device, wherein said bus switch is configured to couple said first data bus to said second data bus during memory accesses directed to said first memory device, and wherein said bus switch is configured to couple said first data bus to said third data bus during memory accesses directed to said second memory device.
2. The computer of claim 1, additionally comprising a state decoder for receiving a chip select signal targeted for either the first or second memory device, and wherein the first memory device or second memory device is selectively decoupled from the bus in response to a change in state in the chip select signal.
3. The computer of claim 1, wherein the switch is an integral part of the memory controller.
4. The computer of claim 1, wherein the switch is an integral part of at least the first memory device.
5. A printed circuit board;
a memory controller mounted on said printed circuit board;
a bus switch mounted on said printed circuit board;
a first data bus connecting said memory controller and said bus switch;
a plurality of memory devices including at least a first and a second memory device mounted on said printed circuit board; and
a second data bus connecting said bus switch to said first memory device and a third data bus connecting said bus switch to said second memory device, wherein said bus switch is configured to couple said first data bus to said second data bus during memory accesses directed to said first memory device, and wherein said bus switch is configured to couple said first data bus to said third data bus during memory accesses directed to said second memory device.
6. The printed circuit board of claim 5, additionally comprising a state decoder for receiving a chip select signal targeted for either the first or second memory device, and wherein the first memory device or second memory device is selectively decoupled from the bus in response to a change in state in the chip select signal.
7. The printed circuit board of claim 5, wherein the switch is an integral part of the memory controller.
8. The printed circuit board of claim 5, wherein the switch is an integral part of at least the first memory device.
9. A computer comprising:
a printed circuit board;
a memory controller mounted on said printed circuit board;
a bus switch mounted on said printed circuit board;
a first data bus connecting said memory controller and said bus switch;
a state decoder for receiving a chip select signal targeted for either the first or second memory device, and wherein the first memory device or second memory device is selectively decoupled from the bus in response to a change in state in the chip select signal;
a plurality of memory devices including at least a first and a second memory device mounted on said printed circuit board; and
a second data bus connecting said bus switch to said first memory device and a third data bus connecting said bus switch to said second memory device, wherein said bus switch is configured to couple said first data bus to said second data bus during memory accesses directed to said first memory device, and wherein said bus switch is configured to couple said first data bus to said third data bus during memory accesses directed to said second memory device.
10. A computer comprising:
a printed circuit board;
a memory controller mounted on said printed circuit board;
a bus switch mounted on said printed circuit board;
a first data bus connecting said memory controller and said bus switch;
a state decoder for receiving a chip select signal targeted for either the first or second memory device, and wherein the first memory device or second memory device is selectively decoupled from the bus in response to a change in state in the chip select signal;
a plurality of memory devices including at least a first and a second synchronous-DRAM memory device mounted on said printed circuit board; and
a second data bus connecting said bus switch to said first synchronous-DRAM memory device and a third data bus connecting said bus switch to said second synchronous-DRAM memory device, wherein said bus switch is configured to couple said first data bus to said second data bus during memory accesses directed to said first memory device, and wherein said bus switch is configured to couple said first data bus to said third data bus during memory accesses directed to said second memory device.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A motor, comprising:
a winding support element defining an interior;
a rotor having a shaft mounted inside the interior, the shaft defining a central axis;
a superconducting wire wound around the winding support element in a winding pattern;
the winding pattern including a plurality of turns around the winding support element, comprising:
for a first portion of each turn proximate to the rotor, the wiring pattern curves with respect to a toroidal angle about the central axis; and
for a second portion of each turn distant from the rotor, the wiring pattern curves with respect to a toroidal angle about the central axis;
wherein cooper pairs travelling through the wire accelerate with respect to the toroidal angle in the first portion, and decelerate with respect to the toroidal angle in the second portion.
2. The motor of claim 1, wherein the central axis is substantially aligned perpendicular to Earth velocity.
4. The motor of claim 1, further comprising an electronic or mechanical device configured to control the rotation rate of the rotor.
5. The motor of claim 1, wherein the winding support element has a toroid shape.
6. The motor of claim 1, wherein the toroid shape has a substantially rectangular cross section.
7. The motor of claim 1, wherein the toroid shape has substantially parallel left and right faces, an inner face and an outer face, wherein the inner face is closer to the rotor than the outer face.
8. The motor of claim 7, wherein the first portion is at least partially on the inner face, and the second portion is at least partially on the outer face.
9. The motor of claim 1, wherein the winding support element includes a plurality of walls with gaps there between that generally define the wiring pattern, and the wire winds around the gaps to form the wiring pattern.
10. A motor, comprising:
a plurality of concentric winding support elements defining an interior;
each winding support element including a plurality of wiring channels that generally define a wiring pattern pathway;
a superconducting wire wound around the winding support elements in the wiring channels to thereby define a winding pattern;
a rotor having a shaft mounted inside the interior, the shaft defining a central axis of the motor;
the winding pattern including at least one zone of acceleration and at least one zone of deceleration with respect to a toroidal angle about the central axis for cooper pairs moving through the wiring pattern;
wherein, at the rotor, any net gravitation forces created by cooper pairs moving through the at least one zone of acceleration exceed any net gravitational forces created by cooper pairs moving through the at least one zone of deceleration.
11. The motor of claim 10, wherein the central axis is substantially aligned perpendicular to the north-south axis of the Earth.
12. The motor of claim 10, wherein the wiring channels are at an angle to the radial axis of the shaft.
13. The motor of claim 12, wherein the angle of the wiring channels is approximately 45 degrees.
14. The motor of claim 10, wherein a zone of acceleration is proximate to an inner face of each winding support element, and a zone of deceleration is proximate to an outer face of each winding support element.
15. The motor of claim 10, wherein the shaft is connected to a device configured to convert rotation into electricity.
16. The motor of claim 10, further comprising a device configured to control the rate of rotation of the rotor.