1. A method for saving power in a microprocessor having at least one functional unit having a plurality of blocks each including a plurality of sub-blocks, the method comprising the steps of:
determining whether there is any instruction for the at least one functional unit;
upon a determination that there is no instruction for the at least one functional unit, shutting down the at least one functional unit; and
upon a determination that there is at least one instruction for the at least one functional unit, wherein the at least one functional unit has at least one inactive block and at least one active block, shutting down the at least one inactive block based on the at least one instruction.
2. The method of claim 1, further comprising the step of, for the at least one active block, wherein the at least one active block has at least one inactive sub-block, shutting down the at least one inactive sub-block based on the at least one instruction.
3. The method of claim 1, wherein the at least one inactive block is shut down based on both the at least one instruction and one or more operands used to execute the at least one instruction.
4. The method of claim 2, wherein the at least one inactive sub-block is shut down based on both the at least one instruction and one or more operands used to execute the at least one instruction.
5. The method of claim 1, wherein the functional unit is a floating-point unit (FPU).
6. The method of claim 5, wherein the at least one active block is an adder block.
7. An apparatus for saving power in a microprocessor having at least one functional unit having a plurality of blocks each including a plurality of sub-blocks, the apparatus comprising:
means for determining whether there is any instruction for the at least one functional unit;
means for, upon a determination that there is no instruction for the at least one functional unit, shutting down the at least one functional unit; and
means for, upon a determination that there is at least one instruction for the at least one functional unit, wherein the at least one functional unit has at least one inactive block and at least one active block, shutting down the at least one inactive block based on the at least one instruction.
8. The apparatus of claim 7, further comprising means for, for the at least one active block, wherein the at least one active block has at least one inactive sub-block, shutting down the at least one inactive sub-block based on the at least one instruction.
9. The apparatus of claim 7, wherein the at least one inactive block is shut down based on both the at least one instruction and one or more operands used to execute the at least one instruction.
10. The apparatus of claim 8, wherein the at least one inactive sub-block is shut down based on both the at least one instruction and one or more operands used to execute the at least one instruction.
11. The apparatus of claim 7, wherein the functional unit is a floating-point unit (FPU).
12. The apparatus of claim 11, wherein the at least one active block is an adder block.
13. A computer program product for saving power in a microprocessor having at least one functional unit having a plurality of blocks each including a plurality of sub-blocks, the computer program product having a medium with a computer program embodied thereon, the computer program comprising:
computer program code for determining whether there is any instruction for the at least one functional unit;
computer program code for, upon a determination that there is no instruction for the at least one functional unit, shutting down the at least one functional unit; and
computer program code for, upon a determination that there is at least one instruction for the at least one functional unit, wherein the at least one functional unit has at least one inactive block and at least one active block, shutting down the at least one inactive block based on the at least one instruction.
14. The computer program product of claim 13, the computer program further comprising computer program code for, for the at least one active block, wherein the at least one active block has at least one inactive sub-block, shutting down the at least one inactive sub-block based on the at least one instruction.
15. The computer program product of claim 13, wherein the at least one inactive block is shut down based on both the at least one instruction and one or more operands used to execute the at least one instruction.
16. The computer program product of claim 14, wherein the at least one inactive sub-block is shut down based on both the at least one instruction and one or more operands used to execute the at least one instruction.
17. The computer program product of claim 13, wherein the functional unit is a floating-point unit (FPU).
18. The computer program product of claim 17, wherein the at least one active block is an adder block.
19. In a microprocessor, an apparatus for saving power consumed in a functional unit of the microprocessor, the functional unit having a plurality of cycles, the apparatus comprising:
a control logic circuit coupled to the functional unit, the control logic being configured for receiving one or more instructions and operands to be executed in the functional unit and for shutting down one or more inactive portions of the functional unit, the one or more inactive portions being determined based on the one or more instructions and the associated operands; and
a sequencer circuit coupled to the control logic and to the functional unit, the sequencer circuit being configured for detecting which cycle in an active portion of the functional unit the operands are currently in and for shutting down any inactive cycles in the active portions of the functional unit.
20. The apparatus of claim 19, wherein the functional unit is a floating-point unit (FPU).
21. The apparatus of claim 19, wherein each of the plurality of cycles is gated by one of a plurality of latches, and wherein the sequencer circuit is coupled to the plurality of latches for controlling the latches.
22. The apparatus of claim 19, further comprising a lookup table coupled to the control logic circuit, wherein the lookup table contains information on signals that control clock gating of the functional unit based on the instructions and the operands.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. Packaging to contain a flat disc on a panel, the packaging comprising,
a plastic, molded, disc retaining tray, the tray being mounted on the panel, the tray comprising,
(a) a disc retainer to retain the disc on a surface of the tray, and
(b) at least one extension from an edge of the tray surface, the extension being attached to the tray surface by a severable connection which breaks when the extension is folded from an initial position in which the extension extends generally away from the tray surface to a locking position in which the extension: i) extends transverse to the tray surface; ii) envelopes an edge of the panel to engage the tray in place over the panel and iii) comprises a first lock element that engages a second, co-operating lock element attached to the tray surface, to lock the extension in place in the locking position.
2. The packaging of claim 1 in which the tray comprises a peripheral wall extending transverse to the tray surface, said peripheral wall comprising said second lock element.
3. The packaging of claim 1 in which said extension is one member of a pair of extensions, the members of the pair extending from opposite edges of the tray surface, each member of said pair of said extensions comprising a said first lock element, and each member of said pair being attached to the surface by a severable connection which breaks when the extension is folded from an initial position generally in which the extension extends generally away from the tray surface to a locking position in which the extension: i) extends transverse to the tray surface; ii) envelopes an edge of the panel to engage the tray in place over the panel and iii) comprises a first lock element that engages a second, co-operating lock element attached to the tray surface, to lock the extension in place in the locking position.
4. The packaging of claim 1 in which the tray comprises at least two peripheral walls, each peripheral wall extending transverse to the tray surface adjacent opposite edges of the panel, each of said peripheral walls comprising one of said tray lock elements, the tray further comprising at least one pair of said at least one extension, the members of the pair extending from opposite edges of the tray surface, each of said extensions being attached to the surface by a severable connection which breaks when the extension is folded from an initial position generally in which the extension extends generally away from the tray surface to a locking position in which the extension: i) extends transverse to the tray surface; ii) envelopes an edge of the panel to engage the tray in place over the panel and iii) comprises a first lock element that engages a second, co-operating lock element attached to the tray surface, to lock the extension in place in the locking position.
5. The packaging of claim 3 or claim 4 in which at least one member of said pair of extensions includes a lip that engages an edge of the panel holding it in place.
6. The packaging of claim 1 in which one of said locking elements comprises a lug that mates with the other of said locking elements, the other of said locking elements comprising a recess to receive said lug.
7. The packaging of claim 6 in which the lug is said second locking element attached to said tray surface.
8. The packaging of claim 1 in which one of said locking elements comprises a spring clip that resiliently mates with the other of said locking elements, the other of said locking elements being a recess sized to receive said spring clip.
9. The packaging of claim 6 in which said spring clip comprises a pair of resilient prongs.
10. The packaging of claim 1 in which said tray comprises a plastic material that is substantially clear.
11. The packaging of claim 1 or claim 9 in which said tray is crystal styrene polymer.
12. A method of assembling the packaging of claim 1 comprising assembling said tray to said panel by
(a) positioning said tray over said panel; and
(b) moving said extension from said initial position to said locking position.