1. A monitoring unit (9), locally assigned to a bus controller (6) of a user (3) of a communication system (1), for monitoring and controlling the access to a data bus (2), the bus controller (6) accessing the data bus (2) via a bus driver (8) and the monitoring unit (9) monitoring and controlling the access authorization of the bus driver (8),
wherein the monitoring unit (9) has means (18, 19, 20, 21, 22) for implementing a question-answer communication with the bus controller (6) and enables access to the data bus (2) by the bus controller (6) only if the question-answer communication establishes a proper functioning of the bus controller (6).
2. The monitoring unit (9) as recited in claim 9,
wherein a local time basis of the bus controller (6) is synchronized with a global time basis of the communication system (1) by synchronization messages, the monitoring unit (9) receives via an interface (18) to the bus controller (6) information about the synchronization messages decoded in the bus controller (6) and utilized for clock synchronization, and the question-answer communication takes place by taking into account the received synchronization information.
3. The monitoring unit (9) as recited in claim 2,
wherein in the bus controller (6), a list containing synchronization messages that were received by the bus controller (6), decoded, and utilized for clock synchronization exists, the monitoring unit (9) receiving the synchronization information from the list and, as part of the question-answer communication, querying whether the synchronization information fulfills specific minimum requirements.
4. The monitoring unit (9) as recited in claim 3,
wherein the monitoring unit (9) queries as part of the question-answer communication whether the number of synchronization messages received, decoded and utilized for clock synchronization is larger than andor equal to a minimum number.
5. The monitoring unit (9) as recited in one of claims 2 through 4,
wherein if the synchronization messages are transmitted via the data bus (2) in two redundant communication channels, the monitoring unit (9) queries, as part of the question-answer communication, whether the synchronization information that was received, decoded, andor utilized for clock synchronization is identical for both communication channels.
6. The monitoring unit (9) as recited in claim 5,
wherein the monitoring unit (9) queries, as part of the question-answer communication, whether the number andor the identification of the synchronization messages of both communication channels are identical.
7. The monitoring unit (9) as recited in one of claims 1 through 6,
wherein a local time basis of the bus controller (6) is synchronized with a global time basis of the communication system (1) via synchronization messages using rate correction andor offset correction relative to the global time basis, and the monitoring unit (9) queries, as part of the question-answer communication, the correct calculation of the rate correction andor of the offset correction for the local time basis.
8. The monitoring unit (9) as recited in claim 7,
wherein means of the bus controller (6) for calculating the rate correction andor the offset correction are configured identically in the monitoring unit (9), the monitoring unit (9) receives information about the synchronization messages received, decoded, and utilized for clock synchronization in the bus controller (6), the calculation means provided in the monitoring unit (9) calculate, as a function of the synchronization information, the rate correction andor the offset correction, and, as part of the question-answer communication, the monitoring unit (9) compares the result to the rate correction or offset correction calculated by the calculation means provided in the communication controller (6).
9. The monitoring unit (9) as recited in claim 7,
wherein the monitoring unit (9) poses specific questions (21) to the means provided in the bus controller (6) for calculating the rate correction andor the offset correction and monitors the receipt of the correct answer from the bus controller (6) within a predefined answer window.
10. The monitoring unit (9) as recited in one of claims 1 through 6,
wherein a local time basis of the bus controller (6) is synchronized with the global time basis of the communication system (1) through synchronization messages using rate correction andor offset correction relative to the global time basis, and the monitoring unit (9) queries as part of the question-answer communication the correct application of the calculated values for the rate correction andor the offset correction for the local time basis.
11. The monitoring unit (9) as recited in claim 10,
wherein the monitoring unit (9) checks for error-free functioning, as part of the question-answer communication, means of the bus controller (6) for generating a macrotick andor storage means for the correction value calculated as part of the rate correction.
12. The monitoring unit (9) as recited in claim 10,
wherein the monitoring means (9) checks for error-free functioning, as part of the question-answer communication, means of the bus controller (6) for applying the offset correction andor storage means for the correction value calculated as part of the offset correction.
13. The monitoring unit (9) as recited in claim 11 or 12,
wherein the monitoring unit (9) receives the calculated correction value from the bus controller (6) via an interface (18) and, as part of the question-answer communication, compares this correction value to a correction value stored in the storage means of the bus controller (6).
14. The monitoring unit (9) as recited in claim 11,
wherein the monitoring unit (9) poses specific questions to the means provided in the bus controller (6) for generating the macrotick and monitors the receipt of the correct answer from the bus controller (6) within a predefined time window.
15. The monitoring unit (9) as recited in claim 12,
wherein the monitoring unit (9) poses specific questions to the means provided in the bus controller (6) for applying the offset correction and monitors the receipt of the correct answer from the bus controller (6) within a predefined time window.
16. The monitoring unit (9) as recited in claim 11,
wherein at the end of a communication cycle the monitoring unit (9) receives from the bus controller (6) via an interface (18) the number of microticks per cycle andor the number of microticks per macrotick, and the monitoring unit (9) queries as part of the question-answer communication whether a drift in the number of microticks per cycle andor the number of microticks per macrotick between a communication cycle and a subsequent cycle is in terms of its amount larger than andor equal to a predefinable permissible drift.
17. The monitoring unit (9) as recited in claim 12,
wherein the monitoring unit (9) receives via an interface (18) the state of a microtick counter of the bus controller (6) before an offset correction and after it, and the monitoring unit (9) queries as part of the question-answer communication whether a difference between the reading of the microtick counter before the offset correction and after it is, in terms of its amount, larger than andor equal to a predefinable limit value.
18. A user (3) of a communication system (1) encompassing a data bus (2), the user (3) having a bus controller (6) and a bus driver (8), the bus controller (6) being connected via the bus driver (8) to the data bus (2), and the user (3) having a monitoring unit (9), assigned to the bus controller (6), for monitoring and controlling the access authorization of the bus driver (8) to the data bus (2),
wherein the monitoring unit (9) is configured according to one of claims 1 through 17.
19. The user (3) as recited in claim 18,
wherein the bus controller (6) contains means for receiving a question from the monitoring unit (9), means for processing a question received from the monitoring unit (9) and for generating a corresponding answer, and means for transmitting the generated answer to the monitoring unit (9).
20. The user (3) as recited in claim 18 or 19,
wherein the user (3) is configured as a FlexRay user of a FlexRay communication system (1) for transmitting information according to the FlexRay protocol specification.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
What is claimed is:
1. An integrated capacitor comprising:
a semiconductor substrate;
an outer vertical plate laid over the semiconductor substrate, the outer vertical plate consisting of a plurality of first conductive slabs connected vertically using multiple first via plugs, wherein the outer vertical plate defines a grid area;
an inner vertical plate laid over the semiconductor substrate in parallel with the first vertical plate and encompassed by the grid area defined by the outer vertical plate, wherein the inner vertical plate consisting of a plurality of second conductive slabs connected vertically using multiple second via plugs; and
a horizontal conductive plate laid under the outer vertical plate and inner vertical plate over the semiconductor substrate for shielding the outer vertical plate from producing a plate-to-substrate parasitic capacitance thereof;
wherein the inner vertical plate is electrically connected with the horizontal conductive plate using at least one third via plug.
2. The integrated capacitor of claim 1 wherein the horizontal conductive plate is floating and is made of metal.
3. The integrated capacitor of claim 1 wherein the horizontal conductive plate and the overlaying outer vertical plate are isolated from each other by at least one layer of dielectric material.
4. The integrated capacitor of claim 1 wherein both of the first conductive slab and the second conductive slab are made of metal.
5. The integrated capacitor of claim 1 wherein the outer plate and the inner vertical plate are electrically isolated from each other.
6. The integrated capacitor of claim 1 wherein when the outer vertical plate is electrically connected to a node A, the inner vertical plate is electrically connected to a node B, and the semiconductor substrate is grounded, the plate-to-substrate parasitic capacitance is produced at the node B.
7. The integrated capacitor of claim 6 wherein when the outer vertical plate is electrically connected to a node A, the inner vertical plate is electrically connected to a node B, and the semiconductor substrate is grounded, there is no plate-to-substrate parasitic capacitance produced at the node A.
8. A method of forming an electrically polar integrated capacitor, comprising the steps of:
providing a semiconductor substrate comprising an outer vertical plate consisting of a plurality of first conductive slabs connected vertically using multiple first via plugs, and an inner vertical plate consisting of a plurality of second conductive slabs connected vertically using multiple second via plugs, wherein the outer vertical plate defines a grid area, and the inner vertical plate is encompassed by the grid area defined by the outer vertical plate;
providing a conductive plate under the outer vertical plate and the inner vertical plate on the semiconductor substrate for shielding the outer vertical plate from producing a plate-to-substrate parasitic capacitance thereof; and
electrically connecting the inner vertical plate with the conductive plate using at least one third via plug.
9. The method of claim 8 wherein the conductive plate is floating and is made of metal.
10. The method of claim 8 wherein the conductive plate and the overlaying outer vertical plate are isolated from each other by at least one layer of dielectric material.
11. The method of claim 8 wherein when the outer vertical plate is electrically connected to a node A, the inner vertical plate is electrically connected to a node B, and the semiconductor substrate is grounded, the plate-to-substrate parasitic capacitance is produced at the node B.
12. The method of claim 8 wherein when the outer vertical plate is electrically connected to a node A, the inner vertical plate is electrically connected to a node B, and the semiconductor substrate is grounded, there is no plate-to-substrate parasitic capacitance produced at the node A.
13. A method of forming an electrically polar integrated capacitor, comprising:
providing a semiconductor substrate;
providing a conductive plate on the semiconductor substrate, wherein the conductive plate is electrically isolated from the semiconductor substrate;
providing a plurality of first capacitor members and second capacitor members insulated from the first capacitor members over the conductive plate, wherein the first capacitor member is arranged in parallel with the second capacitor member and encompasses the second capacitor member to form an integrated capacitor;
electrically isolating the first capacitor members from the underlying conductive plate; and
electrically connecting the second capacitor members with the underlying conductive plate.
14. The method of claim 13 wherein each of the plurality of first or second capacitor members is a vertical plate consisting of a plurality of conductive slabs connected vertically using multiple via plugs.
15. The method of claim 13 wherein each of the plurality of first or second capacitor members is a vertical capacitor bar consisting of a plurality of conductive squares connected vertically using multiple via plugs.
16. The method of claim 13 wherein the first capacitor member and the second capacitor member are arranged in a symmetric manner to form a matching capacitor unit.