Author: claimsbot

1. A panel for a display device, comprising:
a substrate;
a plurality of first signal lines formed on the substrate and extended in a first direction;
a first shorting bar formed on the substrate corresponding to end portions of the first signal lines, extended in a second direction and dissipating an electrostatic charge;
a first array test part extended in the second direction and applying a first test signal to odd numbered first signal lines and a second test signal to even numbered first signal lines; and
a plurality of first floating switching elements formed on first alternating ones of the first signal lines between the first shorting bar and the first array test part, the first floating switching elements electrically disconnecting the first shorting bar from the first alternating ones of the first signal lines so that second alternating ones of the first signal lines are electrically connected to the first shorting bar,
wherein the first signal lines are data lines.
2. The panel of claim 1, wherein the first floating switching elements are formed on the odd numbered first signal lines, respectively.
3. The panel of claim 1, wherein the first floating switching elements are formed on the even numbered first signal lines, respectively.
4. The panel of claim 1, wherein the first array test part comprises:
a first line electrically connected to the odd numbered first signal lines;
a first pad electrically connected to the first line, the first test signal being applied to the first line through the first pad;
a second line electrically connected to the even numbered first signal lines; and
a second pad electrically connected to the second line, the second test signal being applied to the second line through the second pad.
5. The panel of claim 4, wherein the first line comprises a plurality of first contact portions electrically connected to the odd numbered first signal lines, respectively, and the second line comprises a plurality of second contact portions electrically connected to the even numbered first signal lines, respectively.
6. The panel of claim 1 wherein the data lines are extended in the first direction, and the panel further comprises:
a plurality of scan lines extended in the second direction; and
a plurality of switching elements electrically connected to the data lines and the scan lines.
7. The panel of claim 1, wherein the first floating switching elements have an inverted-staggered structure.
8. The panel of claim 1, further comprising: a plurality of second signal lines formed on the substrate and extended in the second direction;
a second shorting bar formed corresponding to end portions of the second signal lines, extended in the first direction and dissipating an electrostatic charge;
a second array test part extended in the first direction and applying a third test signal to odd numbered second signal lines and applying a fourth test signal to even numbered second signal lines; and
a plurality of second floating switching elements formed on the second signal lines between the second shorting bar and the second array test part, and electrically disconnecting the second shorting bar from the second signal lines.
9. The panel of claim 8, wherein the second floating switching elements are formed on the odd numbered second signal lines, respectively.
10. The panel of claim 8, wherein the second floating switching elements are formed on the even numbered second signal lines, respectively.
11. The panel of claim 8, wherein the second array test part comprises:
a third line electrically connected to the odd numbered second signal lines;
a third pad electrically connected to the third line, the third test signal being applied to the third line through the third pad;
a fourth line electrically connected to the even numbered second signal lines; and
a fourth pad electrically connected to the fourth line, the fourth test signal being applied to the fourth line through the fourth pad.
12. The panel of claim 11, wherein the third line comprises a plurality of first contact portions electrically connected to the odd numbered second signal lines, respectively, and the fourth line comprises a plurality of second contact portions electrically connected to the even numbered second signal lines, respectively.
13. The panel of claim 8, wherein the second signal lines are the scan lines, respectively.
14. The panel of claim 8, wherein the second floating switching elements have a staggered structure.
15. A method of manufacturing a panel for a display device, the method comprising:
forming a first conductive pattern on a substrate, the first conductive pattern comprising a gate electrode, a first testing line, a second testing line, wherein the gate electrode is electrically floating;
forming a first insulation layer on the first conductive pattern;
forming a second conductive pattern on the first insulation layer, the second conductive pattern comprising a first shorting bar, a source electrode connected to the first shorting bar, a drain electrode, an even or an odd data line connected to the drain electrode, wherein the gate electrode, the source electrode and the drain electrode form a transistor that is formed only between the first shorting bar and a first alternating one of the even or odd data line thereby electrically disconnecting the first shorting bar from the first alternating one of the even or the odd data line so that a second alternating one of the even or odd data line is electrically connected to the first shorting bar;
forming a second insulating layer over the second conductive pattern;
forming a first contact hole via the first insulation layer and the second insulation layer to expose the first shorting bar;
forming a second contact hole via the second insulation layer to expose a second alternating one of the data line; and
forming a third conductive pattern on the second insulating layer, the third conductive pattern comprising a contact portion electrically interconnecting the second testing line and the second alternating one of the data line via the first contact hole and the second contact hole.
16. A method of manufacturing a panel for a display device, the method comprising:
forming a first conductive pattern on a substrate, the first conductive pattern comprising a first shorting bar, a plurality of gate lines, a first testing bar and a second testing bar, a plurality of first gate electrodes connected to the plurality of gate lines, and a plurality of second gate electrodes electrically floating;
forming a first insulation layer on the first conductive pattern;
forming a second conductive pattern on the first insulation layer, the second conductive pattern comprising a second shorting bar, a plurality of data lines divided into a first data line group and a second data line group, a plurality of first source and drain electrode pairs corresponding to the first gate electrodes and a plurality of second source and drain electrode pairs corresponding to the second gate electrodes, wherein each second source and drain electrode pair is coupled only between the second shorting bar and the data lines of the second data line group thereby electrically disconnecting the second shorting bar with the data lines of the second data line group so that the data lines of the first data line group is electrically connected to the second shorting bar, wherein the data lines of the second data line group alternate with the data lines of the first data line group;
forming a second insulation layer on the second conductive pattern;
forming a plurality of first contact holes exposing the first testing bar via the first insulation layer and the second insulation layer, a plurality of second contact holes exposing the second testing bar via the first insulation layer and the second insulation layer, a plurality of third contact holes exposing the data lines of the first data line group via the second insulation layer, and a plurality of fourth contact holes exposing the data lines of the second data line group; and
forming a third conductive pattern on the second insulation layer, the third conductive pattern comprising a plurality of first contact portions electrically interconnecting the first testing bar and the data lines of the first data line group, respectively, via the first contact holes and the third contact holes, and a plurality of second contact portions electrically interconnecting the second testing bar and the data lines of the second data line group, respectively, via the second contact holes and the fourth contact holes.
17. The method of claim 16, further comprising a step of forming a semiconductor pattern on the first insulation layer, the semiconductor pattern comprising a first semiconductor pattern overlapping the first gate electrodes and second semiconductor pattern overlapping the second gate electrodes.
18. The method of claim 16, wherein the third conductive pattern further comprises a plurality of pixel electrodes.
19. The method of claim 18, wherein the second insulation layer further comprises a plurality of fifth contact holes exposing the first drain electrodes, and the pixel electrodes are electrically connected to the first drain electrodes via the fifth contact holes.
20. A panel, comprising:
a shorting bar;
a first testing bar;
a second testing bar;
a plurality of signal lines divided into a first signal line group electrically connected to the first testing bar and the shorting bar, and a second signal line group electrically connected to the second testing bar; and
a plurality of floating transistors formed between the shorting bar and the signal lines of the second signal line group to electrically disconnect the shorting bar from the signal lines of the second signal line group,
wherein the signal lines are data lines.
21. A panel for a display device, comprising:
a substrate;
a plurality of first signal lines formed on the substrate and extended in a first direction;
a first shorting bar formed on the substrate corresponding to end portions of the first signal lines, extended in a second direction and dissipating an electrostatic charge;
a first array test part extended in the second direction and applying a first test signal to odd numbered first signal lines and a second test signal to even numbered first signal lines; and
a plurality of first floating switching elements formed on first alternating ones of the first signal lines between the first shorting bar and the first array test part, the first floating switching elements electrically disconnecting the first shorting bar from first alternating ones of the first signal lines so that second alternating ones of the first signal lines are electrically connected to the first shorting bar,
wherein the first signal lines are scan lines.
22. A panel, comprising:
a shorting bar;
a first testing bar;
a second testing bar;
a plurality of signal lines divided into a first signal line group electrically connected to the first testing bar and the shorting bar, and a second signal line group electrically connected to the second testing bar; and
a plurality of floating transistors formed between the shorting bar and the signal lines of the second signal line group to electrically disconnect the shorting bar from the signal lines of the second signal line group,
wherein the signal lines are scan lines.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

What is claimed is:

1. A method for improving vascular access in a patient in need thereof comprising administering to said patient a therapeutically effective amount of at least one amine polymer.
2. The method of claim 1 wherein said amine polymer is a cross-linked polyallylamine.
3. The method of claim 2 wherein said amine polymer is cross-linked by means of a multifunctional cross-linking agent.
4. The method of claim 3 wherein said cross-linking agent comprises epichlorohydrin.
5. Use of a therapeutically effective amount of at least one amine polymer for the manufacture of a medicament for the purpose of improving vascular access in an individual in need thereof.

1. A method, comprising:
identifying a target depth of a metal silicide region to be formed in a silicon-containing semiconductor region formed above a substrate;
forming a dopant profile in said silicon-containing semiconductor region along a depth direction of said silicon-containing semiconductor region on the basis of said target depth so as to obtain a local maximum of a dopant concentration near said target depth; and
forming said metal silicide region on the basis of said target depth.
2. The method of claim 1, wherein forming said dopant profile comprises performing an ion implantation process, wherein an implantation dose and energy are controlled to substantially create said dopant profile.
3. The method of claim 2, wherein said ion implantation process comprises at least one first implantation step with a first dopant species of a first conductivity type.
4. The method of claim 3, wherein said dopant profile is substantially determined by said first dopant species.
5. The method of claim 3, wherein said ion implantation process comprises at least one second implantation step with a second dopant species other than said first dopant species, wherein said first and second dopant species substantially determine said local maximum.
6. The method of claim 1, wherein forming said dopant profile comprises introducing a dopant species by at least one of deposition and diffusion.
7. The method of claim 1, wherein said silicon-containing semiconductor region including said dopant profile represents at least one of a drain region and source region of a field effect transistor.
8. The method of claim 1, wherein forming said metal silicide region comprises depositing a layer of refractory metal above said silicon-containing semiconductor region and heat treating said substrate so as to initiate metal diffusion to form said metal silicide.
9. The method of claim 8, wherein at least one of a thickness of said layer of refractory metal, a temperature of said heat treatment and a duration of said heat treatment is controlled so as to stop a silicide growth substantially at said target depth.
10. A method, comprising:
identifying a first target depth for a metal silicide region for a drain and source region of a first specified transistor type to be formed on one or more substrates;
forming said drain and source regions of said first specified transistor type on one or more substrates with a dopant profile, with respect to a depth direction of said one or more substrates, on the basis of said first target depth so as to obtain, for increasing depth, an increasing dopant concentration when approaching said first target depth; and
forming said metal silicide region in said drain and source regions of the first specified transistor type on the basis of said first target depth.
11. The method of claim 10, wherein forming said drain and source regions comprises performing an ion implantation process, wherein implantation dose and energy are controlled to substantially create said dopant profile.
12. The method of claim 11, wherein said ion implantation process comprises at least one first implantation step with a first dopant species of a first conductivity type.
13. The method of claim 12, wherein said dopant profile is substantially determined by said first dopant species.
14. The method of claim 12, wherein said ion implantation process comprises at least one second implantation step with a second dopant species other than said first dopant species, wherein said first and second dopant species substantially determine said dopant profile.
15. The method of claim 10, wherein forming said drain and source regions comprises introducing a dopant species by at least one of deposition and diffusion.
16. The method of claim 10, wherein forming said metal silicide region comprises depositing a layer of refractory metal above a silicon-containing semiconductor region formed on said one or more substrates and heat treating said one or more substrates to initiate metal diffusion to form said metal silicide.
17. The method of claim 16, wherein at least one of a thickness of said layer of refractory metal, a temperature of said heat treatment and a duration of said heat treatment is controlled so as to stop the silicide growth substantially at said first target depth.
18. The method of claim 10, further comprising:
identifying a second target depth for a second metal silicide region to be formed in a drain and source region of a second specified transistor type to be formed on said one or more substrates;
forming said drain and source regions of said second specified transistor type with a second dopant profile, with respect to said depth direction of said one or more substrates, on the basis of said second target depth so as to obtain, for increasing depth, an increasing second dopant concentration when approaching said second target depth; and
forming said second metal silicide region in said drain and source regions of the second specified transistor type so as to stop a metal silicide growth substantially at said second target depth.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A method for producing a liquid discharging head including an element substrate that is provided with a discharge opening for discharging a liquid and a supporting member that supports the element substrate, the element substrate having a first surface and a second surface that is opposite to the first surface, the supporting member having a height reference surface and an element-substrate bonding surface to which the first surface is bonded with an adhesive, the method comprising the steps of:
measuring a height h of the element-substrate bonding surface from the height reference surface;
applying the adhesive to the element-substrate bonding surface; and
causing the first surface to oppose the element-substrate bonding surface with the adhesive being provided therebetween, and disposing the second surface at a predetermined height m from the height h that has been measured to harden the adhesive at a portion between the element-substrate bonding surface and the element substrate.
2. The method according to claim 1, wherein a laser is used as a unit configured to measure the height h.
3. The method according to claim 1, wherein a portion where the height h is measured is the entire element-substrate bonding surface.
4. The method according to claim 1, wherein, when the element-substrate bonding surface is rectangular, a portion where the height h is measured is one of four corners or more than one of the four corners of the element-substrate bonding surface.
5. A method for producing a liquid discharging head including an element substrate that is provided with a discharge opening for discharging a liquid and a supporting member that supports the element substrate, the element substrate having a first surface and a second surface that is opposite to the first surface, the supporting member having a height reference surface and an element-substrate bonding surface to which the first surface is bonded with an adhesive, the method comprising the steps of:
providing a height measurement surface at the supporting member, the height measurement surface being a surface where a height h from the height reference surface is measured, the height of the height measurement surface from the height reference surface being the same as a height of the element-substrate bonding surface;
measuring the height h of the height measurement surface from the height reference surface;
applying the adhesive to the element-substrate bonding surface; and
causing the first surface to oppose the element-substrate bonding surface with the adhesive being provided therebetween, and disposing the second surface at a predetermined height m from the height h that has been measured to harden the adhesive at a portion between the element-substrate bonding surface and the element substrate.
6. The method according to claim 5, wherein the step for measuring the height h is performed after the step for applying the adhesive, or the step for applying the adhesive is performed after the step for measuring the height h.
7. The method according to claim 5, wherein one height measurement surface or a plurality of the height measurement surfaces are provided, and
wherein, when the height measurement surface or each height measurement surface is provided continuously with the element-substrate bonding surface and the element-substrate bonding surface is rectangular, the one height measurement surface is provided adjacent to one of four corners of the element-substrate bonding surface or the plurality of the height measurement surfaces are provided at more than one of the four corners of the element-substrate bonding surface.
8. A liquid discharging head comprising:
an element substrate that is provided with a discharge opening for discharging a liquid; and
a supporting member that supports the element substrate, the supporting member having an element-substrate bonding surface to which the element substrate is bonded with an adhesive,
wherein the supporting member has a height reference surface and a height measurement surface whose height from the height reference surface is measured, and
wherein the height of the height measurement surface from the height reference surface is the same as a height of the element-substrate bonding surface from the height reference surface.
9. The liquid discharging head according to claim 8, wherein the height measurement surface is provided continuously with the element-substrate bonding surface.
10. The liquid discharging head according to claim 8, wherein one height measurement surface or a plurality of the height measurement surfaces are provided, and
wherein, when the element-substrate bonding surface is rectangular, the one height measurement surface is provided adjacent to one of four corners of the element-substrate bonding surface or the plurality of the height measurement surfaces are provided adjacent to more than one of the four corners of the element-substrate bonding surface.
11. The liquid discharging head according to claim 8, wherein a plurality of the height measurement surfaces are provided, and
wherein the plurality of the height measurement surfaces are disposed along one side or a plurality of sides of an outer periphery of the element-substrate bonding surface.
12. A method for producing a liquid discharging head including an element substrate that is provided with a discharge opening for discharging a liquid and a supporting member that supports the element substrate, the element substrate having a first surface and a second surface that is opposite to the first surface, the supporting member having a height reference surface and an element-substrate bonding surface to which the first surface is bonded with an adhesive, the method comprising the steps of:
measuring a height h of the element-substrate bonding surface from the height reference surface;
applying the adhesive to the element-substrate bonding surface; and
with the element-substrate bonding surface and the first surface opposing each other with the adhesive therebetween and the adhesive being in contact with both of the element-substrate bonding surface and the first surface, disposing the second surface at a predetermined height m from the height h that has been measured, and hardening the adhesive at a portion between the element-substrate bonding surface and the element substrate.