Author: claimsbot

1. A method of forming a stent comprising the steps of:
utilizing an elongated composite member including an outer member and a core member disposed within a lumen of the outer member;
shaping the composite member into a stent pattern including a waveform having a plurality of struts interconnected by crowns;
forming openings through the outer member;
after the step of shaping the composite member into the pattern, processing the composite member such that the core member is removed from at least a plurality of the struts of the waveform without adversely affecting the outer member and such that the core member is not removed from at least a plurality of the crowns of waveform, thereby leaving the outer member with a lumen in at least a plurality of the struts and the outer member with the core member in at least a plurality of the crowns.
2. The method of claim 1, further comprising the step of filling the lumens with a biologically or pharmacologically active substance after the core member has been removed.
3. The method of claim 2, wherein the biologically or pharmacologically active substance is selected from the group consisting of antineoplastic, antimitotic, antiinflammatory, antiplatelet, anticoagulant, anti fibrin, antithrombin, antiproliferative, antibiotic, antioxidant, and antiallergic substances as well as combinations thereof.
4. The method of claim 1, wherein the step of processing the composite member comprises exposing the composite member to an etchant that reacts with the core member to remove the core member, wherein the etchant does not react with the outer member.
5. The method of claim 4, wherein the etchant is a liquid chemical that dissolves the core member.
6. The method of claim 5, wherein the etchant is a gas.
7. The method of claim 6, wherein the outer member is formed from MP35N, the core member is formed from one of tantalum, tungsten, molybdenum, niobium, rhenium, carbon, germanium, and silicon, and the etchant is xenon difluoride.
8. The method of claim 4, wherein the core member is soluble in the etchant and the outer member is not soluble in the etchant.
9. The method of claim 1, wherein the core member is removed from all of the struts.
10. The method of claim 1, wherein the core member is not removed from any of the crowns.
11. The method of claim 1, wherein the core member is more radiopaque than the outer member.
12. The method of claim 1, further comprising the step of removing a portion of the core member in the at least a plurality of crowns with the core member remaining such that a lumen is provided through the crowns while a portion of the core member remains in the crowns.
13. A method of forming a stent comprising the steps of:
utilizing a plurality of elongated composite members, each composite member including an outer member and an inner member disposed within a lumen of the outer member;
shaping each composite member into a waveform having a plurality of struts interconnected by crowns;
wrapping each waveform into a cylindrical element;
aligning the cylindrical elements along a common longitudinal axis and joining the cylindrical elements together to form a tubular stent;
forming openings through the outer members;
after the step of shaping the composite members into a waveform, processing the composite members such that the inner member is removed from at least a plurality of the struts of the waveform without adversely affecting the outer member and such that the core member is not removed from at least a plurality of the crowns of the waveform, thereby leaving the outer member with a lumen in at least a plurality of the struts and the outer member with a core member in at least a plurality of the crowns.
14. The method of claim 13, further comprising the step of filling the lumens with a biologically or pharmacologically active substance after the core member has been removed.
15. The method of claim 14, wherein the biologically or pharmacologically active substance is selected from the group consisting of antineoplastic, antimitotic, antiinflammatory, antiplatelet, anticoagulant, anti fibrin, antithrombin, antiproliferative, antibiotic, antioxidant, and antiallergic substances as well as combinations thereof.
16. The method of claim 13, wherein the step of processing the composite member comprises exposing the composite member to an etchant that reacts with the core member to remove the core member, wherein the etchant does not react with the outer member.
17. The method of claim 16, wherein the etchant is a liquid chemical that dissolves the core member.
18. The method of claim 17, wherein the etchant is a gas.
19. The method of claim 18, wherein the outer member is formed from MP35N, the core member is formed from one of tantalum, tungsten, molybdenum, niobium, rhenium, carbon, germanium, and silicon, and the etchant is xenon difluoride.
20. The method of claim 16, wherein the core member is soluble in the etchant and the outer member is not soluble in the etchant.
21. The method of claim 13, wherein the core member is removed from all of the struts.
22. The method of claim 13, wherein the core member is not removed from any of the crowns.
23. The method of claim 13, wherein the core member is more radiopaque than the outer member.
24. The method of claim 13, further comprising the step of removing a portion of the core member in the at least a plurality of crowns with the core member remaining such that a lumen is provided through the crowns while a portion of the core member remains in the crowns.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A device for cooling a coolant in a gas turbine, comprising:
a plurality of interconnected evaporator tubes arranged in a coolant channel connected to the gas turbine to accommodate a flow of the coolant and to provide a forced through-flow steam generator, whereby the coolant evaporates completely in the evaporator tubes in a single pass through the evaporator tubes and each of the evaporator tubes has internal fins and the coolant channel is designed for direct flow of the coolant for the gas turbine in an substantially horizontal direction, an longitudinal axis of the evaporator tubes substantially aligned in a vertical direction.
2. The device according to claim 1, wherein compressor air from the gas turbine is applied to the coolant channel.
3. The device according to one of claim 1, wherein the flow medium is applied to the evaporator tubes via a supply line preceding them on the inlet side, wherein mechanisms to select the throughflow rate of the flow medium are connected to the supply line.
4. The device according to claim 3, wherein the means of setting the throughflow rate of the flow medium include a flow restrictor connected to the supply line.
5. The device according to claim 2, wherein the flow medium is applied to the evaporator tubes via a supply line preceding them on the inlet side, wherein means to select the throughflow rate of the flow medium are connected to the supply line.
6. The device according to claim 1, wherein the forced throughflow steam generator functions by using heat produced while cooling the coolant to generate high quality steam.
7. A gas and steam turbine, comprising:
a device for a coolant cooling of a gas turbine, in which a number of interconnected evaporator tubes are arranged in a coolant channel connected to the gas turbine for a flow medium for a formation of a forced throughflow steam generator, whereby the flow medium is adapted to evaporate completely in the evaporator tubes in a single operation;
a waste heat steam generator connected to an exhaust gas side of the gas turbine, wherein the heating surfaces are connected to a water-steam circuit of the steam turbine; and
a supply line connecting the evaporator tubes on the inlet side to the feedwater train of the water-steam circuit of the steam turbine,
wherein the supply line is connected on the inlet side via a first partial flow line to a first partial component of the feedwater train preceding a feedwater preheater and via a second partial flow line to a second partial component of the feedwater train downstream of the feedwater preheater.
8. The gas and steam turbine according to claim 7, wherein the evaporator tubes of the device assigned to the gas turbine for coolant cooling are connected on the outlet side to a high-pressure stage of the water-steam circuit.
9. The gas and steam turbine according to claim 7, wherein in each of the first and second partial flow lines, mechanisms of setting the throughflow rate of the respective partial flow are connected to flow medium to which a control system is assigned, via which the flow ratio of the partial flows is adjustable in the partial flow lines as a function of a characteristic value for a temperature value of the coolant to be cooled.
10. A device for cooling a coolant in a gas turbine, comprising:
a plurality of interconnected evaporator tubes arranged in a coolant channel connected to the gas turbine to accommodate a flow of the coolant and to provide a forced through-flow steam generator, whereby the coolant evaporates completely in the evaporator tubes in a single pass through the evaporator tubes and at least some of the evaporator tubes have internal fins and the coolant channel is designed for direct flow of the coolant for the gas turbine in an substantially horizontal direction, an longitudinal axis of the evaporator tubes substantially aligned in a vertical direction.

What is claimed is:

1. A storage device with at least, a head for writing data in or reading data from a storage medium, accommodated in an enclosure thereof, said storage device comprising:
an external recording circuit provided outside said enclosure for outputting write data comprising parallel data; and
an internal recording circuit provided inside said, enclosure for receiving write data comprising parallel data supplied from said external recording circuit; wherein said internal recording circuit comprising at least:
a parallel-to-serial conversion circuit for converting the received write data comprising parallel data to serial data;
a write compensation circuit for changing a timing for writing data having been converted to serial data; and
a write amplifier for switching a polarity of a recording current to be supplied to said head according to the serial write data of which a write timing is adjusted.
2. A storage device according to claim 1; wherein said internal recording circuit is based on the PRML detection system, and said write compensation circuit is a circuit for previously compensating non-linear recording distortion occurring to a recording medium by changing a timing for writing.
3. A storage device according to claim 1; wherein said internal recording circuit is based on the PRML detection system, further has an internal reproducing circuit provided inside the enclosure and also has an external reproducing circuit provided outside the enclosure, and said internal reproducing circuit comprises:
an equalizer. circuit for executing an equalizing operation for a read signal amplified by said preamplifier; and
a serial-to-parallel conversion circuit for converting read data comprising the serial data having been subjected to an equalizing operation to parallel data and outputting the parallel data to said external reproducing circuit.
4. A storage device according to claim 1; wherein said internal recording circuit further comprises an encoder circuit for encoding the serial data converted by said parallel-to-serial conversion circuit.
5. A storage device according to claim 1; wherein said write compensation circuit is a circuit for previously compensating a peak shift due to interference between waveforms by changing a timing for writing.
6. A storage device according to claim 1; wherein said storage device further comprising at least:
an internal reproducing circuit provided inside the enclosure and also having an external reproducing circuit provided outside the enclosure; wherein said internal reproducing circuit comprises:
a preamplifier for amplifying a read signal detected by said head;
a decoder circuit for decoding the read signal amplifier by said preamplifier; and
a serial-to-parallel conversion circuit for converting the read data comprising the decoded serial data to parallel data and outputting the parallel data to said external reproducing circuit.
7. A storage device according to claim 1; wherein said internal recording circuit is based on the PRML detection system and comprises:
a precoder circuit for previously executing an operation reverse to an equalizing operation executed to read data when reproducing the read data to the serial data converted by said parallel-to-serial conversion circuit.
8. A storage device according to claim 7; wherein said internal recording circuit is based on the PRML detection system, further has an internal reproducing circuit provided inside the enclosure and also has an external reproducing circuit provided outside the enclosure, and said internal reproducing circuit comprises:
an equalizer circuit for executing an equalizing operation for a read signal amplified by said preamplifier; and
a serial-to-parallel conversion circuit for converting read data comprising the serial data having been subjected to an equalizing operation to parallel data and outputting the parallel data to said external reproducing circuit.
9. A storage device according to claim 7; wherein said internal recording circuit is based on the PRML detect ion system, and said write compensation circuit is a circuit for previously compensating non-linear recording distortion occurring to a recording medium by changing a timing for writing.
10. A storage device according to claim 9; wherein said internal recording circuit is based on the PRML detection system, further has an internal reproducing circuit provided inside the enclosure and also has an external reproducing circuit provided outside the enclosure, and said internal reproducing circuit comprises:
an equalizer circuit for executing an equalizing operation for a read signal amplified by said preamplifier; and
a serial-to-parallel conversion circuit for converting read data comprising the serial data having been subjected to an equalizing operation to parallel data and outputting the parallel data to said external reproducing circuit.
11. A storage device according to claim 1; wherein said internal recording circuit further comprises:
a synthesizer circuit for generating a timing signal and a clock signal each for writing data.
12. A storage device according to claim 1; wherein some or all of the circuits constituting said internal recording circuit andor the internal reproducing circuit are provided on a carriage supporting said head thereon.
13. A storage device according to claim 12; wherein said internal recording circuit andor internal reproducing circuit is formed with a single semiconductor chip.
14. A storage device according to claim 1; wherein some or all of the circuits constituting said internal recording circuit andor internal reproducing circuit are connected to a section between a carriage supporting the head and the external recording circuit andor said external reproducing circuit and are also provided on a flexible printed circuit board provided inside said enclosure.
15. A storage device according to claim 14; wherein said internal recording circuit andor internal reproducing circuit is formed with a single semiconductor chip.
16. A storage device with at least a storage medium, a head for writing data in or reading data from said storage medium, and a motor for driving said storage medium and head accommodated in an enclosure thereof, said storage device comprising:
an external recording circuit provided outside said enclosure for converting write data comprising parallel data to serial data and outputting the serial data; and
an internal recording circuit provided inside said enclosure for receiving write data comprising the serial data supplied from said external recording circuit; wherein said internal recording circuit comprises:
a correcting circuit for correcting rise and fall of a received write data pulse; and
a write amplifier for switching a polarity of a recording current to be supplied to said head according to the amplified write data.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A system, comprising:
a client device configured to transmit data to a host device, receive data from a host device, determine client clock phase information between a local client clock signal generated from a system timing signal and data received from the host device, and transmit client clock phase information to the host device during an electrical turnaround time between read and write operations over a data bus coupling the client device and the host device; and
a host device configured to receive the client clock phase information from the client device, the host device comprising shared data synchronization resources that use the client clock phase information to adjust a host clock for transmitting data to the at least one client device, wherein the shared resources are shared between transmit and receive functions of the host device.
2. The system of claim 1, wherein said host device further comprises a shared phased interpolator that adjusts a host clock based at least on the client clock phase information.
3. A phase detector for receiving data on a data link and for receiving a local clock signal during an electrical turnaround time between read and write operations over a data bus coupling a client device and a host device, said detector comprising:
a sampler that detects the relationship between the local clock signal and the received data and generates a phase information signal indicative of said detected relationship;
a logic unit for encoding the phase information signal as clock phase information; and
a transmitter that transmits the clock phase information,
wherein the clock phase information enables adjusting a host clock for transmitting data to at least one client device.
4. The detector of claim 3, wherein said phase information signal is a two bit encoded signal.
5. The detector of claim 3, wherein said logic identifies the local clock signal as one of early, late and aligned.
6. The detector of claim 3, wherein said logic is suitable for controlling a shared phase interpolator, which interpolator adjusts a local host clock.
7. The detector of claim 3, wherein said logic comprises phase control logic.
8. The detector of claim 3, wherein said detected relationship is a phase relationship.
9. The detector of claim 3, wherein the local clock signal is detected using an active edge.
10. The detector of claim 3, wherein the data is detected using a data eye.
11. The detector of claim 3, wherein the determined logic is transmitted during periods when the data link is not in use.
12. A host device for correcting a phase relationship determined at a client device between received data of the client device on a data link and a local clock signal of the client device, said host device comprising:
a receiver that receives logic during an electrical turnaround time between read and write operations over a data bus coupling the client device and the host device, wherein said received logic is determined from a phase information signal derived at the client device by comparing the phase relationship of a system timing signal generated local client clock signal and data received from the host device, wherein the phase information signal is indicative of the relationship between the client device local clock signal and client device received data; and
a synchronizer that determines an offset from the received logic and adjusts a host clock signal relative to said determined offset.
13. The device of claim 12, wherein the logic identifies the local client clock signal as one of early, late and aligned.
14. The device of claim 12, wherein said logic comprises phase control logic.
15. The device of claim 12, wherein said detected relationship is a phase relationship.
16. The device of claim 12, wherein the client device received data is detected using the data eye.
17. The device of claim 12, wherein the logic is received during periods when the data link is not in use.