1461152834-610fd14b-e7eb-49dc-84fc-652081c0e4e5

1. A client device, comprising:
one or more processors; and
memory, communicatively coupled to the one or more processors, storing one or more modules configured to:
receive, from an application of the client device, a request for a range of bytes of content that is stored at a content source, the range of bytes being equal to or less than a byte range of an entirety of the content;
determine one or more data blocks associated with the range of bytes of content to request from the content source;
convert the request for the one or more data blocks into a request for one or more data chunks associated with the range of bytes of content, the one or more data chunks comprising the one or more data blocks that have been processed;
request the one or more data chunks from the content source;
receive the one or more data chunks from the content source;
process the one or more data chunks by at least one of validating, decrypting, or decompressing the one or more data chunks;
re-create, responsive to processing the one or more data chunks, the one or more data blocks from the one or more data chunks to create re-created one or more data blocks;
combine the re-created one or more data blocks;
remove portions of the re-created one or more data blocks to create refined one or more data blocks that correspond to the requested range of bytes of the content; and
provide the refined one or more data blocks to the application of the client device as the requested range of bytes of the content.
2. A method implemented by a device, comprising:
receiving, at the device, a request for a portion of content being stored in a content source as a plurality of data chunks, the request indicating a data range of the content;
receiving, at the device, metadata from the content source, the metadata indicating processing performed at the content source on a plurality of data blocks to create the plurality of data chunks;
requesting, by the device, one or more data chunks of the plurality of data chunks from the content source based on the data range and the metadata;
receiving, at the device, the one or more data chunks from the content source;
processing, at the device, the one or more data chunks into one or more data blocks of the content, the processing comprising:
at least one of validating, decrypting, or decompressing the one or more data chunks;
creating, responsive to processing the one or more data chunks, the one or more data blocks from the one or more data chunks; and
removing data from the one or more data blocks that is not part of the data range; and

providing, by the device, the one or more data blocks as the portion of the content.
3. The method of claim 2, wherein the receiving the request includes receiving the request for the portion of the content from an application of the device.
4. The method of claim 2, further comprising:
before receiving the metadata, determining that the metadata indicating processing performed at the content source is not stored in the device; and
requesting the metadata from the content source.
5. The method of claim 2, wherein the processing the one or more data chunks includes processing the one or more data chunks based on the metadata.
6. The method of claim 2, wherein:
the metadata includes validation information for the plurality of data chunks; and
the processing the one or more data chunks includes validating the one or more data chunks based on the validation information included in the metadata.
7. The method of claim 6, wherein:
the validation information includes at least one of a computed hash value for the plurality of data chunks or a hash algorithm utilized at the content source; and
the processing the one or more data chunks includes validating the one or more data chunks based on at least one of the computed hash value or the hash algorithm.
8. The method of claim 2, wherein the metadata includes validation information, encryption information, and compression information for the plurality of data chunks, and
the processing the one or more data chunks includes:
validating the one or more data chunks with the validation information;
decrypting the one or more data chunks with the encryption information; and
decompressing the one or more data chunks with the compression information.
9. The method of claim 2, wherein the metadata includes position information, size information, and identification information for at least one of the plurality of data blocks or the plurality of data chunks,
the position information indicating a position of the at least one of the plurality of data blocks or the plurality of data chunks with respect to the content,
the identification information identifying a data block that is associated with a data chunk, and
the size information indicating a data size of the at least one of the plurality of data blocks or the plurality of data chunks.
10. The method of claim 9, further comprising:
determining, in response to receiving the request for the portion of content, a list of data blocks based on the data range and at least one of the position information, size information, or identification information; and
converting the list of data blocks to a list of data chunks based on at least one of the position information, size information, or identification information.
11. The method of claim 2, further comprising:
combining, before removing the data from the one or more data blocks, the one or more data blocks to create combined one or more data blocks corresponding to the portion of the content;
removing the data from the combined one or more data blocks; and
providing the combined one or more data blocks as the portion of the content.
12. The method of claim 2, wherein:
the content comprises an application to be installed on the device; and
the receiving the request includes receiving a request for a portion of the application from an installation application of the device.
13. The method of claim 2, wherein:
the content comprises media data to be reproduced on the device; and
the receiving the request includes receiving a request for a portion of the media data from a media application configured to reproduce the media data.
14. One or more computer storage media storing computer-readable instructions that, when executed by a computing device having one or more processors, instruct the one or more processors to perform operations comprising:
receiving a request for a portion of content, the content being stored in a content source as a plurality of data chunks, the request indicating a data range of the content;
receiving metadata from the content source, the metadata indicating processing performed at the content source on a plurality of data blocks to create the plurality of data chunks;
requesting one or more of the plurality of data chunks from the content source based on the data range and the metadata;
receiving the one or more data chunks of the plurality of data chunks from the content source;
processing the received one or more data chunks into one or more data blocks of the content, the processing comprising:
at least one of validating, decrypting, or decompressing the one or more data chunks;
creating, responsive to processing the one or more data chunks, the one or more data blocks from the one or more data chunks; and
removing data from the one or more data blocks that is not part of the data range; and

providing the one or more data blocks as the portion of the content.
15. The one or more computer storage media of claim 14, wherein the receiving the request includes receiving the request for the portion of content from an application of the computing device.
16. The one or more computer storage media of claim 14, wherein the operations further comprise:
before receiving the metadata, determining that the metadata indicating processing performed at the content source is not stored in the computing device; and
requesting the metadata from the content source.
17. The one or more computer storage media of claim 14, wherein the processing the one or more data chunks includes processing the one or more data chunks based on the metadata.
18. The one or more computer storage media of claim 14, wherein:
the metadata includes validation information for the plurality of data chunks; and
the processing the one or more data chunks includes validating the one or more data chunks based on the validation information included in the metadata.
19. The one or more computer storage media of claim 14, wherein:
the validation information includes at least one of a computed hash value for the plurality of data chunks or a hash algorithm utilized at the content source; and
the processing the one or more data chunks includes validating the received one or more data chunks based on at least one of the computed hash value or the hash algorithm.
20. The one or more computer storage media of claim 14, wherein the metadata includes validation information, encryption information, and compression information for the plurality of data chunks, and
the processing the received one or more data chunks includes:
validating the one or more data chunks with the validation information;
decrypting the one or more data chunks with the encryption information; and
decompressing the one or more data chunks with the compression information.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

What is claimed is:

1. A disk holder comprising:
a generally bow-shaped base having a plurality of elongated first slots;
a bow-shaped cover member disposed over the base having a plurality of elongated second slots aligning with the first slots;
a gasket disposed between the base and the cover member.
2. The disk holder defined by claim 1, wherein the width of the first and second slots is greater than the width of the disk.
3. The disk holder defined by claim 2, wherein alternate ones of the first and second slots extend downwardly a greater distance on one side of the base and cover member than on the other side.
4. The disk holder defined by claim 1 or 3, wherein the gasket member includes a plurality of elongated openings centered on the first and second slots.
5. The disk holder defined by claim 4, wherein the openings have a width less than a thickness of the disk.
6. The disk holder defined by claim 5, wherein the gasket comprises a pliable material.
7. The disk holder defined by claim 6, including fasteners for holding together the base and cover.
8. The disk holder defined by claim 7, wherein the base and cover are plastic.
9. The disk holder defined by claim 8, wherein the disk is a compact disk.

1461152824-0f2a6dc5-4ac3-444d-abc5-bb5b5e157172

1. A clock synthesizer for generating a desired clock signal from an input clock signal, comprising:
an exclusive OR gate, having a first input, a second input and an output, the first input coupled to receive a reset signal;
a delay string buffer having an input, a control input and an output, the delay string buffer input coupled to the output of the exclusive OR gate,
wherein;
a fine tuning unit, having an input, a control input and an output, the fine tuning unit input coupled to the output of the delay string buffer, the fine tuning unit output coupled to the second input of the exclusive OR gate; and
a control unit, having a first input, a second input and an output, the first input of the control unit coupled to receive the input clock signal and the second input of the control unit coupled to the output of the exclusive OR gate to generate a control signal at the output;
wherein the control input of the delay string buffer is coupled to receive the control signal to provide a coarse adjustment of the input clock signal corresponding to the desired clock signal, and wherein the control input of the fine tuning unit is coupled to receive the control signal to provide a fine adjustment of the input clock signal corresponding to the desired clock signal.
2. The clock synthesizer of claim 1, wherein the delay string buffer comprises:
a multiplexer, having a plurality of inputs, a control input and an output, the multiplexer control input coupled to receive the control signal, wherein the output of the multiplexer provides the output of the delay string buffer; and
a plurality of tristated buffers, each having an input, a tristate input, and output, each of the plurality of buffers coupled in series, the input of each of the plurality of buffers coupled to a respective input of the plurality of inputs of the multiplexer, the input of the least significant one of the plurality of tristated buffers coupled to receive the output of the exclusive OR gate through the input of the delay string buffer, each of the plurality of tristate inputs coupled to receive the control signal.
3. The clock synthesizer of claim 2, wherein the plurality of tristate inputs are coupled to receive the control signal to switch specific ones of the plurality of tristate inputs on and off to save power.
4. The clock synthesizer of claim 1, wherein the fine tuning unit comprises:
an input buffer coupled to the fine tuning unit input;
a plurality of AND gates, each having a first input, a second input and an output, each of the plurality of the first inputs of the AND gates coupled to the input buffer, each of the plurality of the second inputs of the AND gates coupled to receive a respective bit of the control signal;
a plurality of intermediate buffers coupled to a respective one of the plurality of outputs of the plurality of AND gates; and
an OR gate, having an output and a plurality of inputs corresponding to the number of plurality of AND gates, wherein the plurality of inputs couple to each respective one of the plurality of intermediate buffers.
5. The clock synthesizer of claim 4, wherein the plurality of intermediate buffers are tristate buffers, having an input, a tristate input and an output, each one of the plurality of the tristate inputs coupled to receive the control signal to switch specific ones of the plurality of tristate inputs on and off to save power.
6. The clock synthesizer of claim 1, wherein a bus width of the output of the control unit is equal to the sum of the number (N) of bits necessary to control the fine tuning unit and the number (M) of bits necessary to control the delay string buffer.
7. A method of synthesizing a multiplied clock signal at a desired frequency, comprising:
a. receiving an input clock signal in a clock synthesizer;
b. resetting initialization variables for a control unit within the clock synthesizer;
c. generating a coarse adjustment for a delay buffer string within the clock synthesizer;
d. setting the coarse adjustment by sending control signals from the control unit to the delay buffer string;
e. generating a fine adjustment for a fine tuning unit within the clock synthesizer;
f. setting the fine adjustment by sending control signals from the control unit to the fine tuning unit;
g. providing dither to a generated clock signal by shifting the signal modified by the fine tuning unit:
h. monitoring the frequency of the generated clock signal at predetermined intervals (R) of time per second;
i. returning to step (e) when a fine adjustment of the generated clock signal is necessary; and
j. returning to step (h) until the system that incorporates the clock synthesizer powers down.
8. The method of claim 7, wherein the method further comprises returning to step (c) when a coarse adjustment of the generated clock signal is necessary after the monitoring step (h).
9. The method of claim 7, wherein the step of generating a coarse adjustment, comprises:
a. counting the cycles of the output clock and the input clock;
b. calculating the ratio of output clock cycles to the number of input clock cycles;
c. comparing the ratio to a predetermined desired ratio corresponding to the desired frequency; and
d. calculating coarse adjustment for a delay buffer string within the clock synthesizer corresponding to the desired frequency based upon the comparison of ratios.
10. The method of claim 7, wherein the step of generating a fine adjustment, comprises:
a. counting the cycles of the output clock and the input clock;
b. calculating the ratio of output clock cycles to the number of input clock cycles;
c. comparing the ratio to a predetermined desired ratio corresponding to the desired frequency;
d. calculating a residue from the comparison of ratios; and
e. calculating fine adjustment for a fine tuning unit within the clock synthesizer corresponding to the desired frequency based upon the residue.
11. The method of claim 7, wherein predetermined number (R) is equal to 10.
12. The method of claim 7, wherein the method further comprises switching on and off a plurality of tristated buffers within the fine tuning unit to save power and generate a clock signal at the desired frequency.
13. The method of claim 7, wherein the method further comprises switching on and off a plurality of tristated buffers within the delay buffer string to save power and generate a clock signal at the desired frequency.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A module connection assembly, comprising:
a plurality of backplanes;
a plurality of sets of module connectors, each set of module connectors being capable of electrically connecting modules to a different one of the plurality of backplanes; and
configuration conductors providing rigid metallic conductor paths between module connectors on different backplanes;
the plurality of backplanes and the configuration conductors providing a plurality of links which electrically connect the plurality of sets of module connectors in a logical torus having multiple dimensions, each link including a cableless electrical signal path formed exclusively of rigid metallic material.
2. The module connection assembly of claim 1 wherein the configuration conductors provide:
a plurality of switches that are remotely controlled to electrically connect the plurality of sets of module connectors in the logical torus.
3. The module connection assembly of claim 1 wherein the logical torus is three dimensional.
4. The module connection assembly of claim 1 wherein each cableless electrical path in a particular dimension has substantially the same length.
5. The module connection assembly of claim 1 wherein each cableless electrical path in a particular dimension includes bit paths having substantially the same lengths.
6. The module connection assembly of claim 1 wherein each given backplane of the plurality of backplanes electrically connects one of the sets of module connectors in an interleaved manner.
7. The module connection assembly of claim 6 wherein the module connectors of the one set are disposed physically in row segments on the given backplane, and wherein the given backplane electrically connects the row segments in an interleaved manner.
8. The module connection assembly of claim 6 wherein the module connectors of the one set are disposed physically in row segments on the given backplane, and wherein the given backplane structure electrically connects the module connectors of the one set within each row segment in an interleaved manner.
9. The module connection assembly of claim 6 wherein the module connectors of the one set are disposed physically in row segments on the given backplane; wherein the row segments are disposed physically on the given backplane in a two dimensional array; and wherein the given backplane electrically connects the row segments in an interleaved manner and electrically connects the module connectors of the one set within each row segment in an interleaved manner such that the given backplane electrically connects the one of the sets of module connectors in an interleaved manner in three dimensions.