1460762665-45b62af9-a85c-46a2-a6ae-904338ab6d7c

1. A grant generator for switching service section, comprising:
a structure comprising a plurality of binary round robin tree (BRRT) cells, each BRRT cell having one or more request inputs and a request output, a grant input and one or more grant signal outputs, and a control signal input, each of the BRRT cells providing a request output to another BRRT cell or to a final request output for the structure; and
a preference pointer coupled to the plurality of BRRT cells wherein the preference pointer is to provide one or more control signals to each of the BRRT cells at the control signal input of each BRRT cell.
2. The grant generator as recited in claim 1, wherein the grant generator is a functionality within a crossbar switch structure.
3. The grant generator as recited in claim 1, wherein the grant generator comprises a quadrature based grant generator.
4. The grant generator as recited in claim 3, wherein the quadrature based grant generator services four quadrants.
5. The grant generator as recited in claim 4, wherein each of the four quadrants corresponds to a plurality of ports, wherein each quadrant comprises a plane, and wherein the structure is expressed within each plane.
6. The grant generator as recited in claim 4, wherein the plurality of ports comprises eight ports and wherein a total of 32 ports is serviced.
7. The grant generator as recited in claim 1, wherein each of the plurality of BRRT cells comprises a type selected from the group consisting of \u2018basic\u2019 BRRT cells, \u2018enable\u2019 BRRT cells further including an enabling input, and \u2018single grant\u2019 BRRT cells having a single request input and a single grant output.
8. The grant generator as recited in claim 7, wherein the structure comprises an arrangement of the BRRT cells, and wherein the arrangement comprises a cascade of BRRT cells.
9. The grant generator as recited in claim 8, wherein the cascade comprises:
a first stage of BRRT cells, wherein the first stage comprises a first even positive whole number of BRRT cells;
a second stage of BRRT cells coupled to the first stage, wherein the second stage comprises a second even positive whole number of BRRT cells; and
a third stage of one or more BRRT cells coupled to the second stage.
10. The grant generator as recited in claim 9, wherein a first half of the BRRT cells of the first stage cascades into a first half of the BRRT cells of the second stage.
11. The grant generator as recited in claim 10, wherein a second half of the BRRT cells of the first stage cascades into a second half of the BRRT cells of the second stage.
12. The grant generator as recited in claim 9, wherein the BRRT cells of the second stage cascade into the one or more BRRT cells of the third stage.
13. The grant generator as recited in claim 9, wherein the cascade further comprises a fourth stage of one or more BRRT cells coupled to the third stage.
14. The grant generator as recited in claim 13, wherein the cascade further comprises a fifth stage of one or more BRRT cells coupled to the fourth stage.
15. The grant generator as recited in claim 14, wherein the BRRT cells of the first stage comprise \u2018enable\u2019 BRRT cells.
16. The grant generator as recited in claim 14, wherein the BRRT cells of the second stage and the third stage comprise \u2018basic\u2019 BRRT cells.
17. The grant generator as recited in claim 14, wherein the BRRT cells of the fourth stage and the fifth stage comprise \u2018single grant\u2019 BRRT cells.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

What we claimed is:

1. A method for delivering a composition to a targeted area of a tissue through an apparatus traversing a track in the tissue, the method comprising: providing a sealing pressure between the apparatus and a portion of the tissue surrounding the apparatus in the track traversed by said apparatus.
2. The method of claim 1 wherein the sealing pressure is greater than a delivery pressure of the composition delivered to the target tissue.
3. An apparatus for delivering a composition to a target area of a tissue, the apparatus traversing a track in the tissue, the apparatus comprising: an elongate tubular member, said member adapted to receive said composition at a proximal end, said member adapted to deliver said composition at a distal end; and means for inhibiting a migration of said composition from said target area along the track.
4. The apparatus for delivering a composition to a target area of a tissue according to claim 3, wherein the track in said tissue from said target area is created by insertion of said apparatus.
5. An apparatus for delivering a composition to a target area of a tissue, the apparatus traversing a track in the tissue, the apparatus comprising: an elongate tubular member, said member adapted to receive said composition at a proximal end, said member adapted to deliver said composition at a distal end; and means to selectively seal the composition in the apparatus.
6. The apparatus according to claim 5 wherein the means is adapted to selectively seal the composition in the apparatus as the apparatus is inserted through the track.
7. The apparatus according to claim 5 wherein the means is adapted to selectively seal the composition in the apparatus while the apparatus is positioned in the tissue.
8. An apparatus for delivering a composition to a target area of a tissue, the apparatus traversing a track in the tissue, the apparatus comprising: an elongate tubular inner member having a proximal end, a distal end and a lumen extending from the proximal end to the distal end of the inner member, said lumen adapted to receive a fluid at the proximal end of the inner member, and means for delivering said fluid from the distal end of the inner member to the target tissue by way of the lumen;
an elongate tubular central member having a proximal end, a distal end and a lumen extending from said central member proximal end to said central member distal end, said tubular inner member being coaxially positioned in said lumen of said central member;
an elongate tubular outer member having a proximal end, a distal end, lumen extending from said outer member proximal end to said outer member distal end, said tubular central member being coaxially located in said lumen of said outer member; and
means for inhibiting a migration of said composition along the track from said target area.
9. The apparatus according to claim 8 wherein the track is formed by the insertion of the apparatus into said tissue.
10. The apparatus according to claim 8 wherein said means for inhibiting a migration is located proximal to said means for delivering fluid.
11. The apparatus of claim 8 further comprising means for providing selective interruption of composition delivery to said target area.
12. The apparatus for delivering a composition to a target area of a tissue according to claim 8, wherein the means for delivering is stationary relative to the means for inhibiting migration of the composition along the track.
13. The apparatus according to claim 8 wherein the means for delivering is movable relative to the means for inhibiting.
14. The apparatus according to claim 8 wherein the distal end of the inner member is steerable.
15. The apparatus according to claim 8, where in the delivery means may be selectively positioned within the target area.
16. The apparatus according to claim 8, wherein the apparatus is introduced into the target tissue by surgical means.
17. The apparatus according to claim 8 further comprising imaging means for locating the target tissue.
18. The apparatus according to claim 8 further comprising diagnostic means.
19. The apparatus according to claim 8, further comprising an integral introducer.
20. The apparatus according to claim 8, wherein said means for inhibiting migration of said composition is a vacuum provided along a portion of the apparatus in the tissue such that an adjacent portion of tissue collapses onto the apparatus.
21. The apparatus according to claim 8 wherein the means for inhibiting migration of the composition comprise a selectively, radially expandable sleeve.
22. The apparatus according to claim 21 wherein the radially expandable sleeve is a balloon.
23. The apparatus according to claim 22 wherein the balloon is expanded by mechanical means.
24. The apparatus for delivering a composition to a target area of a tissue according to claim 21, wherein the radially expandable sleeve is biased toward a radially expanded position when the apparatus is stationary in said tissue, and wherein said radially expandable sleeve is sufficiently radially compressible to permit movement of said apparatus in said tissue.
25. The apparatus according to claim 24, wherein the radially expandable sleeve expands in response to a movement of said central member relative to said outer member.
26. The apparatus according to claim 25, wherein said movement of said central member relative to said outer member is along a longitudinal axis of said apparatus.
27. The apparatus according to claim 24, wherein said radially expandable sleeve has a proximal end and a distal end, said proximal end and distal ends being restrained from expanding, and said proximal end and distal end are separated by an expandable portion having a predetermined length.
28. The apparatus according to claim 27, wherein the proximal end of the sleeve is engaged by the distal end of the outer member and the distal end of the sleeve is engaged by the distal end of central member and wherein said longitudinal movement of said central member relative to a outer member causes a reduction in a distance between said proximal and distal ends of said sleeve so that said expandable portion of said sleeve expands radially outward.
29. The apparatus according to claim 28, wherein said distal end of said central member has a radially outwardly directed annular shoulder, said shoulder forming a proximally facing annular bearing surface, and wherein said distal end of said sleeve engages said bearing surface of said shoulder.
30. The apparatus according to claim 27, wherein the proximal end of the sleeve is secured to the distal end of the outer member, the distal end of the sleeve is engaged by the distal end of the central member, and wherein a longitudinal movement of the central member relative to the outer member in a direction to cause a reduction in the distance between the proximal and distal ends of the sleeve causes said expandable portion of sleeve to expand radially outwardly.
31. The apparatus according to claim 27, wherein the proximal end of the sleeve is secured to the distal end of the outer member, the distal end of the sleeve is engaged by the distal end of the central member, and wherein a longitudinal movement of the central member relative to the outer member to cause a reduction in the distance between the proximal and distal ends of the sleeve causes said expandable portion of sleeve to expand radially outwardly.
32. The apparatus according to claim 24, wherein said radially expandable sleeve is comprised of an elastic material.
33. An apparatus for delivering a composition to a target area of a tissue, the apparatus having a proximal end, a distal end, and a longitudinal axis extending from said proximal end to said distal end, the apparatus comprising:
an elongate tubular member having a lumen extending from a proximal end to a distal end, the lumen adapted to receive the composition at the proximal end of the member, the lumen in fluid communication with an outwardly directed opening at the distal end of the member, the opening for delivering the composition to the target area;
a sleeve mounted on an outer surface of the member at a point between said proximal end of said member and the opening, said sleeve radially expandable to form a seal between the apparatus and the tissue such that a migration of the composition along a track in the tissue from said target area is inhibited; and
means for selectively expanding said sleeve.
34. An apparatus for delivering a composition to a target area of a tissue, the apparatus traversing a track in the tissue, the apparatus comprising: an elongate tubular member, said member adapted to receive said composition at a proximal end, said member adapted to deliver said composition at a distal end; and
means for inhibiting a migration of said composition along the track from said target area.
35. An apparatus for delivering a composition to a target area of a tissue, the apparatus traversing a track in the tissue, the apparatus comprising:
an elongate tubular member, said member adapted to receive said composition at a proximal end, said member adapted to deliver said composition at a distal end; and means for inhibiting a migration of said composition from said target area along the track, the means providing a sealing pressure between the apparatus and a portion of the track
36. A method and apparatus for delivering a composition to a targeted area of a tissue, the apparatus traversing a track in the tissue, the method and apparatus comprising:
an elongate tubular member, said member adapted to receive said composition at a proximal end, said member adapted to deliver said composition at a distal end; and
providing a sealing pressure between the apparatus and a portion of the track to inhibit a migration of said composition from said target area along the track.
37. A method for delivering a composition to a targeted area of a tissue through an apparatus traversing a track in the tissue, the method comprising: providing a sealing pressure between the apparatus and a portion of the tissue surrounding the apparatus in the track traversed by said apparatus wherein said sealing pressure is provided by the apparatus.
38. An apparatus for delivering a composition to a target area of a tissue, the apparatus traversing a track in the tissue, the apparatus comprising: an elongate tubular member, said member adapted to receive said composition at a proximal end, said member adapted to deliver said composition at a distal end; and
means for inhibiting a migration of said composition along the track from said target area wherein said means provides a sealing pressure between the apparatus and the track.

1460762657-815b1121-5393-496f-8d65-5c500f3b20ac

1. A method of fabricating a thin film transistor array substrate with a thinned protective film over a storage capacitor, the method comprising:
forming a first gate line and one of a common line and a second gate line separated from the first gate line on a substrate;
forming a sourcedrain pattern including a data line crossing the first gate line, source and drain electrodes of a thin film transistor provided at the intersection between the first gate line and the data line, and forming a semiconductor pattern including an active layer and an ohmic contact layer of the thin film transistor;
forming a protective film covering the thin film transistor;
forming a photo-resistive film on the protective film;
aligning a diffractive mask including a semi-transmitting part corresponding to a storage capacitor area and a transmitting part corresponding to a contact hole area;
forming a photo-resist pattern using the diffractive mask, wherein the photo-resist pattern on the storage capacitor area has a lower height than the photo-resist pattern of an area excluding the storage capacitor area, the photo resist pattern corresponding to the contact hole area being removed to expose the protective film;
patterning the protective film using the photo-resist pattern as a mask to remove the protective film corresponding to the contact hole area to define a contact hole to expose the drain electrode, the protective film at the storage capacitor area remaining unaffected when the contact hole is formed;
ashing the photo-resist pattern at the storage capacitor area to expose the protective film, the ashed photo-resist pattern remaining at an area excluding the contact hole and the storage capacitor area;
partially removing the protective film at the storage capacitor area using the ashed photo-resist pattern as a mask to reduce a height of the protective film at the storage capacitor area, the height of the protective film being based on an etching time;
removing the ashed photo-resist pattern; and
forming a pixel electrode connected, via the contact hole, to the drain electrode of the thin film transistor, a storage capacitor being formed that includes the pixel electrode and the one of the common line and the second gate line;
wherein forming the sourcedrain pattern and forming the semiconductor pattern comprises:
forming an amorphous silicon layer, an n+ amorphous silicon layer and a sourcedrain metal layer on the substrate;
forming a photo-resist pattern having a lower height at a channel portion of the thin film transistor than at regions of the sourcedrain pattern;
etching the sourcedrain metal layer using the photo-resist pattern to provide the data line, the source electrode, and the drain electrode;
etching the amorphous silicon layer and the n+ amorphous silicon layer using the photo-resist pattern to provide the active layer and the ohmic contact layer;
ashing the photo-resist pattern;
etching the sourcedrain pattern and the ohmic contact layer at the channel portion using the ashed photo-resist pattern.
2. The method of fabricating the thin film transistor array substrate as claimed in claim 1, further comprising forming a gate insulating film that covers at least one of the common line and the second gate line.
3. The method of fabricating the thin film transistor array substrate as claimed in claim 1, wherein the protective film covering the thin film transistor is not substantially thinned during removal of the portion of the protective film.
4. The method of fabricating the thin film transistor array substrate as claimed in claim 1, wherein one of the common line and the second gate line crosses the pixel electrode.
5. The method of fabricating thin film transistor array substrate as claimed in claim 1, further comprising forming a gate insulating film in the storage capacitor.
6. The method of fabricating thin film transistor array substrate as claimed in claim 5, wherein both the gate insulating film and the protective film are disposed in the storage capacitor.
7. The method of fabricating thin film transistor array substrate as claimed in claim 5, wherein, in the storage capacitor, the pixel electrode contacts the protective film and the gate insulating film contacts one of the common line and the second gate line.
8. The method of fabricating thin film transistor array substrate as claimed in claim 1, wherein the substrate is a transparent substrate.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

We claim:

1. A circuit comprising an input terminal for connection to a voltage source having first and second levels and a transition between the levels, a driver including first and second opposite conductivity type transistors, each including a control electrode and a path switched on and off in response to the control electrode voltage being on opposite sides of a threshold, the first and second transistor paths being connected in series across opposite power supply terminals, and pulse shaping circuitry for (a) causing the first and second transistor paths to be respectively (i) on and off while the voltage source has the first level and (ii) off and on while the voltage source has the second level, and (b) preventing both paths from being on simultaneously, the circuitry including a first resistive impedance and first shunt capacitor, the first impedance being connected for supplying current to the first capacitor and the first transistor control electrode, the first capacitor being connected across the first transistor control electrode and a first of the power supply terminals.
2. The circuit of claim 1 wherein said first and second transistors are respectively a PFET and an NFET and said at least one capacitor comprises a field effect device.
3. The circuit of claim 2 wherein said resistive impedance, PFET, NFET and said at least one capacitor are included on an integrated circuit chip, and said resistive impedance comprises a resistor.
4. The circuit of claim 1 wherein the circuitry further includes a second resistive impedance and a second shunt capacitor, the second resistive impedance being connected for supplying current to the second shunt capacitor and the control electrode of the second transistor, the second shunt capacitor being connected across the control electrode of the second transistor and a second of the power supply terminals.
5. The circuit of claim 4 wherein the first and second transistors are respectively a PFET and an NFET and the first and second shunt capacitors are respectively an NFET and a PFET.
6. The circuit of claim 5 wherein the first and second transistors, the first and second resistive impedances, and the first and second shunt capacitors are included on an integrated circuit chip, the first and second resistive impedances including first and second resistors.
7. The circuit of claim 5 further including first and second switching circuits each having (a) an input terminal for enabling the first and second switching circuits to be simultaneously responsive to the voltage at the input terminal and (b) an output terminal, the output terminal of the first switching circuit being connected so current can flow via a first DC path between (a) the first power supply terminal and (b) the first shunt capacitor and the control electrode of the first transistor, the output terminal of the second switching circuit being connected so current can flow via a second DC path between (a) the second power supply terminal and (b) the second shunt capacitor and the control electrode of the second transistor, the first and second paths respectively including the first and second resistive impedances.
8. The circuit of claim 7 wherein the first and second transistors are field effect transistors, the first and second switching circuits respectively include first and second inverters having field effect transistors, and the first and second capacitors comprise field effect devices.
9. The circuit of claim 8 wherein all of the field effect transistors and devices are included on an integrated circuit chip including first and second resistors respectively comprising the first and second resistive impedances connected in circuit with the first and second field effect transistors and the first and second inverters.
10. The circuit of claim 9 wherein the first and second resistors are respectively included in the first and second inverters.
11. The circuit of claim 10 wherein the first and second transistors are respectively a PFET and an NFET, each of the inverters including a PFET and an NFET, the PFET and NFET of each inverter having a source drain path and a gate electrode having a connection to the input terminal so that the gate electrodes of the PFETs and NFETs of the inverters are driven in parallel by the voltage at the input terminal, the output terminal of each of the inverters being between the source drain paths of the PFET and NFET thereof.
12. The circuit of claim 11 wherein the first resistor is connected between the source drain path of the NFET of the first inverter and the output terminal of the first inverter, the second resistor being connected between the source drain path of the PFET of the second inverter and the output terminal of the second inverter.
13. The circuit of claim 12 wherein the first and second capacitors respectively include an NFET and a PFET.
14. A circuit comprising an input terminal for connection to a voltage source having first and second levels and a transition between the levels, a driver including first and second opposite conductivity type transistors, each including a control electrode and a path switched on and off in response to a voltage applied to the control electrode being on opposite sides of a threshold, the first and second transistor paths being connected in series across opposite power supply terminals, an output terminal between the paths, pulse shaping circuitry connected between the input terminal and the control electrodes for (a) causing the paths of the first and second transistors to be respectively (i) on and off while the voltage source has the first level and (ii) off and on while the voltage source has the second level, and (b) preventing the paths of the first and second transistors from being on simultaneously, the circuitry including: (a) first and second switching circuits to be connected to be simultaneously responsive to the voltage at the input terminal, the first and second switching circuits respectively including output terminals having DC connections to the control electrodes of the first and second transistors; and (b) first and second capacitors respectively having DC connections between (i) the first control electrode and the first power supply terminal and (ii) the second control electrode and the second power supply terminal, the first switching circuit including a first resistive impedance for supplying current from the first power supply terminal to the control electrode of the first transistor and the first capacitor while the voltage at the input terminal has the first level, the first switching circuit being arranged for supplying a voltage substantially equal to the voltage at the second power supply terminal to (i) the control electrode of the first transistor and (ii) the first capacitor while the voltage at the first terminal has the second level; the second switching circuit including a second resistive impedance for supplying current from the second power supply terminal to the control electrode of the second transistor and the second capacitor while the voltage at the input terminal has the second level, the second switching circuit being arranged for supplying a voltage substantially equal to the voltage at the first power supply terminal to (i) the control electrode of the second transistor and (ii) the second capacitor while the voltage at the first terminal has the first level.
15. The circuit of claim 14 wherein the first switching circuit comprises a first inverter including third and four transistors respectively switched on and off in response to the voltage at the input terminal respectively having first and second values, the first inverter including the first resistive impedance for supplying current from the first power supply terminal to the control electrode of the first transistor and the first capacitor while the third transistor is switched on; the second switching circuit comprises a second inverter including fifth and sixth transistors respectively switched on and off in response to the voltage at the input terminal respectively having first and second values, the second inverter including a second resistive impedance for supplying current from the second power supply terminal to the control electrode of the second transistor and the second capacitor while the sixth transistor is switched on.
16. The circuit of claim 15 wherein the fourth and fifth transistors while switched on are connected to supply voltages substantially at the second and first power supply terminals to the control electrodes of the first and second transistors and the first and second capacitors, respectively.
17. The circuit of claim 16 wherein all the transistors and capacitors are field effect devices.
18. The circuit of claim 17 wherein all the transistors and capacitors are included on an integrated circuit chip, the first and second resistive impedances including first and second resistors on the chip.
19. A method of operating a driver including first and second opposite conductivity type transistors, each including a control electrode and a path controlled in response to a voltage applied to the control electrode, the paths of the first and second transistors being connected in series across opposite power supply terminals, an output terminal between the series connected paths, first and second capacitors respectively connected in shunt with the control electrodes, the method comprising: during a first interval: turning on and off the paths of the first and second transistors, respectively, while the second capacitor is charged and the first capacitor is discharged by applying (a) a first voltage having a first value to the control electrode of the first transistor, (b) the first voltage value across the second capacitor, and (c) a second voltage having the first value to the control electrode of the second transistor; during a second interval: turning off and on the paths of the first and second transistors, respectively, while the second capacitor is discharged and the first capacitor is charged by applying (a) the second value of the first voltage to the control electrode of the first transistor, (b) the first voltage value across the first capacitor, and (c) the second value of the second voltage to the control electrode of the second transistor; during an initial portion of a first transitional period between the first and second intervals: turning off the path of the first transistor while maintaining the path of the second transistor off by changing the first voltage from the first value toward the second value while the first capacitor remains substantially discharged and the second capacitor remains substantially charged; during a second portion of the first transitional period turning on the path of the second transistor while maintaining the path of the first transistor off by changing the charge on the second capacitor so that there is a change in the value of the second voltage from the first value toward the second value; during an initial portion of a second transitional period between the second and first intervals: turning off the path of the second transistor while maintaining the path of the first transistor off by changing the second voltage from the second value toward the first value while the second capacitor remains substantially discharged and the first capacitor remains substantially charged; and during a second portion of the second transitional period turning on the path of the first transistor while maintaining the path of the second transistor off by changing the charge on the first capacitor so that there is a change in the value of the first voltage from the second value toward the first value.