What is claimed is:
1. A method for fabricating a capacitor electrode on a semiconductor substrate comprising the steps of:
forming a conducting layer over the semiconductor substrate;
forming a photoresist layer over the conducting layer;
pattering the photoresist layer through an interfering exposure step; and
pattering the conducting layer using the patterned photoresist layer as a mask, thereby forming a capacitor electrode.
2. The method as claimed in claim 1, wherein the photoresist layer is patterned to have a sine-wave shape.
3. The method as claimed in claim 1, wherein the photoresist layer is patterned to have a hump shape.
4. The method as claimed in claim 1, wherein the photoresist layer is patterned to have a plurality of holes.
5. The method as claimed in claim 1, wherein the photoresist layer is a positive photoresist layer.
6. The method as claimed in claim 5, wherein the interfering exposure step includes over-exposing an unexposed region of the positive photoresist layer.
7. The method as claimed in claim 6, wherein the positive photoresist layer is patterned to a hump shape.
8. The method as claimed in claim 5, wherein the interfering exposure step includes under-exposing an exposed region of the positive photoresist layer.
9. The method as claimed in claim 8, wherein the positive photoresist layer is patterned to have a plurality of holes.
10. The method as claimed in claim 1, wherein the photoresist layer is a negative photoresist layer.
11. The method as claimed in claim 10, wherein the interfering exposure step includes under-exposing an exposed region of the negative photoresist layer.
12. The method as claimed in claim 11, wherein the negative photoresist layer is patterned to a hump shape.
13. The method as claimed in claim 10, wherein the interfering exposure step includes over-exposing an unexposed region of the negative photoresist layer.
14. The method as claimed in claim 13, wherein the negative photoresist layer is patterned to have a plurality of holes.
15. The method as claimed in claim 1, wherein the interfering exposure step is carried out by a holography technology.
16. The method as claimed in claim 15, wherein the interfering exposure step includes a single exposure step.
17. The method as claimed in claim 1 6, wherein the holography technology includes the steps of:
providing a light source;
transforming the light source to a plane wave;
separating the plane wave into a main wave and a reference wave; and
directing the main wave and the reference wave to the photoresist layer surface over which the main wave and the reference wave interfere with each other.
18. The method as claimed in claim 17, wherein the main wave and the reference wave are plane waves.
19. The method as claimed in claim 17, wherein the main wave is a plane wave, and the reference wave is a spherical wave.
20. The method as claimed in claim 17, wherein the main wave is a plane wave, and the reference wave is an irregular wave.
21. The method as claimed in claim 17, wherein the main wave and the reference wave are directed to the photoresist layer surface in an orientation which determines the shape of the patterned photoresist layer.
22. The method as claimed in claim 16, wherein the holography technology includes the steps of:
providing a light source;
transforming the light source to a plane wave;
separating the plane wave into four beams; and
directing the four beams to the photoresist layer surface over which the four beams interfere with each other.
23. The method as claimed in claim 15, wherein the interfering exposure step includes a double exposure step.
24. The method as claimed in claim 23, wherein the holography technology includes the steps of:
providing a light source;
transforming the light source to a plane wave;
separating the plane wave into a main wave and a reference wave;
directing the main wave and the reference wave to the photoresist layer surface over which a first interfering exposure occurs; and
rotating the semiconductor substrate to about an angle of 90, thereby introducing a second interfering exposure over the photoresist layer surface with the main wave and the reference wave interfere thereon.
25. A method for fabricating a capacitor electrode on a semiconductor substrate comprising the steps of:
forming a conducting layer over the semiconductor substrate;
forming an insulating layer over the conducting layer;
forming a photoresist layer over the insulating layer;
pattering the photoresist layer through an interfering exposure step;
etching anisotropically the insulating layer using the patterned photoresist layer as a mask, thereby exposing a portion of the conducting layer;
etching anisotropically the conducting layer using the insulating layer as a mask; and
removing the photoresist layer and the insulating layer, thereby forming a capacitor electrode.
26. The method as claimed in claim 25, wherein the interfering exposure step utilizes a holography technology in which a light source is required.
27. The method as claimed in claim 26, wherein the light source is a laser source.
28. The method as claimed in claim 26, wherein the light source is a deep ultraviolet (DUV) source.
29. The method as claimed in claim 26, wherein the light source is an X-ray source.
30. A method for fabricating a capacitor electrode on a semiconductor substrate on which a transistor having a diffusion region is formed, comprising the steps of:
forming a first insulating layer over the semiconductor substrate;
pattering the first insulating layer to expose a portion of the diffusion region as a window;
forming a first conducting layer over the semiconductor substrate and filling in the window;
forming a second insulating layer over the first conducting layer;
forming a photoresist layer over the second insulating layer;
pattering the photoresist layer through an interfering exposure step;
etching anisotropically the second insulating layer using the patterned photoresist layer as a mask, thereby forming a plurality of openings in which the first conducting layer is exposed;
etching anisotropically the first conducting layer using the second insulating layer as a mask;
removing the photoresist layer and the second insulating layer, thereby leaving the first conducting layer as a lower capacitor electrode;
forming a dielectric layer over the lower capacitor electrode; and
forming a second conducting layer over the dielectric layer as an upper capacitor electrode.
31. The method as claimed in claim 30 further including a photolithography step before forming the second insulating layer for defining a capacitor region.
32. The method as claimed in claim 30 further including a photolithography step after forming the photoresist layer for defining a capacitor region.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
What is claimed is:
1. A method for determining the validity of a sensor signal including the steps of:
providing a sensor signal from a sensor;
providing an estimated sensor signal;
determining the difference between the sensor signal and the estimated sensor signal;
calculating a standard deviation of the difference;
scaling the points of inflection of a fuzzy logic membership function proportional to the standard deviation; and
processing the sensor signal using the fuzzy logic membership function to determine whether the sensor signal is valid or not.
2. The method of claim 1, wherein the step of processing occurs before the step of scaling.
3. The method of claim 1, wherein the step of scaling occurs before the step of processing.
4. The method of claim 1, wherein the fuzzy logic membership function has at least two domains, including at least one domain that evaluates a sensor signal as acceptable, and at least one domain that evaluates a sensor signal as unacceptable.
5. The method of claim 4, wherein the step of scaling includes the step of multiplying a plurality of points of inflection of the fuzzy logic membership function by the standard deviation.
6. A method for determining the quality of a sensor signal in a fuzzy logic controller including the steps of:
providing a first cumulative scatter value indicative of a cumulative degree of difference between a plurality of sensor signal values and estimated sensor signal values corresponding to each of the sensor signal values;
providing a fuzzy logic membership function in which the x-axis values of the points of inflection of a plurality of fuzzy logic domains are derived from the first cumulative scatter value;
retrieving a further sensor signal value;
comparing the further sensor signal value with a further estimated sensor signal value;
calculating a further scatter value indicative of the individual degree of difference between the further sensor signal value and the further estimated sensor signal value;
combining the further scatter value with the first cumulative scatter value to provide a second cumulative scatter value indicative of the cumulative degree of difference and the individual degree of difference in combination; and
amending the fuzzy logic membership function such that the x-axis values of the points of inflection of the plurality of fuzzy logic domains are derived from the second cumulative scatter value.
7. The method of claim 6, wherein the step of providing a first cumulative value includes the steps of:
a. calculating a first difference between a first of the plurality of sensor signal values and a first of the estimated sensor signal values;
b. calculating a second difference between a second of the plurality of sensor signal values and a second of the estimated sensor signal values; and
c. calculating the first cumulative scatter value from at least the foregoing first and second differences.
8. The method of claim 7, wherein the first cumulative scatter value is a function of the standard deviation of the first and second differences.
9. A method of individually determining whether a plurality of sequential sensor values are valid comprising the steps of:
a. reading a sensor value;
b. determining a degree of difference between the sensor value and an estimated sensor value;
c. revising the x-axis values of a fuzzy logic membership function that responds to the degree of difference as an input and produces a signal indicative of the validity of the sensor value as an output;
d. determining whether the sensor value is valid; and
e. repeating steps a through d for each of the plurality of sequential sensor values.
10. The method of claim 9, further comprising the steps of:
calculating a value indicative of the collective degree of scatter of the individual degree of differences calculated in step c.
11. The method of claim 10, wherein the step of calculating is performed after each step of determining a degree of difference, and wherein the value indicative of the collective degree of scatter incorporates all of the previous individual degrees of difference.
12. The method of claim 11, wherein the value indicative of the collective degree of scatter is a standard deviation of prior degrees of difference calculated in step b.
13. The method of claim 12, wherein x-axis values of the membership function are themselves functions of the standard deviation.
14. The method of claim 13, further comprising the step of calculating a plurality of the x-axis values every time the step of calculating a value indicative of the degree of scatter occurs.
15. The method of claim 14, wherein each of the x-axis values of the points of inflection are associated with a value that is a function of the collective degree of scatter.