claimsbot – Page 17625 – All The Claims

1460761834-78896878-6c3d-4480-9a96-8ce6a649918c

1. A pharmaceutical composition comprising a compound of the Formula:
or a salt thereof; wherein:
(a) R is 2-butyl or isopropyl;
(b) each of R1 and R2 is independently methyl;
(c) R3 is \u2014CH2CH2CH2CH2R9;
(d) R4 is methoxy;
(e) R5 is carboxyamino;
(f) R6 is hydrido or methyl;
(g) each of R7 and R9 is independently amino, monosubstituted amino, disubstituted amino, acylamino, ureido, guanidino, carbamoyl, sulfonamino, thioacylamino, thioureido, iminoamino, or phosphonamino;
(h) provided that R7 is other than
wherein each of R11 and R12 is hydrido, C6-C18 unsubstituted alkanoyl, C8-C18 unsubstituted alkenoyl, C8-C18 unsubstituted alkyl, or C8-C18 select substituted alkyl; or alternatively, R11 and R12 together are C8-C18 alkylidenyl.
2. The composition of claim 1 wherein R7 is
wherein each of Raa, Raa2 and Raa3 is independently an amino acid side chain and wherein R13 is amino, monosubstituted amino, disubstituted amino, acylamino, ureido, guanidino, carbamoyl, sulfonamino, thioacylamino, thioureido, iminoamino, or phosphonamino.
3. A composition comprising a compound of the Formula
or a salt thereof; wherein:
(a) R is 2-butyl, isopropyl or 2-(2\u2032-aminophenacyl);
(b) each of R1 and R6 is independently hydrido or methyl;
(c) R4 is hydrido or methoxy;
(d) R5 hydroxyl or carboxyamino;
(e) R15 is hydrido,
wherein: R18 is amino or hydroxyl; R19 is hydrido or hydroxyl; and R20 is carboxyamino or carboxymethyl;

(f) R16 is methyl or \u2014CH2CH2CH2R21;
(g) R17 is methyl or \u2014CH2CH2CH2CH2R22;
wherein each of R21 and R22 is independently amino, monosubstituted amino, disubstituted amino, acylamino, ureido, guanidino, carbamoyl, sulfonamino, thioacylamino, thioureido, iminoamino, or phosphonamino.
4. The composition of claim 3 wherein each of R21 and R22 is independently \u2014NHR23, wherein R23 is an amino protecting group.
5. The composition of claim 4 wherein the compound of Formula I is
wherein each of R6 and R14 is independently hydrido or methyl.
6. A method of treating a bacterial infection in a subject, comprising administering to the subject a therapeutically-effective amount of a composition comprising a compound of the Formula:
or a salt thereof; wherein:
(a) R is 2-butyl, isopropyl or 2-(2\u2032-aminophenacyl);
(b) each of R1 and R6 is independently hydrido or methyl;
(c) R2 is methyl or \u2014CH2CH2CH2R8;
(d) R3 is methyl or \u2014CH2CH2CH2CH2R9;
(e) R4 is hydrido or methoxy;
(f) R5 is hydroxyl or carboxyamino;
(g) each of R7, R8 and R9 is independently amino, monosubstituted amino, disubstituted amino, acylamino, ureido, guanidino, carbamoyl, sulfonamino, thioacylamino, thioureido, iminoamino, or phosphonamino;
(h) provided that
(1) when R2 is \u2014CH2CH2CH2R8, R7 is other than
wherein R10 is amino, monosubstituted amino, disubstituted amino, acylamino, ureido, guanidino, carbamoyl, sulfonamino, thioacylamino, iminoamino, or phosphonamino;

(2) when R2 is methyl, R7 is other than
wherein each of R11 and R12 is hydrido, C6-C18 unsubstituted alkanoyl, C8-C18 unsubstituted alkenoyl, C8-C18 unsubstituted alkyl, or C8-C18 select substituted alkyl; or alternatively, R11 and R12 together are C8-C18 alkylidenyl;
comprising removing an amino protecting group from a compound of Formula XVII,
or a salt thereof,
wherein R28 is methyl or \u2014CH2CH2CH2NHP; R29 is methyl or \u2014CH2CH2CH2CH2NHP; and P is an amino protecting group; provided that at least one of R28 or R29 is other than methyl.
8. The process of claim 7 further comprising treating a compound of the Formula XVI,
or a salt thereof,
with a modifying agent to obtain the compound of Formula XVII, or a salt thereof.
9. The process of claim 8 further comprising removing the terminal amino acid residue from a compound of Formula XV,
or a salt thereof,
wherein R18 is amino or hydroxy; R19 is hydrido or hydroxy;
to obtain the compound of Formula XVI, or a salt thereof.
10. The process of claim 9 further comprising removing the terminal amino acid residue from a compound of Formula XIV
or a salt thereof,
wherein R20 is carboxyamino or carboxymethyl;
to obtain the compound of Formula XV, or a salt thereof.
11. The process of claim 10 further comprising removing the tryptophan amino acid residue from a compound of Formula XIII
or a salt thereof,
to obtain the compound of Formula XIV, or a salt thereof.
12. The process of claim 11 further comprising deacylating a compound of Formula XII
or a salt thereof;
wherein R25 is an alkyl group;
to obtain the compound of Formula XIII, or a salt thereof.
13. The process of claim 12 further comprising protecting the free amine group(s) of a compound of Formula XI
or a salt thereof;
wherein R26 methyl or \u2014CH2CH2CH2NH2; and R27 is methyl or \u2014CH2CH2CH2CH2NH2;
to obtain the compound of Formula XII, or a salt thereof.
14. A process for preparing a compound of Formula I:
or a salt thereof; wherein:
(a) R is 2-butyl, isopropyl or 2-(2\u2032-aminophenacyl);
(b) each of R1 and R6 is independently hydrido or methyl;
(c) R2 is methyl or \u2014CH2CH2CH2R8;
(d) R3 is methyl or \u2014CH2CH2CH2CH2R9;
(e) R4 is hydrido or methoxy;
(f) R5 is hydroxyl or carboxyamino;
(g) each of R7, R8 and R9 is independently amino, monosubstituted amino, disubstituted amino, acylamino, ureido, guanidino, carbamoyl, sulfonamino, thioacylamino, thioureido, iminoamino, or phosphonamino;
(h) provided that
(1) when R2 is \u2014CH2CH2CH2R8, R7 is other than
wherein R10 is amino, monosubstituted amino, disubstituted amino, acylamino, ureido, guanidino, carbamoyl, sulfonamino, thioacylamino, iminoamino, or phosphonamino;

wherein R2a is methyl or \u2014CH2CH2CH2NH2; and R3a is methyl or \u2014CH2CH2CH2CH2NH2; provided at least one of R2a and R3a is other than methyl; with a modifying agent.
15. A process for preparing a compound of Formula I:
or a salt thereof; wherein:
(a) R is 2-butyl, isopropyl or 2-(2\u2032-aminophenacyl);
(b) each of R1 and R6 is independently hydrido or methyl;
(c) R2 is methyl or \u2014CH2CH2CH2R8;
(d) R3 is methyl or \u2014CH2CH2CH2CH2R9;
(e) R4 is hydrido or methoxy;
(f) R5 is hydroxyl or carboxyamino;
(g) each of R7, R8 and R9 is independently amino, monosubstituted amino, disubstituted amino, acylamino, ureido, guanidino, carbamoyl, sulfonamino, thioacylamino, thioureido, iminoamino, or phosphonamino;
(h) provided that
(1) when R2 is \u2014CH2CH2CH2R8, R7 is other than
wherein R10 is amino, monosubstituted amino, disubstituted amino, acylamino, ureido, guanidino, carbamoyl, sulfonamino, thioacylamino, iminoamino, or phosphonamino;

(2) when R2 is methyl, R7 is other than
wherein each of R11 and R12 is hydrido, C6-C18 unsubstituted alkanoyl, C8-C18 unsubstituted alkenoyl, C8-C18 unsubstituted alkyl, or C8-C18 select substituted alkyl; or alternatively, R11 and R12 together are C8-C18 alkylidenyl;
comprising treating a compound of Formula XXVIII
or a salt thereof;
wherein R37 is methyl or \u2014CH2CH2CH2R8; and R38 is methyl or \u2014CH2CH2CH2CH2R9; provided that at least one of R37 and R38 is other than methyl and further provided that each of R8 and R9 is other than amino;
with a modifying agent.
16. The process of claim 15 further comprising removing the terminal amino acid residue from a compound of Formula XXVII
or a salt thereof;
wherein R18 is amino or hydroxyl; and R19 is hydrido or hydroxyl;
to obtain the compound of Formula XXVIII, or a salt thereof.
17. The process of claim 16 further comprising removing the terminal amino acid residue from a compound of Formula XXVI
or a salt thereof;
wherein R20 is carboxyamino or carboxymethyl;
to obtain the compound of Formula XXVII, or a salt thereof.
18. The process of claim 17 further comprising removing the tryptophan amino acid residue from a compound of Formula XXV
or a salt thereof,
to obtain the compound of Formula XXVI, or a salt thereof.
19. The process of claim 18 further comprising deacylating a compound of Formula XXIV
or a salt thereof;
wherein R25 is an alkyl group;
to obtain the compound of Formula XXV, or a salt thereof.
20. The process of claim 19 further comprising treating the free amine group(s) of a compound of Formula XI,
or a salt thereof;
wherein R26 methyl or \u2014CH2CH2CH2NH2; and R27 is methyl or \u2014CH2CH2CH2CH2NR2;
with a modifying agent to obtain the compound of Formula XXV, or a salt thereof.
21. A process for preparing a compound of the Formula XXXII
or a salt thereof; wherein:
(a) R is 2-butyl, isopropyl or 2-(2\u2032-aminophenacyl);
(b) each of R1 and R6 is independently hydrido or methyl;
(c) R4 is hydrido or methoxy;
(d) R5 is hydroxyl or carboxyamino;
(e) R18 is amino or hydroxyl;
(f) R19 is hydrido or hydroxyl;
(g) R20 is carboxyamino or carboxymethyl;
(h) R28 is methyl or \u2014CH2CH2CH2NHP;
(i) R29 is methyl or CH2CH2CH2CH2NHP;
(j) P is an amino protecting group;
(k) R39 is independently amino, monosubstituted amino, disubstituted amino, acylamino, ureido, guanidino, carbamoyl, sulfonamino, thioacylamino, thioureido, iminoamino, or phosphonamino;
(l) provided that
(1) when R2 is \u2014CH2CH2CH2R8, R7 is other than
wherein R10 is amino, monosubstituted amino, disubstituted amino, acylamino, ureido, guanidino, carbamoyl, sulfonamino, thioacylamino, iminoamino, or phosphonamino;

R7
R9
NH2

NH2

NH2
a) wherein R14 is hydrido or methyl;
b) wherein R7** is an amino, monosubstituted amino, disubstituted amino, acylamino, ureido, guanidino, carbamoyl, sulfonamino, thioacylamino, thioureido, iminoamino, or phosphonamino and
c) each of Raa4, Raa5, and Raa6 is independently an amino acid side chain.
24. A composition comprising a compound of the Formula:
;
wherein R6 is H or CH3 and each of R7* and R9 is independently amino, monosubstituted amino, disubstituted amino, acylamino, ureido, guanidino, carbamoyl, sulfonamino, thioacylamino, thioureido, iminoamino, or phosphonamino.
25. A compound of the Formula 33:

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A power semiconductor device, comprising:
a semiconductor layer;
polysilicon-containing gates;
a first semiconductor region formed in said semiconductor layer at one surface of said semiconductor layer and operative to serve as at least one of a source region and an emitter region;
a second semiconductor region formed in said semiconductor layer at the other surface of said semiconductor layer and operative to serve as at least one of a drain region and a collector region;
a gate routing wire commonly connected to a plurality of said gates and including a polysilicon portion and a metal portion formed adjacent to it in the direction of plane of said semiconductor layer;
an interlayer insulator film formed to cover said first semiconductor region, said gate routing wire and a plurality of said gates;
electrode portions formed in said interlayer insulator film and connected to said first semiconductor region; and
a strap electrode plate located to cover said interlayer insulator on said gate routing wire and cover a plurality of said electrode portions and commonly connected to a plurality of said electrode portions.
2. The power semiconductor device according to claim 1, wherein said gate is formed on a gate insulator film in a gate trench, said gate trench extending from one surface of said semiconductor layer into said semiconductor layer.
3. The power semiconductor device according to claim 2, further comprising a buried metal portion formed on and connected to said gate in said gate trench, wherein the bottom of said buried metal portion is located higher than the bottom of said first semiconductor region.
4. The power semiconductor device according to claim 2, further comprising:
an Intermediate insulator film formed between one surface of said semiconductor layer and said interlayer insulator film and having a larger thickness than said gate insulator film: and
a buried metal portion formed on and connected to said gate in said intermediate insulator film, wherein the bottom of said buried metal portion is located higher than the bottom of said first semiconductor region.
5. The power semiconductor device according to claim 4, wherein said intermediate insulator film is removed from below said gate routing wire.
6. The power semiconductor device according to claim 2, wherein said electrode portion extends into said semiconductor layer down to a location deeper than said first semiconductor region.
7. The power semiconductor device according to claim 1, wherein said metal portion extends along the direction of extension of said gate routing wire.
8. The power semiconductor device according to claim 1, wherein said metal portions and said polysilicon portions are arranged alternately.
9. The power semiconductor device according to claim 1, wherein said metal portion configures a side of said gate routing wire and having a sidewall shape.
10. The power semiconductor device according to claim 1, wherein said metal portion and said polysilicon portion are formed to have substantially the same height.
11. The power semiconductor device according to claim 1, wherein the bottom of said metal portion and the bottom of said polysilicon portion are located at substantially the same height.
12. The power semiconductor device according to claim 1, wherein the bottom of said metal portion is located higher than the bottom of said polysilicon portion.
13. The power semiconductor device according to claim 1, wherein said gate routing wire has a portion extending in a direction intersecting the direction of extension of said gate, said portion being commonly connected to said plurality of gates.
14. The power semiconductor device according to claim 1, wherein said gate is formed on said gate insulator film on one surface of said semiconductor layer.
15. The power semiconductor device according to claim 1, wherein said device is a MISFET, in which said first semiconductor region serves as said source region and said second semiconductor region serves as said drain region.
16. The power semiconductor device according to claim 1, wherein said device is an IGBT, in which said first semiconductor region serves as said emitter region and said second semiconductor region serves as said collector region.
17. A power semiconductor device, comprising:
a semiconductor layer;
a first semiconductor region formed in said semiconductor layer at one surface of said semiconductor layer and operative to serve as at least one of a source region and an emitter region;
a second semiconductor region formed in said semiconductor layer at the other surface of said semiconductor layer and operative to serve as at least one of a drain region and a collector region;
an insulator film formed on said first semiconductor region;
a gate formed on gate insulator film in a gate trench, said gate trench extending through said insulator film into said semiconductor layer; and
a buried metal portion formed in said gate trench and stacked on said gate, wherein the bottom of said buried metal portion is located higher than the bottom of said first semiconductor region.
18. The power semiconductor device according to claim 17, wherein said insulator film is an intermediate insulator film having a larger thickness than said gate insulator film.
19. The power semiconductor device according to claim 18, further comprising an electrode portion connected to said first semiconductor region,
wherein the lower part of said electrode portion is formed in a current path trench provided in said intermediate insulator film isolated from said trench.
20. The power semiconductor device according to claim 19, wherein the upper surface of said lower part of said electrode portion and the upper surface of said buried metal portion are located at substantially the same height.

1460761826-d04cca34-d894-44c6-b56d-86b5980ec4a3

1. A semiconductor device, comprising:
a gate electrode having opposing ends that overlap isolation regions and wherein the gate electrode is located over an active region located within a semiconductor substrate;
a gate oxide located between the gate electrode and the active region, wherein the gate oxide has a thickness of about 1.2 nm or less;
sourcedrains located adjacent the gate electrode and within the active region, a transistor channel region being defined under the gate electrode in the active region between the sourcedrains;
an etch stop layer located over the gate electrode; and
at least one electrical contact that extends through the etch stop layer and contacts a portion of the gate electrode located between the isolation regions and that overlies the channel region in the active region.
2. The device of claim 1, further comprising a dielectric layer located over the etch stop layer; and wherein the at least one electrical contact extends vertically through at least a portion of the dielectric layer and through the etch stop layer to contact the gate electrode at the location that overlies the active region.
3. The device of claim 2, wherein the gate electrode comprises at least one of doped polysilicon or metal silicide.
4. The device of claim 2, wherein the etch stop layer comprises silicon nitride.
5. A semiconductor device, comprising:
a gate electrode having opposing ends that overlap isolation regions and wherein the gate electrode is located over an active region located within a semiconductor substrate;
a gate oxide located between the gate electrode and the active region;
sourcedrains located adjacent the gate electrode and within the active region, a transistor channel region being defined under the gate electrode in the active region between the sourcedrains;
an etch stop layer located over the gate electrode; and
at least one electrical contact that extends through the etch stop layer and contacts a portion of the gate electrode located between the isolation regions and that overlies the channel region in the active region;
wherein the gate electrode includes a contact pad; and wherein the at least one electrical contact contacts the gate electrode at the contact pad.
6. The device of claim 5, wherein the at least one electrical contact contacts the gate electrode at the middle of the width of the gate electrode.
7. The device of claim 5, further comprising a dielectric layer located over the etch stop layer; and wherein the at least one electrical contact extends vertically through at least a portion of the dielectric layer and through the etch stop layer to contact the gate electrode at the location that overlies the active region.
8. The device of claim 7, wherein the etch stop layer comprises silicon nitride, and the gate electrode comprises at least one of doped polysilicon or metal silicide.
9. A method of manufacturing a semiconductor device, comprising:
forming a gate oxide over a semiconductor substrate, wherein the gate oxide has a thickness that is about 1.2 nm or less;
forming a gate electrode over the gate oxide, wherein opposing ends of the gate electrode overlap isolation regions and the gate electrode is located over an active region within the semiconductor substrate;
forming sourcedrains adjacent the gate electrode and within the active region, a transistor channel region being defined under the gate electrode in the active region between the sourcedrains;
forming an etch stop layer over the gate electrode; and
forming at least one electrical contact that extends through the etch stop layer and contacts a portion of the gate electrode that overlies the channel region in the active region.
10. The method of claim 9, further comprising forming a dielectric layer over the etch stop layer; and wherein forming the at least one electrical contact comprises forming the at least one electrical contact to extend vertically through at least a portion of the dielectric layer and through the etch stop layer to contact the gate electrode at the location that overlies the active region.
11. The method of claim 10, wherein forming the at least one electrical contact comprises forming a contact opening over the gate oxide in at least the dielectric layer using a plasma process.
12. The method of claim 11, wherein the etch stop layer comprises silicon nitride, and the gate electrode comprises at least one of doped polysilicon or metal silicide.
13. The method of claim 9, further comprising forming a dielectric layer over the etch stop layer; and wherein forming the at least one electrical contact comprises forming a contact opening over the gate oxide in at least the dielectric layer using a plasma process.
14. A method of manufacturing a semiconductor device, comprising:
forming a gate oxide over a semiconductor substrate;
forming a gate electrode wherein opposing ends of the gate electrode overlap isolation regions and the gate electrode is located over an active region within the semiconductor substrate;
forming sourcedrains adjacent the gate electrode and within the active region, a transistor channel region being defined under the gate electrode in the active region between the sourcedrains;
forming an etch stop layer over the gate electrode; and
forming at least one electrical contact that extends through the etch stop layer and contacts a portion of the gate electrode that overlies the channel region in the active region;
wherein the gate electrode is formed with a contact pad; and the at least one electrical contact is formed to contact the gate electrode at the contact pad.
15. The method of claim 14, wherein the at least one electrical contact is formed to contact the gate electrode in the middle of the width of the gate electrode.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. An ultrasound imaging system, comprising:
an ultrasound transducer;
a transmit beamformer;
a receiver beamformer;
a harmonic filter coupled between the ultrasound transducer and the transmit beamformer to reduce transmitted harmonic components;
a fundamental filter coupled between the ultrasound transducer and the receiver beamformer to reduce received fundamental components;
a fusion processor to generate multiple frames of fusion images from subsequent frames of ultrasound transmissions;
a transmitreceive switch to couple either the transmit beamformer or the receive beamformer to the ultrasound transducer;
a first switch to connect the harmonic filter between the transmit beamformer and the transmitreceive switch when in a first mode and to connect the transmit beamformer to the transmitreceive switch without going through the harmonic filter when in a second mode; and
a second switch to connect the fundamental filter between the receive beamformer and the transmitreceive switch when in a first mode and to connect the receive beamformer to the transmitreceive switch without going through the fundamental filter when in a second mode;
wherein the fusion processor combines a harmonic frame derived from a first pair of the subsequent frames with a fundamental frame derived from a second pair of the subsequent frames, or combines a fundamental frame derived from the first pair of the subsequent frames with a harmonic frame derived from the second pair of the subsequent frames, to generate one of the multiple frames.
2. The ultrasound imaging system of claim 1, wherein the harmonic filter is configured to adjust at least one of delay, phase and amplitude of a pulse supplied by the transmit beamformer.
3. The ultrasound imaging system of claim 1, wherein the transmit beamformer is configured to generate two pulses for the two subsequent frames of ultrasound transmissions.
4. The ultrasound imaging system of claim 3, wherein the receiver beamformer is configured to receive and store two beams formed as echoes of the two pulses; and the fusion processor is configured to extract a harmonic frame and a fundamental frame from the two beams.
5. The ultrasound imaging system of claim 4, wherein the fusion processor is configured to perform alignment and matching of the two beams to extract the harmonic frame and the fundamental frame.
6. The ultrasound imaging system of claim 4, wherein the two pulses are identical; and the harmonic filter is applied to a first one of the two pulses and not to a second one of the two pulses.
7. The ultrasound imaging system of claim 4, wherein the ultrasound transducer is excited to transmit multiple amplitude-modulated transmit pulses with different delays for the two subsequent frames of ultrasound transmissions.
8. The ultrasound imaging system of claim 4, wherein the ultrasound transducer is excited to transmit multiple pulses with different amplitudes to extract harmonic signals.
9. The ultrasound imaging system of claim 4, wherein the two pulses differ in at least one of: delay, phase, frequency, duration, width, and amplitude.
10. The ultrasound imaging system of claim 4, wherein the receive beamformer includes a high-dynamic range, low-noise, high-gain amplifier to boost harmonic signals and reduced gain for fundamental signals.
11. The ultrasound imaging system of claim 4, wherein the two pulses are identical; and the fundamental filter is used in receive echoes from a first one of the two pulses and not a second one of the two pulses.
12. An ultrasound imaging system, comprising:
an ultrasound transmitter having a harmonic filter to reduce transmitted harmonic components;
an ultrasound receiver having a fundamental filter to reduce received fundamental components; and
a fusion processor to combine a harmonic frame derived from a first pair of reflected beams with a fundamental frame derived from a second pair of reflected beams, or to combine a fundamental frame derived from the first pair of reflected beams and a harmonic frame derived from the second pair of reflected beams, to generate a fused frame;
wherein:
each pair of reflected beams are generated from a first pulse and a second pulse; and

the harmonic filter is applied to the first pulse to generate a first beam of the pair of reflected beams but not to the second pulse substantially identical to the first pulse.
13. The ultrasound imaging system of claim 12, wherein the ultrasound transmitter includes a switch, which when in a first mode applies the harmonic filter to the first pulse and when in a second mode bypasses the harmonic filter for the second pulse.
14. An ultrasound imaging system, comprising:
an ultrasound transmitter having a harmonic filter to reduce transmitted harmonic components;
an ultrasound receiver having a fundamental filter to reduce received fundamental components; and
a fusion processor to combine a harmonic frame derived from a first pair of reflected beams with a fundamental frame derived from a second pair of reflected beams, or to combine a fundamental frame derived from the first pair of reflected beams with a harmonic frame derived from the second pair of reflected beams, to generate a fused frame;
wherein the fundamental filter is applied to a first beam of the pair of reflected beams but not to a second beam of the pair of reflected beams.
15. The ultrasound imaging system of claim 14, wherein the first beam and the second beam are generated based on identical pulses from the ultrasound transmitter.
16. The ultrasound imaging system of claim 15, wherein the ultrasound receiver includes a switch, which when in a first mode applies the fundamental filter to the first beam and when in a second mode bypasses the fundamental filter for the second beam.
17. The ultrasound imaging system of claim 15, wherein the ultrasound receiver includes a high-dynamic range, low-noise, high-gain amplifier to boost harmonic signals, with reduced gain for fundamental signals.
18. An ultrasound imaging system, comprising:
an ultrasound transducer;
a transmit beamformer;
a receiver beamformer;
a transmitreceive switch to subsequently:
connect the transmit beamformer to the ultrasound transducer to transmit a first beam into an object,
connect the receiver beamformer to the ultrasound transducer to receive the first beam reflected from the object,
connect the transmit beamformer to the ultrasound transducer to transmit a second beam into the object, and
connect the receiver beamformer to the ultrasound transducer to receive the second beam reflected from the object;

a fusion processor to:
adjust the reflected second beam to align and match with the reflected first beam to compensate a difference between the received first beam and the received second beam,
extract a harmonic signal by adding the reflected first beam and the reflected, adjusted second beam,
extract a fundamental signal by calculating a difference between the reflected first beam and the reflected, adjusted second beam, and
combine the harmonic signal and the fundamental signal to generate a fused signal that is used to generate an ultrasound image.