Author: claimsbot

1. A system for temporarily storing files, comprising:
at least one computer configured to:
receive a file;
store the file on the at least one computer;
allow the file to be accessed over a network; and
securely delete the file when a rule defining when the file is to be securely deleted has been satisfied.
2. The system of claim 1, wherein the rule is defined by a specified time limit.
3. The system of claim 1, wherein the rule is defined by a specified number of files.
4. The system of claim 1, wherein securely deleting the file includes overwriting the file with random data.
5. The system of claim 1, wherein the computer is further configured to delete information identifying the source of the file.
6. The system of claim 1, wherein the file is at least one of a photograph, a coupon, an advertisement, and a news article.
7. A method of temporarily storing files, comprising:
receiving, by at least one computer, a file over a network;
storing the file in a database;
posting the file; and
securely deleting the file when a rule defining when the file is to be securely deleted has been satisfied.
8. The method of claim 7, further comprising allowing the file to be downloaded from a website.
9. The method of claim 7, further comprising limiting access to the file.
10. The method of claim 7, wherein securely deleting the file includes securely deleting the file when a specified time limit is satisfied.
11. The method of claim 7, wherein securely deleting the file includes securely deleting the file when a rule defining a specified number of files is satisfied.
12. The method of claim 7, wherein securely deleting the file includes overwriting the file with random data.
13. The method of claim 7, further comprising deleting information identifying the source of the file.
14. The method of claim 7, further requiring the file to be received from a registered sender.
15. The method of claim 7, further comprising allowing an administrator to define the rule.
16. A system for temporarily storing files, comprising:
at least one computer including a processor configured to:
receive an email communication;
open the email communication;
collect the file from the email communication;
store the file; and
securely delete the file when a rule defining when the file is to be securely deleted has been satisfied.
17. The system of claim 16, wherein the rule is defined by a specified time limit.
18. The system of claim 16, wherein the rule is defined by a specified number of files.
19. The system of claim 16, wherein the rule is defined by an administrator.
20. The system of claim 16, wherein the processor is further configured to post the file on a website.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. An electric cable stripping device, including at least one stripping beam emitted by a LASER source and focused by an optical assembly to a cutting point, and further including at least one receiving track for receiving a portion of cable to strip, each LASER source including a LASER diode emitting a stripping beam of wavelength between 400 nm and 460 nm.
2. A device according to claim 1, wherein each LASER source is a LASER diode emitting a stripping beam of wavelength between 400 nm and 410 nm or between 440 nm and 460 nm.
3. A device according to claim 1, comprising mechanical directing structure adapted to move at least one cutting point around a cable receiving track in a transverse plane.
4. A device according to claim 1, comprising mechanical directing structure adapted to move at least one cutting point along a rectilinear cable receiving track.
5. A device according to claim 1, wherein each cable receiving track passes entirely across the device and is provided with a retractable stop which, in retracted position, allows the passage of the cable, the latter then passing across the device and which, in extended position, crosses the cable receiving track and thus closes the passage to the cable in order to enable stripping of one end of the cable wedged against the extended stop
6. A device according to claim 1, comprising several rectilinear receiving tracks for cables to strip, these tracks extending in the same plane parallel to each other in a longitudinal direction (X), and in that the device includes mechanical directing structure adapted to move at least one cutting point or at least one receiving track in a transverse direction (Y) at a right angle to the longitudinal direction X and parallel to the plane of the cable receiving tracks.
7. A device according to claim 1, comprising at least two stripping beams, the cutting points of said beams being situated on respective opposite sides of a cable receiving track, in the same transverse stripping plane.
8. A device according to claim 1, comprising four stripping beams distributed around a cable receiving track each of the stripping beams being formed by a transverse primary beam emitted by a blue or violet laser diode in the stripping plane, and reflected by a motor-driven pivoting mirror, the motor-driven pivoting mirrors being controlled out of synchronization such that the stripping beams do not cross each other.
9. A device according to claim 1 comprising three or four stripping beams distributed around a cable receiving track, each of the stripping beams being formed by a primary beam emitted by a blue or violet laser diode in a direction parallel to the cable receiving track, and reflected by a motor-driven pivoting mirror.
10. A device according to claim 9, wherein the device has a front face by which a cable to strip may be inserted into a cable entry aperture, and in that each motor-driven pivoting mirror is associated with a motor arranged behind the corresponding laser diode.
11. A device according to claim 1, comprising, for each cable receiving track , a holding assembly for holding a cable to strip in the cable receiving track, and in that the holding assembly includes a gland provided with a sleeve of light-tight elastic material.
12. A device according to claim 11, wherein each holding assembly includes a slide able to slide in a direction at a right angle to the cable receiving track and including at least two through passages of different inside diameters, each through passage being provided with a gland with a sleeve of a light-tight elastic material.
13. A device according to claim 1, comprising adapted to measure a diameter of a cable to strip accommodated in a cable receiving track and to adjust the position of at least one cutting point relative to said receiving track, according to the diameter measured.
14. A device according to claim 1, comprising, for at least one stripping beam, a monitoring system including at least one photodiode for the capture and the analysis of an optical verification signal emitted by a cable aimed at by said stripping beam, and a control adapted to adapt scanning parameters according to the results of analysis of the optical verification signal.
15. A device according to claim 1, comprising an autofocus system for the feedback control of a cutting point, adapted to determine the position of said cutting point relative to a surface of a cable to strip accommodated in the corresponding receiving track, this autofocus system including two verification beams which are coplanar with the stripping beam and surround the latter, as well as means for capture and analysis of a verification image formed by radiation reflected by a cable accommodated in the receiving track, said receiving track extending in a longitudinal direction qualified as inclined, which, in a plane containing the axial direction of the stripping beam and the longitudinal direction of the receiving track, forms a non-zero angle with a normal direction of stripping at a right angle to the axial direction of the stripping beam.
16. A device according to claim 1, comprising an autonomous battery.

1. A method of query pattern matching, comprising:
(a) generating a list of potential ancestors and a list of potential descendants;
(b) sorting the list of potential ancestors and the list of potential descendants in an order of a start position attribute in a database;
(c) determining whether input lists are not empty and whether a stack is not empty;
(d) determining, based upon a result from (c), whether a start position of a current node of the list of potential ancestors is greater than an end position of a node on a top of the stack and a start position of a current node of the list of potential descendants is greater than the end position of the node on the top of the stack;
(e) popping the stack for a first result from (d) and for a second result from (d) determining whether the start position of the current node of the list of potential ancestors is less than the start position of the current node of the list of potential descendents; and
(f) pushing the current node of the list of potential ancestors onto the stack and looking to a next node of the list of potential ancestors for a first result from (e) and appending matches to an output list and looking to a next node in the list of potential descendants for a second result from (e).
2. The method of claim 1, further including matching a pattern in an XML document.
3. The method of claim 1, further including sorting output in a descendant order.
4. The method of claim 3, further including making a single pass though the list of potential ancestors.
5. The method of claim 3, further including making a single pass through the list of potential descendants.
6. The method of claim 1, further including sorting the output list based upon one or more of document ID, start position of node from the list of potential ancestors, and start position of node from the list of potential descendants.
7. A method of query pattern matching, comprising:
(a) generating a list of potential ancestors and a list of potential descendants;
(b) sorting the list of potential ancestors and the list of potential descendants in order of a start position attribute in a database;
(c) determining whether input lists are not empty and whether a stack is not empty;
(d) determining, based upon a result from (c), whether a start position of a current node of the list of potential ancestors is greater than an end position of a node on a top of the stack and a start position of a current node of the list of potential descendants is greater than the end position of the node on the top of the stack;
(e) for a first result from (d) popping the stack, determining whether the stack is empty and if the stack is empty merging a tuple self and inherit lists into an inherit list associated with a top of the stack and if the stack is not empty output the tuple self and inherit list, and for a second result from (d) determining whether the start position of the current node of the list of potential ancestors is less than the start position of the current node of the list of potential descendents; and
(f) pushing the current node of the list of potential ancestors onto the stack and looking to a next node of the list of potential ancestors for a first result from (e) and appending matches to an output list and looking to a next node in the list of potential descendants for a second result from (e).
8. The method of claim 7, further including matching a pattern in an XML database.
9. The method of claim 7 further including making a single pass though the list of potential ancestors.
10. The method of claim 9, further including making a single pass through the list of potential descendants.
11. The method of claim 7, further including sorting the output list based upon one or more of document ID, start position of node from the list of potential ancestors, and start position of node from the list of potential descendants.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A circuit comprising:
a first multi-tanh cell having a first common-emitter node to receive a first bias current;
a first extra transistor coupled to the first common-emitter node to dynamically divert a portion of the first bias current from the first multi-tanh cell;
a second multi-tanh cell having a second common-emitter node to receive a second bias current;
a second extra transistor coupled to the second common-emitter node to dynamically divert a portion of the second bias current from the second multi-tanh cell; and
first and second input networks arranged to cause the first and second multi-tanh cells to operate as multipliers;
where:
the outputs of the first and second multi-tanh cells are coupled together;
the first multi-tanh cell is arranged to multiply a first input signal and a second input signal;
the second multi-tanh cell is arranged to multiply a third input signal and a feedback signal;
the outputs of the first and second multi-tanh cells are coupled together in a summing configuration;
the circuit further comprises an integrating buffer to generate an output signal in response to the outputs of the first and second multi-tanh cells; and
the circuit further comprises a summing circuit to generate the feedback signal in response to the output signal and a fourth input signal.
2. The circuit of claim 1 where the first extra transistor is arranged to dynamically divert a portion of the first bias current in response to one or more of the X and Y signals.
3. The circuit of claim 2 where the input network comprises:
a first pair of resistors coupled between a first combination of input terminals and the base of a first transistor in the first multi-tanh cell; and
a second pair or resistors coupled between a second combination of input terminals and the base of a second transistor in the first multi-tanh cell.
4. The circuit of claim 3 where the input network further comprises:
a third pair of resistors coupled between a third combination of input terminals and the base of a third transistor in the first multi-tanh cell; and
a fourth pair or resistors coupled between a fourth combination of input terminals and the base of a fourth transistor in the first multi-tanh cell.
5. The circuit of claim 3 where the one or more of the X and Y signals are coupled to the base of the first extra transistor through one or more resistors.
6. The circuit of claim 1 where the first extra transistor has an emitter area that is greater than the emitter area of any transistor in the first multi-tanh cell.
7. The circuit of claim 1 where the first multi-tanh cell includes one or more extra junctions coupled between each transistor and the first common-emitter node.
8. The circuit of claim 7 further comprising one or more additional extra junctions coupled between the first extra transistor and the first common-emitter node.
9. The circuit of claim 1 where the first and second multi-tanh cells have the same multiplier gain.
10. The circuit of claim 1 further comprising a current source coupled to the common-emitter node to provide the bias current to the first multi-tanh cell.
11. The circuit of claim 1 where the first multi-tanh cell comprises:
a first transistor having an emitter coupled to the first common-emitter node, a collector coupled to a first output terminal, and a base coupled to a first input through a first resistor and to a second input through a second resistor;
a second transistor having an emitter coupled to the first common-emitter node, a collector coupled to a second output terminal, and a base coupled to the first input through a third resistor and to a third input through a fourth resistor;
a third transistor having an emitter coupled to the first common-emitter node, a collector coupled to the second output terminal, and a base coupled to a fourth input through a fifth resistor and to the second input through a sixth resistor;
a fourth transistor having an emitter coupled to the first common-emitter node, a collector coupled to the first output terminal, and a base coupled to the fourth input through a seventh resistor and to the third input through an eighth resistor; and
a current source coupled to the first common-emitter node.
12. The circuit of claim 11 where the base of the first extra transistor is coupled to the first input through a ninth resistor, to the second input through a tenth resistor, to the third input through an eleventh resistor, and to the fourth input through a twelfth resistor.
13. The circuit of claim 1 further comprising a plurality of resistors, each resistor coupled between an emitter of a transistor in the first multi-tanh cell and a common node.
14. A method comprising:
operating a first multi-tanh cell having a first common-emitter node to receive a first bias current;
splitting the first bias current between the first multi-tanh cell and a first extra transistor in response to the product of a first input signal and a second input signal applied to the first multi-tanh cell;
operating a second multi-tanh cell having a second common-emitter node to receive a second bias current;
splitting the second bias current between the second multi-tanh cell and a second extra transistor in response to the product of a third input signal and a feedback signal applied to the second multi-tanh cell;
combining the outputs of the first and second multi-tanh cells to generate an intermediate signal;
integrating the intermediate signal to generate an output signal; and
summing the output signal and a fourth input signal to generate the feedback signal.
15. The method of claim 14 further comprising driving the first extra transistor in response to a mean of the X and Y signals applied to the first multi-tanh cell.
16. A circuit comprising:
a first multi-tanh cell having a first common-emitter node to receive a first bias current;
a first extra transistor coupled to the first common-emitter node to dynamically divert a portion of the first bias current from the first multi-tanh cell;
a second multi-tanh cell having a second common-emitter node to receive a second bias current and an output coupled to an output of the first multi-tanh cell;
a second extra transistor coupled to the second common-emitter node to dynamically divert a portion of the second bias current from the second multi-tanh cell;
a buffer having an input coupled to the outputs of the first and second multi-tanh cells; and
a feedback network arranged to form a feedback loop with the second multi-tanh cell and the buffer;
where:
the first multi-tanh cell is arranged outside of the feedback loop;
the feedback network has an attenuation factor K;
the buffer comprises an integrating buffer;
the first multi-tanh cell is arranged to multiply a first input signal and a second input signal;
the second multi-tanh cell is arranged to multiply a third input signal and a feedback signal; and
the buffer is arranged to generate an output signal having the form kXYU, where k is a constant, X comprises the value of the first input signal, Y comprises the value of the second input signal, and U comprises the value of the third input signal.