Author: claimsbot

1. An image processing apparatus comprising:
a tuner which receives a broadcasting signal of a program corresponding to at least one of a plurality of categories;
a UI processor which generates a UI having at least one of a plurality of attributes and capable of being displayed for the program;
an image processor which performs image processing for the received broadcasting signal; and
a controller which controls the UI processor so that the attribute of the UI can correspond to the category of the program,
wherein the UI attribute comprises at least one of different fonts and different themes which are set corresponding to the category of the program; and
wherein the controller determines if a same UI font or a same UI theme is set corresponding to different categories, and outputs a predetermined message if the same UI font or the same UI theme is set corresponding to the different categories.
2. The image processing apparatus according to claim 1, wherein the UI attribute further comprises a color.
3. The image processing apparatus according to claim 2, further comprising a memory device which stores information on the UI attribute corresponding to one or more categories,
wherein the controller determines the UI attribute corresponding to the category according to the stored information.
4. The image processing apparatus according to claim 2, wherein the UI attribute is downloaded externally.
5. The image processing apparatus according to claim 1, the category of the program comprises at least one of a movie, a drama, news, sports, and a documentary.
6. The image processing apparatus according to claim 5, further comprising a display unit which displays the generated UI.
7. The image processing apparatus according to claim 6, wherein the controller controls the UI processor to display the UI on the display unit during tuning a channel selected among the plurality of channels.
8. The image processing apparatus according to claim 6, further comprising a user input unit through which a user’s instruction for the UI attribute is inputted,
wherein the controlling unit determines the UI attribute corresponding to the category according to the inputted instruction.
9. The image processing apparatus according to claim 8, wherein the controller controls the UI processor to generate an attribute setting UI for setting the UI attribute and to display the attribute setting UI on the display unit.
10. The image processing apparatus according to claim 9, wherein, in the case of setting the plurality of attributes, the controller controls the UI processor to reflect the previously set attribute to the attribute setting UI to be displayed on the display unit.
11. The image processing apparatus according to claim 1, wherein the UI is displayed automatically in response to a channel change.
12. The image processing apparatus according to claim 11, wherein the attribute of the UI comprises of an icon.
13. The image processing apparatus according to claim 12, wherein the channel number andor the channel name is displayed along with the icon.
14. The image processing apparatus according to claim 13, wherein the channel number andor the channel name is displayed according to the attribute of the UI which includes color information corresponding to the category.
15. The image processing apparatus according to claim 13, wherein the color of the UI is corresponds to the attribute of the UI which includes color information corresponding to the category.
16. The image processing apparatus according to claim 1, wherein the UI attribute comprises of an icon corresponding to the category.
17. The image processing apparatus according to claim 16, wherein the icon visually corresponds to the nature of the category.
18. The image processing apparatus according to claim 16, wherein the UI attribute further comprises of sound information.
19. An image processing method comprising:
receiving a broadcasting signal of a program corresponding to at least one of a plurality of categories;
generating a UI capable of being displayed for the program so that a UI attribute having at least one of a plurality of attributes can correspond to the category of the program,
wherein the UI attribute comprises at least one of different fonts and different themes which are set corresponding to the category of the program; and
wherein if a same UI font or a same UI theme is set corresponding to different categories, a predetermined message is output if the same UI font or the same UI theme is set corresponding to the different categories.
20. The image processing method according to claim 19, wherein the UI attribute further comprises a color.
21. The image processing method according to claim 20, wherein the generating the UI comprises: receiving a user’s instruction for the UI attribute, and determining the UI attribute corresponding to the category according to the user’s instruction.
22. The image processing method according to claim 21, wherein the generating the UI further comprises: generating an attribute setting UI for setting the UI attribute, and displaying the generated attribute setting UI.
23. The image processing method according to claim 22, wherein the displaying the attribute setting UI reflects the previously set attribute to the attribute setting UI to be displayed in the case of setting the plurality of UI attributes.
24. The image processing method according to claim 20, wherein the generating the UI further comprises: storing information on the UI attribute, and determining the UI attribute corresponding to the category according to the stored information.
25. The image processing method according to claim 19, the category of the program comprises at least one of a movie, a drama, news, sports, and a documentary.
26. The image processing method according to claim 19, wherein the generating the UI comprises displaying the generated UI.
27. The image processing method according to claim 26, wherein the displaying the generated UI displays the UI during tuning a channel selected among a plurality of channels.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. An operational amplifier arranged in a feedback configuration, the operational amplifier comprising:
a plurality of amplifiers connected between input and output terminals of the operational amplifier to form a plurality of at least partially different amplification paths extending from the input terminal to the output terminal, each of the amplification paths including a respective subset of the plurality of amplifiers configured in series and having a respective first-in-order amplifier and a respective last-in-order amplifier,
wherein the first-in-order amplifier of at least a first and a second of the amplification paths is a same first common amplifier, and the first-in-order amplifier of at least a third of the amplification paths is different than the first common amplifier, and
wherein the last-in-order amplifier of the first and second amplification paths is a second common amplifier.
2. The operational amplifier of claim 1, wherein the last-in-order amplifier of the third amplification path is also the second common amplifier.
3. The operational amplifier of claim 1, wherein at least three of the amplification paths are electrically joined at a point immediately before their last-in-order amplifiers, and at least two of the amplification paths are electrically joined at a point immediately after their first-in-order amplifiers.
4. The operational amplifier of claim 1, wherein the amplification paths include a plurality of lower-order amplification paths and a plurality of higher-order amplification paths, the lower-order amplification paths including fewer amplifiers than the higher-order amplification paths, at least one of the lower-order amplification paths includes at least one of: an AC coupling capacitor between the output terminal and a last amplifier of that lower-order amplification path, or an AC coupling capacitor between the input terminal and a first amplifier of that lower-order amplification path.
5. The operational amplifier of claim 1, wherein each amplifier includes at least one amplification transistor configuration selected from the group consisting of a common-source transistor, a differential pair of transistors, a pseudo differential pair of transistors, and complementary pseudo differential pairs of transistors.
6. The operational amplifier of claim 5, wherein at least one of the plurality of amplifiers further includes a common-gate transistor cascode-connected with a transistor of the amplification transistor configuration.
7. The operational amplifier of claim 1, further comprising a positive feedback amplifier.
8. The operational amplifier of claim 1, wherein at least one amplification path includes at least four amplifiers connected in series.
9. The operational amplifier of claim 1, having a loop gain slope of at least \u221218 dBoctave over a portion of its frequency response lower than the unity-gain frequency of the loop gain.
10. The operational amplifier of claim 1, wherein the first and second common amplifiers have amplification gains at DC greater than or equal to that of all other amplifiers of the plurality of amplifiers.
11. The operational amplifier of claim 1, wherein the plurality of at least partially different amplification paths includes a fifth order amplification path.
12. The operational amplifier of claim 1, wherein the plurality of at least partially different amplification paths includes a first order amplification path.
13. An operational amplifier arranged in a feedback configuration, the operational amplifier comprising:
a plurality of amplifiers connected between input and output terminals of the operational amplifier to form a plurality of at least partially different amplification paths extending from the input terminal to the output terminal, each of the amplification paths including a respective subset of the plurality of amplifiers configured in series and having a respective first-in-order amplifier and a respective last-in-order amplifier,
wherein the last-in-order amplifier of at least a first and a second of the amplification paths is a same first common amplifier, and the last-in-order amplifier of at least a third of the amplification paths is different than the first common amplifier, and
wherein the first-in-order amplifier of the first and second amplification paths is a second common amplifier.
14. The operational amplifier of claim 13, wherein the first-in-order amplifier of the third amplification path is not the second common amplifier.
15. The operational amplifier of claim 13, wherein at least two of the amplification paths are electrically joined at a point immediately before their last-in-order amplifiers, and at least three of the amplification paths are electrically joined at a point immediately after their first-in-order amplifiers.
16. The operational amplifier of claim 13, wherein the amplification paths include a plurality of lower-order amplification paths and a plurality of higher-order amplification paths, the lower-order amplification paths including fewer amplifiers than the higher-order amplification paths, at least one of the lower-order amplification paths including at least one of: an AC coupling capacitor between the output terminal and a last amplifier of that lower-order amplification path, or an AC coupling capacitor between the input terminal and a first amplifier of that lower-order amplification path.
17. The operational amplifier of claim 13, wherein each amplifier includes at least one amplification transistor configuration selected from the group consisting of a common-source transistor, a differential pair of transistors, a pseudo differential pair of transistors, and complementary pseudo differential pairs of transistors.
18. The operational amplifier of claim 17, wherein at least one of the plurality of amplifiers further includes a common-gate transistor cascode-connected with a transistor of the amplification transistor configuration.
19. The operational amplifier of claim 13, further comprising a positive feedback amplifier.
20. The operational amplifier of claim 13, wherein at least one amplification path includes at least four amplifiers connected in series.
21. The operational amplifier circuit of claim 13, having a loop gain slope of at least \u221218 dBoctave over a portion of its frequency response lower than the unity-gain frequency of the loop gain.
22. The operational amplifier circuit of claim 13, wherein the first and second common amplifiers have amplification gains at DC greater than or equal to that of all other amplifiers of the plurality of amplifiers.
23. The operational amplifier circuit of claim 13, wherein the plurality of at least partially different amplification paths includes a fifth order amplification path.
24. The operational amplifier circuit of claim 13, wherein the plurality of at least partially different amplification paths includes a first order amplification path.
25. An operational amplifier arranged in a feedback configuration, the operational amplifier comprising:
a first and a second amplifier, connected in series in that order, defining a first amplification path that extends between an input terminal and an output terminal; and
a third, a fourth, and the second amplifier, connected in series in that order, defining a second amplification path that extends between the input and output terminals; and
the third, a fifth, a sixth, and the second amplifier, connected in series in that order, defining a third amplification path that extends between the input and output terminals.
26. The operational amplifier of claim 25, further comprising a seventh amplifier connected between the input and output terminals.
27. The operational amplifier of claim 25, wherein each amplifier includes at least one amplification transistor configuration selected from the group consisting of a common-source transistor, a differential pair of transistors, a pseudo differential pair of transistors, and complementary pseudo differential pairs of transistors.
28. The operational amplifier of claim 27, wherein at least one of the plurality of amplifiers further includes a common-gate transistor cascode-connected with a transistor of the amplification transistor configuration.
29. The operational amplifier of claim 25, further comprising a series connection of eighth and ninth amplifiers, the series connection connected in parallel with at least one of: the fifth amplifier or the sixth amplifier.
30. The operational amplifier of claim 25, further comprising a positive feedback amplifier.
31. An operational amplifier arranged in a feedback configuration, the operational amplifier comprising:
a first amplifier to receive an input from an input terminal and produce a first output;
a second amplifier to receive the input from the input terminal and produce a second output;
a plurality of third amplifiers connected at least partially in parallel and each to receive the first output from the first amplifier and to produce a plurality of third outputs; and
a fourth amplifier to receive the second output and a plurality of signals based on the third outputs and to produce a fourth output to an output terminal.

1. A method of sending data performed by a sending device and comprising:
sending data by at least a first data signal and a second data signal, said data being divided into data blocks of identical size including a header field, which is a cyclic prefix and has a predetermined size, said data signals being sent to at least one data processing device adapted to apply a cyclic autocorrelation function with parameter k to the data blocks of the first and second data signals enabling said first and second data signals to be identified, wherein the value of the parameter k is a natural integer and is a multiple of a ratio between the size of said data blocks and the predetermined size of the header field; and
if said first data signal needs to be separated from said second data signal, modifying the size of the header field of the data blocks of said first data signal before sending said first data signal, so that the size of the header field of the data blocks of said first data signal is different from said predetermined size of the header field of the data blocks of said second data signal, the value of the parameter k and the size of said data blocks remaining unchanged.
2. A method of processing data conveyed by at least two data signals by a data processing device, the method comprising:
receiving the at least two data signals, said data being divided into data blocks of identical size including a header field, which is a cyclic prefix and has a predetermined size, the header field of one of said data signals being different in size from the predetermined size of the header field of the other said data signal;
applying a cyclic autocorrelation function with parameter k of fixed value to the data blocks of said data signals, wherein the value of the parameter k is a natural integer and a multiple of a ratio between the size of said data blocks and the predetermined size of the header field; and
if applying the cyclic autocorrelation function yields a non-null result, identifying said one of said data signals in which the size of the header field of the data blocks is different from said predetermined size of the header field, the value of the parameter k and the size of the data blocks remaining unchanged.
3. The method according to claim 2, including a step of eliminating said header field of said identified data signal.
4. A device comprising:
a non-transitory memory comprising a computer program stored thereon; and
a computer, which is configured by the computer program to execute the following steps:
sending data by at least a first data signal and a second data signal, said data being divided into data blocks of identical size including a header field, which is a cyclic prefix and has a predetermined size, said data signals being sent to at least one data processing device adapted to apply a cyclic autocorrelation function with parameter k of fixed value to the data blocks of the first and second data signals enabling said first and second data signals to be identified, wherein the value of the parameter k is a natural integer and a multiple of a ratio between the size of said data blocks and the predetermined size of the header field; and
if said first data signal needs to be separated from said second data signal, modifying the size of the header field of the data blocks of said first data signal before sending said first data signal, so that the size of the header field of the data blocks of said first data signal is different from said predetermined size of the header field of the data blocks of said second data signal, the value of the parameter k and the size of said data blocks remaining unchanged.
5. A device for processing data conveyed by at least two data signals, said data being divided into data blocks of identical size including a header field, which is a cyclic prefix and has a predetermined size, said device including:
a non-transitory memory comprising a computer program stored thereon; and
a computer, which is configured by the computer program to execute the following steps:
receiving the at least two data signals, the header field of one of said data signals being different in size from the predetermined size of the header field of the other said data signal;
applying a cyclic autocorrelation function with parameter k of fixed value to the data blocks of said data signals, wherein the value of the parameter k is a natural integer and a multiple of a ratio between the size of said data blocks and the predetermined size of the header field; and
if applying the cyclic autocorrelation function yields a non-null result, identifying said one of said data signals in which the size of the header field of the data blocks is different from said predetermined size of the header field, the value of the parameter k and the size of the data blocks being unchanged.
6. The device according to claim 5, wherein the data blocks include a first field containing said data and at least one second field, the size of the data blocks of the identified data signal differs from the size of the data blocks predetermined by the size of the second field that is different, and the device is configured to eliminate said second field in the identified data signal.
7. A system comprising:
at least one sending device configured to send data by at least a first data signal and a second data signal, said data being divided into data blocks of identical size including a header field, which is a cyclic prefix and has a predetermined size, and comprising:
a first non-transitory memory comprising a first computer program stored thereon; and
a first computer, which is configured by the first computer program to execute the following steps:
modifying the size of the header field of the data blocks of said first data signal, if said first data signal needs to be separated from said second data signal, before sending said first data signal, so that the size of the header field of the data blocks of said first data signal is different from said predetermined size of the header field of the data blocks of said second data signal, a value of a parameter k and the size of said data blocks remaining unchanged; and

at least one processing device for processing the data conveyed from the at least one sending device by at least the first data signal and the second data signal, said processing device comprising:
a second non-transitory memory comprising a second computer program stored thereon; and
a second computer, which is configured by the second computer program to execute the following steps:

applying a cyclic autocorrelation function with the parameter k of fixed value to the data blocks of the first data signal and the second data signal, wherein the value of the parameter k is a natural integer and a multiple of a ratio between the size of said data blocks and the predetermined size of the header field; and
if applying the cyclic autocorrelation function yields a non-null result, identifying said one of said data signals in which the size of the header field of the data blocks is different from said predetermined size of the header field.
8. A non-transitory computer-readable medium comprising a computer program product stored thereon, wherein the product includes program code instructions for executing a method of sending data when said program is executed by a computer, wherein the method comprises:
sending the data by at least a first data signal and a second data signal, said data being divided into data blocks of identical size including a header field, which is a cyclic prefix and has a predetermined size, said data signals being sent to at least one data processing device adapted to apply a cyclic autocorrelation function with parameter k to the data blocks of the first and second data signals enabling said first and second data signals to be identified, wherein the value of the parameter k is a natural integer and a multiple of a ratio between the size of said data blocks and the predetermined size of the header field; and
if said first data signal needs to be separated from said second data signal, modifying the size of the header field of the data blocks of said first data signal before sending said first data signal, so that the size of the header field of the data blocks of said first data signal is different from said predetermined size of the header field of the data blocks of said second data signal, the value of the parameter k and the size of said data blocks remaining unchanged.
9. A non-transitory computer-readable medium comprising a computer program product stored thereon, wherein the product includes program code instructions for executing a method of processing data when said program is executed by a computer, wherein the method comprises:
processing data conveyed by at least two data signals, said data being divided into data blocks of identical size including a header field, which is a cyclic prefix and has a predetermined size, the header field of one of said data signals being different in size from the predetermined size of the header field of the other said data signal; and
applying a cyclic autocorrelation function with parameter k of fixed value to the data blocks of said data signals, wherein the value of the parameter k is a natural integer and a multiple of a ratio between the size of said data blocks and the predetermined size of the header field; and
if applying the cyclic autocorrelation function yields a non-null result, identifying said one of said data signals in which the size of the header field of the data blocks is different from said predetermined size of the header field, the value of the parameter k and the size of the data blocks remaining unchanged.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A radiation detecting unit comprising:
a photoelectric conversion section arranged in proximity to a scintillator and including a plurality of photoelectric conversion elements arrayed along a first surface opposed to the scintillator, and a plurality of electrodes for output of signals arrayed on a second surface opposite to the first surface corresponding to the plurality of photoelectric conversion elements;
a signal processing circuit for processing signals from the plurality of photoelectric conversion elements;
a flexible substrate on which the photoelectric conversion section and the signal processing circuit are mounted and which electrically connects the plurality of electrodes of the photoelectric conversion section to the signal processing circuit; and
a radiation shield plate provided opposite to the second surface of the photoelectric conversion section with the flexible substrate in between and formed so that an end in a direction along the second surface is located inside the photoelectric conversion section,
wherein the plurality of electrodes have an array pitch on the second surface made shorter than an array pitch of the photoelectric conversion elements by a wiring member, and
wherein the flexible substrate is folded along the end of the radiation shield plate, at an intermediate region between a mounting region of the photoelectric conversion section and a mounting region of the signal processing circuit, whereby the signal processing circuit is arranged on the opposite side to the photoelectric conversion elements with the radiation shield plate in between.
2. The radiation detecting unit according to claim 1, wherein the photoelectric conversion section is provided with a multilayer wiring section for conversion of the array pitch of the plurality of electrodes on the second surface, as the wiring member.
3. The radiation detecting unit according to claim 1, wherein an electromagnetic shield film is formed in the intermediate region of the flexible substrate.
4. The radiation detecting unit according to claim 1, wherein the end of the radiation shield plate is chamfered at corners along the intermediate region of the flexible substrate.
5. The radiation detecting unit according to claim 1, wherein two said signal processing circuits are mounted at virtually symmetric positions with respect to a center line of the second surface on the flexible substrate and connector sections located at virtually equal distances from mounting regions of the two signal processing circuits are connected thereto.
6. The radiation detecting unit according to claim 1, wherein the flexible substrate is formed so that a thickness of the intermediate region is smaller than a thickness of the mounting region of the photoelectric conversion section and the mounting region of the signal processing circuit.