1. A fluid ejection system, comprising:
first and second fluid supplies;
first and second fluid restrictions communicated with respective of the first and second fluid supplies; and
first and second fluid chambers communicated with respective of the first and second fluid restrictions,
wherein the first fluid restriction has a width in a range of 8 microns to 10 microns and a length in a range of 10 microns to 20 microns, and the second fluid restriction has a width in a range of 10 microns to 16 microns and a length in a range of 5 microns to 10 microns.
2. The fluid ejection system of claim 1, further comprising:
first and second fluid feed slots communicated with respective of the first and second fluid supplies and respective of the first and second fluid chambers via respective of the first and second fluid restrictions,
wherein a distance from an edge of the first fluid feed slot to a center of the first fluid chamber is in a range of 61 microns to 71 microns, and a distance from an edge of the second fluid feed slot to a center of the second fluid chamber is in a range of 51 microns to 61 microns.
3. The fluid ejection system of claim 1, further comprising:
first and second resistors formed within respective of the first and second fluid chambers, wherein the first resistor has an area of 400 square microns and the second resistor has an area of 450 square microns.
4. The fluid ejection system of claim 1, further comprising:
first and second orifices communicated with respective of the first and second fluid chambers,
wherein the first orifice has a diameter of 14 microns and the second orifice has a diameter of 15 microns.
5. The fluid ejection system of claim 1, wherein fluid of the first fluid supply has a surface tension of 58 dynescentimeter and a viscosity of 1.8 centipoise, and fluid of the second fluid supply has a surface tension of 29 dynescentimeter and a viscosity of 2.5 centipoise.
6. The fluid ejection system of claim 1, wherein the system is adapted to eject drops of fluid of the first fluid supply from the first fluid chamber at a frequency up to at least 24 kilohertz with each of the drops having a weight of 6 nanograms, and eject drops of fluid of the second fluid supply from the second fluid chamber at a frequency up to at least 36 kilohertz with each of the drops having a weight of 5 nanograms.
7. The fluid ejection system of claim 1, wherein the first fluid supply includes a black ink and the second fluid supply includes a colored ink.
8. A fluid ejection system, comprising:
first and second fluid supplies;
first and second fluid restrictions communicated with respective of the first and second fluid supplies;
first and second fluid chambers communicated with respective of the first and second fluid restrictions; and
first and second fluid feed slots communicated with respective of the first and second fluid supplies and respective of the first and second fluid chambers via respective of the first and second fluid restrictions,
wherein a distance from an edge of the first fluid feed slot to a center of the first fluid chamber is in a range of 61 microns to 71 microns, and a distance from an edge of the second fluid feed slot to a center of the second fluid chamber is in a range of 51 microns to 61 microns, and
wherein the first fluid restriction has a width in a range of 8 microns to 10 microns and a length in a range of 10 microns to 20 microns, and the second fluid restriction has a width in a range of 10 microns to 16 microns and a length in a range of 5 microns to 10 microns.
9. The fluid ejection system of claim 8, further comprising:
first and second resistors formed within respective of the first and second fluid chambers, wherein the first resistor has an area of 400 square microns and the second resistor has an area of 450 square microns.
10. The fluid ejection system of claim 8, further comprising:
first and second orifices communicated with respective of the first and second fluid chambers,
wherein the first orifice has a diameter of 14 microns and the second orifice has a diameter of 15 microns.
11. The fluid ejection system of claim 8, wherein fluid of the first fluid supply has a surface tension of 58 dynescentimeter and a viscosity of 1.8 centipoise, and fluid of the second fluid supply has a surface tension of 29 dynescentimeter and a viscosity of 2.5 centipoise.
12. The fluid ejection system of claim 8, wherein the system is adapted to eject drops of fluid of the first fluid supply from the first fluid chamber at a frequency up to at least 24 kilohertz with each of the drops having a weight of 6 nanograms, and eject drops of fluid of the second fluid supply from the second fluid chamber at a frequency up to at least 36 kilohertz with each of the drops having a weight of 5 nanograms.
13. The fluid ejection system of claim 8, wherein the first fluid supply includes a black ink and the second fluid supply includes a colored ink.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A method for packaging non-volatile memory, comprising:
selecting, from a set of non-volatile memory die, a plurality of non-volatile memory die on which predefined die-level and sub-die level tests have been deferred until after packaging, in accordance with predefined criteria and predefined statistical die performance information corresponding to the set of non-volatile memory die;
packaging the selected plurality of non-volatile memory die into a memory device; and
after said packaging, performing a set of tests on the plurality of non-volatile memory die in the memory device to identify respective units of memory within the non-volatile memory die in the memory device that meet predefined validity criteria, wherein the set of tests performed include the deferred predefined die-level and sub-die level tests.
2. The method of claim 1, wherein the selecting includes selecting the plurality of non-volatile memory die in accordance with wafer positions of the plurality of non-volatile memory die.
3. The method of claim 1, wherein the selecting includes selecting the plurality of non-volatile memory die in accordance with wafer positions of the plurality of non-volatile memory die and statistical die performance information corresponding to the wafer positions.
4. The method of claim 1, further including:
deferring at least until the selected plurality of non-volatile memory die are packaged into the memory device, or forgoing entirely, performance of at least one of the following tests: a wafer sort test, a memory component test, a known good die test, and a burn-in test.
5. The method of claim 1, wherein the selecting includes:
in accordance with the predefined statistical die performance information, selecting a number of die so as to over-provision the memory device to guarantee, within a predefined statistical tolerance, a minimum amount of programmableerasable memory in the memory device.
6. The method of claim 1, further including:
after packaging the plurality of non-volatile memory die into the memory device, determining an amount of programmableerasable memory in the memory device.
7. The method of claim 1, further including:
after packaging the plurality of non-volatile memory die into the memory device, during initialization of the memory device, performing an initialization procedure that includes determining a validity state of one or more units of memory of the plurality of non-volatile memory die, the validity state being one of a valid state or an invalid state; and
using physical-to-physical address remapping to redirect a readwrite request addressed to a respective unit of memory having an invalid state to a unit of memory having a valid state.
8. The method of claim 7, wherein determining a validity state of the one or more units of memory includes:
determining a validity metric of the one or more units of memory; and
comparing the validity metric to a predefined threshold to determine the validity state of the one or more units of memory.
9. The method of claim 8, wherein the validity metric is a bit error rate (BER) of the one or more units of memory during initialization.
10. The method of claim 8, further including:
writing to the plurality of non-volatile memory die in accordance with a wear leveling algorithm that accounts for the validity metric determined during initialization.
11. The method of claim 1, wherein the set of non-volatile memory die comprises flash memory.
12. The method of claim 1, wherein a median number of programerase (PE) cycles performed on units of memory of the plurality of non-volatile memory die prior to the packaging is less than fifty PE cycles.
13. A storage system, comprising:
an interface for operatively coupling the storage system with a host system; and
a plurality of non-volatile memory die selected, packaged, and tested in accordance with the method of claim 1.