Author: claimsbot

1. An implantable medical device including:
a. a multi-axial acceleration sensor configured to generate an accelerometer output signal, and
b. an evaluation unit connected thereto, wherein the evaluation unit is configured to:
(1) define at least two signal components A1 and A2 from the accelerometer output signal, wherein:
i. the signal component A1 is associated with a right-ventricular contraction of a heart, and
ii. the signal component A2 is associated with a left-ventricular contraction of the heart;

(2) determine signal characteristics of each of the signal components A1 and A2, wherein the signal characteristics include amplitudes occurring within one cardiac cycle; and
(3) define a characteristic value K from the signal characteristics, wherein the characteristic value K is a ratio of values of the amplitudes.
2. The implantable medical device of claim 1 wherein the implantable medical device is configured to deliver therapy to the heart in dependence on the characteristic value K.
3. The implantable medical device of claim 1 wherein the evaluation unit is configured to define the signal components A1 and A2 in accordance with directional components of the accelerometer output signal.
4. The implantable medical device of claim 1 wherein the evaluation unit is configured to:
a. define a third signal component A3, and
b. define the characteristic value K as a function of:
(1) a signal characteristic determined from the third signal component A3, and
(2) the signal characteristics of the signal components A1 and A2.
5. The implantable medical device of claim 4 wherein
a. the third signal component A3 is defined by the activity of the patient, and
b. the signal characteristic determined therefrom reflects mean patient activity over a predefined time interval.
6. The implantable medical device of claim 4 wherein the evaluation unit is configured to determine the characteristic value K only at times in which the signal characteristic determined from the third signal component A3 lies in a predefined value range.
7. The implantable medical device of claim 6 wherein the third signal component A3 is defined by one or more of:
a. patient heart rate,
b. patient blood pressure, and
c. patient cardiac impedance.
8. The implantable medical device of claim 1 wherein the evaluation unit is configured to also:
a. derive a heart rate from the signal components A1 andor A2, and
b. define the characteristic value K as a function of the signal characteristics and the heart rate.
9. The implantable medical device of claim 1 wherein:
a. the implantable medical device further includes a blood pressure sensor, and
b. the evaluation unit is configured to define the characteristic value K as a function of the signal characteristics and an output of the blood pressure sensor.
10. The implantable medical device of claim 1 wherein:
a. the implantable medical device further includes an impedance sensor, and
b. the evaluation unit is configured to define the characteristic value K as a function of the signal characteristics and an output of the impedance sensor.
11. The implantable medical device of claim 1 wherein the implantable device is configured to determine at least one of:
a. frequency, and
b. amplitude,
of respiration from the accelerometer output signal.
12. The implantable medical device of claim 1 wherein the implantable medical device:
a. includes a control unit configured to detect arrhythmias in dependence on the characteristic value K, and
b. delivers therapy to the heart in dependence on the detected arrhythmias.
13. The implantable medical device of claim 1 further including a control unit configured to adjust settings of the implantable medical device in dependence on the characteristic value K.
14. The implantable medical device of claim 1 wherein the implantable medical device is a cardiac pacemaker andor defibrillatorcardioverter.
15. The implantable medical device of claim 1 wherein the acceleration sensor is a 3D accelerometer.
16. The implantable medical device of claim 1 wherein the acceleration sensor is situated within a pulmonary artery.
17. An implantable medical device including:
a. an acceleration sensor configured to generate an accelerometer output signal;
b. an evaluation unit connected thereto, wherein the evaluation unit is configured to:
(1) define a signal component A1 from the accelerometer output signal, the signal component A1;
(a) representing characteristics of a right-ventricular contraction of a heart, and
(b) being dependent on a right-ventricular amplitude occurring within one cardiac cycle;

(2) define a signal component A2 from the accelerometer output signal, the signal component A2;
(a) representing characteristics of a left-ventricular contraction of the heart, and
(b) being dependent on a left-ventricular amplitude occurring within one cardiac cycle; and

(3) define a characteristic value K from the signal components A1 and A2, the characteristic value K being a ratio of the right-ventricular and left-ventricular amplitudes;

c. a therapy unit configured to deliver therapy to the heart in dependence on the characteristic value K.
18. The implantable medical device of claim 17 wherein the acceleration sensor is situated within a pulmonary artery.
19. The implantable medical device of claim 17 wherein:
a. the evaluation unit is further configured to define a third signal component A3, wherein the third signal component A3 is dependent on the activity of the patient; and
b. the characteristic value K is additionally defined from the third signal component A3.
20. The implantable medical device of claim 19 wherein the characteristic value K is defined only at times in which the third signal component A3 lies in a predefined value range.
21. A method having the steps of:
a. generating an accelerometer output signal,
b. defining at least two signal components A1 and A2 from the accelerometer output signal, wherein:
i. the signal component A1 is associated with a right-ventricular contraction of a heart, and
ii. the signal component A2 is associated with a left-ventricular contraction of the heart;

c. determining signal characteristics of each of the signal components A1 and A2 wherein the signal characteristics include amplitudes occurring within one cardiac cycle;
d. defining a characteristic value K from the signal characteristics, wherein the characteristic value K is a ratio of values of the amplitudes; and
e. delivering therapy to the heart in dependence on the characteristic value K.
22. The method of claim 21 wherein the accelerometer output signal is generated from an accelerometer situated in a pulmonary artery.
23. The method of claim 21:
a. further including the step of defining a third signal component A3, wherein the third signal component A3 is dependent on the activity of the patient; and
b. wherein the characteristic value K is further defined from the third signal component A3.
24. The method of claim 23 wherein the characteristic value K is determined only at times in which the third signal component A3 lies in a predefined value range.
25. The method of claim 23 wherein the third signal component A3 is dependent on one or more of:
a. patient heart rate,
b. patient blood pressure, and
c. patient cardiac impedance.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A method for encoding transform coefficients, the method comprising:
encoding transform coefficients of a transform coefficient block according to a predetermined scan order, and encoding a set number of transform coefficients in each group until a last group of the transform coefficient block is encoded;
storing an obtained map of non-zero transform coefficients, absolute values of transform coefficients, and positive and negative signs of non-zero transform coefficients; and
when the last group is being encoded, after obtaining a map of non-zero transform coefficients encoded in the last group, encoding the stored map of non-zero transform coefficients and the map of non-zero transform coefficients encoded in the last group into a bit stream; after obtaining absolute values of transform coefficients and positive and negative signs of non-zero transform coefficients encoded in the last group, encoding the stored absolute values of transform coefficients and positive and negative signs of non-zero transform coefficients and the absolute values of transform coefficients and positive and negative signs of non-zero transform coefficients encoded in the last group into the bit stream.
2. The method according to claim 1, wherein encoding transform coefficients of a transform coefficient block, and encoding a set number of transform coefficients in each group comprise:
encoding a map of non-zero transform coefficients of the predetermined number of transform coefficients, encoding a map of transform coefficients greater than 1 of the set number of transform coefficients, encoding absolute values of transform coefficients greater than 1 of the set number of transform coefficients, and encoding positive and negative signs of non-zero transform coefficients of a set number of transform coefficients.
3. The method according to claim 1, wherein the set number is 16.
4. The method according to claim 1, wherein the predetermined scan order is scan order in wide-range scan mode or scan order in narrow-range scan mode.
5. A method for decoding transform coefficients, the method comprising:
parsing transform coefficients of a bit stream according to a predetermined scan order to obtain a map of non-zero transform coefficients; and
parsing, according to the predetermined scan order, a map of transform coefficients greater than 1, absolute values of transform coefficients greater than 1, and positive and negative signs of non-zero transform coefficients of the bit stream, and parsing a set number of transform coefficients of the bit stream each time.
6. The method according to claim 5, wherein:
parsing transform coefficients of a bit stream according to a predetermined scan order to obtain a map of non-zero transform coefficients comprises:
parsing the bit stream according to a scan order in wide-range scan mode to obtain a map of non-zero transform coefficients; and

parsing, according to the predetermined scan order, a map of transform coefficients greater than 1, absolute values of transform coefficients greater than 1, and positive and negative signs of non-zero transform coefficients of the bit stream comprises:
parsing a map of transform coefficients greater than 1, absolute values of transform coefficients greater than 1, and positive and negative signs of non-zero transform coefficients of the bit stream according to the scan order in wide-range scan mode.
7. The method according to claim 5, wherein:
parsing transform coefficients of a bit stream according to a predetermined scan order to obtain a map of non-zero transform coefficients comprises:
parsing the bit stream according to a scan order in narrow-range scan mode to obtain a map of non-zero transform coefficients, and parsing a set number of transform coefficients of the bit stream each time; and

parsing, according to the predetermined scan order, a map of transform coefficients greater than 1, absolute values of transform coefficients greater than 1, and positive and negative signs of non-zero transform coefficients of the bit stream comprises:
parsing, according to the scan order in narrow-range scan mode, a map of transform coefficients greater than 1, absolute values of transform coefficients greater than 1, and positive and negative signs of non-zero transform coefficients of the bit stream.
8. An apparatus for encoding transform coefficients, the apparatus comprising:
an encoding unit, configured to:
encode transform coefficients of a transform coefficient block according to a predetermined scan order,
encode a set number of transform coefficients in each group until a last group of the transform coefficient block is encoded,
when the last group is being encoded, after obtaining a map of non-zero transform coefficients encoded in the last group, encode a stored map of non-zero transform coefficients and the map of non-zero transform coefficients encoded in the last group into a bit stream, and
after obtaining absolute values of transform coefficients and positive and negative signs of non-zero transform coefficients encoded in the last group, encode stored absolute values of transform coefficients and positive and negative signs of non-zero transform coefficients and the absolute values of transform coefficients and positive and negative signs of non-zero transform coefficients encoded in the last group into the bit stream; and

a storing unit, configured to store the map of non-zero transform coefficients, absolute values of transform coefficients, and positive and negative signs of non-zero transform coefficients obtained by the encoding unit.
9. The apparatus according to claim 8, wherein the set number is 16.
10. The apparatus according to claim 8, wherein the encoding unit configured to encode transform coefficients of a transform coefficient block according to a predetermined scan order is further configured to: encode transform coefficients of the transform coefficient block according to a scan order in wide-range scan mode.
11. The apparatus according to claim 8, wherein the encoding unit configured to encode transform coefficients of a transform coefficient block according to a predetermined scan order is further configured to: encode transform coefficients of the transform coefficient block according to a scan order in narrow-range scan mode.
12. An apparatus for decoding transform coefficients, the apparatus comprising:
a decoding unit, configured to:
parse transform coefficients of a bit stream according to a predetermined scan order to obtain a map of non-zero transform coefficients,
parse, according to the predetermined scan order, a map of transform coefficients greater than 1, absolute values of transform coefficients greater than 1, and positive and negative signs of non-zero transform coefficients of the bit stream, and
parse a set number of transform coefficients of the bit stream each time.
13. The apparatus according to claim 12, wherein the decoding unit is further configured to:
parse the bit stream according to a scan order in wide-range scan mode to obtain a map of non-zero transform coefficients, and
parse, according to the scan order in wide-range scan mode, a map of transform coefficients greater than 1, absolute values of transform coefficients greater than 1, and positive and negative signs of non-zero transform coefficients of the bit stream.
14. The apparatus according to claim 12, wherein the decoding unit is further configured to:
parse the bit stream according to a scan order in narrow-range scan mode to obtain a map of non-zero transform coefficients, and parse a set number of transform coefficients of the bit stream each time; and
parse, according to the scan order in narrow-range scan mode, a map of transform coefficients greater than 1, absolute values of transform coefficients greater than 1, and positive and negative signs of non-zero transform coefficients of the bit stream.

1. A portable payment device comprising a casing having a microprocessor and memory means therein with the memory means being configured to include an electronic purse for the retention of value that is operatively available to be decremented in off-line transactions,
coupling means for coupling the microprocessor to a cooperant device to enable the transfer of value from or to the electronic purse to carry out one category of payments in the form of off-line proximity payments,
user interface means for enabling a user to input instruction data into the portable payment device,
wireless communications means for communicating with a financial institution by way of a wireless communications network,
wherein the portable payment device is configured for the conduct of an additional and different category of payments in the form of remote on-line payments by way of the wireless communications network by communication with the financial institution
wherein the said different category of remote on-line payments enable a payment to be made from an account of the user controlled by the financial institution to a financial account of a recipient.
2. A portable payment device as claimed in claim 1 in which the coupling means are contactless coupling means.
3. A portable payment device as claimed in claim 1 in which the wireless communications means are dedicated transaction data communications means.
4. A portable payment device as claimed in claim 1 in which the portable payment device is a dedicated payment device.
5. A portable payment device as claimed in claim 1 in which the user interface means includes a keypad and display panel.
6. A portable payment device as claimed in claim 1 in which the microprocessor and memory are configured to retain data relating to off-line transactions conducted in which instance the system is such that retained data is uploaded to an associated financial institution when later communicating therewith by way of the wireless network.
7. A portable payment device as claimed in claim 1 in which the portable payment device is a unitary device produced in its entirety as such.
8. A portable payment device as claimed in claim 1 in which the microprocessor and memory means are constituted, at least in part, by a smartcard operatively received by the casing to form the portable payment device.
9. A portable payment device as claimed in claim 1 in which the microprocessor and memory means are constituted, at least in part, by a SIM card employed independently of any SIM card that is used for communications with a banking institution.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. An electronic device package box, comprising:
a base unit including a base, and a plurality of first pins mounted to said base and adapted to be electrically connected to a plurality of electronic components, said base having a pin-protruding face, and a first mounting face for mounting the electronic components thereto, each of said first pins including a first connection section protruding from said pin-protruding face; and
a cover unit including a cover connected to and cooperating with said base to define a packaging space, and a plurality of second pins mounted to said cover and adapted to be electrically connected to a plurality of electronic components, said cover having a second mounting face facing said packaging space for mounting the electronic components thereto, each of said second pins including a second connection section protruding from one of said base and said cover.
2. The electronic device package box of claim 1, wherein said first mounting face is opposite to said pin-protruding face, and said second connection section of each of said second pins protrudes from said pin-protruding face spaced and is apart from said first connection sections.
3. The electronic device package box of claim 2, wherein said base includes a first mounting wall having said pin-protruding face and said first mounting face, a base surrounding wall extending from said first mounting wall toward said cover, and two extensions extending outwardly and respectively from two opposite sides of said first mounting wall and disposed externally of said base surrounding wall, and a plurality of insert holes formed in said extensions, said pin-protruding face of said base extending from said first mounting wall to said extensions, said second connection section of each of said second pins extending through a respective one of said insert holes to protrude from said pin-protruding face of said base.
4. The electronic device package box of claim 3, wherein said cover includes a second mounting wall having said second mounting face, and a cover surrounding wall extending from said second mounting wall toward said base, said cover surrounding wall having two spaced-apart pin-protruding faces respectively proximate to said extensions, said second connection sections of said second pins protruding correspondingly from said pin-protruding faces of said cover surrounding wall to extend respectively through said insert holes in said extensions.
5. The electronic device package box of claim 4, wherein said base surrounding wall has a first abutment face facing said second mounting wall, said cover surrounding wall further having a second abutment face abutting against said first abutment face, each of said first pins further including a wire tying section protruding from said first abutment face and adapted to be electrically connected to a corresponding one of the electronic components.
6. The electronic device package box of claim 5, wherein said cover surrounding wall further has a plurality of engaging holes, and said base surrounding wall further has a plurality of engaging pieces engaged respectively to said engaging holes.
7. The electronic device package box of claim 6, wherein said base surrounding wall further has a plurality of first slots, each of said first slots having a wire-inlet end proximate to said first mounting face and a wire-outlet end proximate to said first abutment face, said cover surrounding wall further having a plurality of second slots, each of said second slots having a wire-inlet end proximate to said second mounting face and a wire-outlet end provided on a corresponding one of said pin-protruding faces of said cover surrounding wall.
8. The electronic device package box of claim 7, wherein said wire-outlet ends of said first slots are arranged in a staggered manner.
9. The electronic device package box of claim 1, wherein said cover includes a second mounting wall having said second mounting face, and a cover surrounding wall extending from said second mounting wall toward said base, said cover surrounding wall having a plurality of engaging holes, said base including a first mounting wall having said pin-protruding face of said base and said first mounting face, a base surrounding wall connected to said cover surrounding wall, and a plurality of engaging pieces projecting from said base surrounding wall and engaged respectively to said engaging holes.
10. The electronic device package box of claim 1, wherein said second connection section of each of said second pins is mounted to said base, each of said second pins further including a contact section provided on said cover surrounding wall and electrically contacting said second connection section when said cover is connected to said base.
11. The electronic device package box of claim 1, wherein said pin-protruding face of said base is perpendicular to said first mounting face, said cover further having a pin-protruding face perpendicular to said second mounting face, said second connection section of each of said second pins protruding from said pin-protruding face of said cover.