Author: claimsbot

1. A memory device comprising:
at least one memory cell element-pair of a multi-level flash memory array, the memory cell element-pair comprising first and second elements, each element configured to store one of a blank level and two or more program levels; and
a component configured to store in the at least one memory cell element-pair a program pattern of a plurality of program pattern combinations, comprising:
two blank levels;
two program levels; and
one blank level and one program level, the levels differing by less than a predetermined value and configured to exclude from the storing, program pattern combinations having levels differing by the predetermined value or greater without replacing the excluded program pattern combinations with other combinations.
2. The memory device of claim 1, wherein the predetermined value corresponds to a maximum allowable difference between the corresponding threshold voltages of the blank level and the program level.
3. The memory device of claim 1, wherein the levels differing by less than a predetermined value corresponds to a difference between the threshold voltage of the program level of the first element and the threshold voltage of the blank level of the second element.
4. The memory device of claim 1, wherein the memory cells of the multi-level flash memory array comprise dual element nitride storage flash memory cells.
5. The memory device of claim 1, wherein the memory cells of the multi-level flash memory array comprise dual element nitride storage flash memory cells, and wherein the blank level and the two or more program levels correspond to three or more threshold voltages and three or more data states per element.
6. The memory device of claim 5, wherein the two or more program levels comprise three program levels, and wherein the predetermined value is 3, whereby the program pattern combinations comprise: 11, 22, 23, 24, 32, 33, 34, 42, 43, 44, 21, 12, 31, and 13, but exclude the 41 and 14 combinations.
7. A method of forming a memory device comprising:
forming at least one memory cell of a multi-level flash memory array, each memory cell comprising two or more memory elements, each memory element configured to store three or more levels; and
excluding one or more program pattern combinations that can be stored in the two or more memory elements of the at least one memory cell without replacing the excluded one or more program pattern combinations with other combinations.
8. The method of claim 7, wherein the memory cell comprises a memory cell element-pair comprising a first element and a second element, each element configured to store a blank level and two or more program levels.
9. The method of claim 8, wherein the excluding one or more program pattern combinations that can be stored in the at least one memory cell element-pair comprises restricting the program pattern combinations which may be stored to a set, comprising:
two blank levels;
two program levels; and
one blank level and one program level, wherein the difference between the corresponding threshold voltages of the blank level and the program level is less than a difference threshold voltage and excluding from the programming, pattern combinations having threshold voltages differing by the difference threshold voltage or greater without replacing the excluded one or more program pattern combinations with other combinations.
10. The method of claim 9, wherein the difference threshold voltage is a maximum allowable voltage difference between the corresponding threshold voltages of the blank level and the program level.
11. The method of claim 9, wherein the difference threshold voltage is the difference between the threshold voltage of the program level of the first element and the threshold voltage of the blank level of the second element.
12. A method of programming memory cell element-pairs of a multi-level flash memory array, each element of the element-pairs configured to store one of a blank level and two or more program levels, the method comprising:
providing two or more unprogrammed memory cell element-pairs; and
programming one or more of the memory cell element-pairs to one of a plurality of program pattern combinations, comprising:
two blank levels;
two program levels; and
one blank level and one program level, wherein the difference between the corresponding threshold voltage of the blank level and the program level is less than a difference threshold voltage and excluding from the programming, program pattern combinations having threshold voltages differing by the difference threshold voltage or greater without replacing the excluded program pattern combinations with other combinations.
13. The method of claim 12, wherein the difference threshold voltage corresponds to a maximum allowable threshold voltage difference between a first element of the element-pair from the blank level, when a second element of the element-pair is programmed to one of the two or more program levels.
14. The method of claim 12, further comprising excluding one or more of the program pattern combinations that can be stored in the at least one memory cell based on selecting only those pattern combinations that correspond to threshold voltages of the blank level and the program level that differ by less than the difference threshold voltage.
15. The method of claim 12, wherein the plurality of program patterns comprise four or more program patterns.
16. The method of claim 12, wherein the difference threshold voltage is the difference between the threshold voltage of the program level of the first element and the threshold voltage of the blank level of the second element.
17. The method of claim 12, wherein the blank level and two or more program levels correspond to three or more threshold voltages.
18. The method of claim 17, wherein the memory cells of the multi-level flash memory array comprise dual element nitride storage flash memory cells, and wherein the three or more threshold voltages correspond to three or more data states per bit or element.
19. The method of claim 12, wherein the two or more program levels comprise three program levels, and wherein the difference threshold voltage restricts the program pattern combinations to: 11, 22, 23, 24, 32, 33, 34, 42, 43, 44, 21, 12, 31, and 13, but exclude the 41 and 14 combinations.
20. The method of claim 12, wherein the two or more program levels comprise three program levels, and wherein the difference threshold voltage restricts the program pattern combinations to: 11, 22, 23, 24, 32, 33, 34, 42, 43, 44, 21, 12, but exclude the 31, 13, 41 and 14 combinations.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A method comprising:
joining by a first node of a network to a multicast group having a multicast address, the multicast address specified by a server using a multicast location identifier (LID) as its source lid (SLID), the first node receiving packets from the server due to the packets being sent to a unicast destination location identifier (DLID) of the first node, the server receiving reply packets from the first node having a non-multicast queue pair (OP), but a multicast DLID, where the joining is selected from the group essentially consisting of:
assigning the multicast address to the first node, such that communication to the multicast address is directed to the first node through the network, and,
mapping a multicast port on a switch of the network to a port on the first node, such that communication to the multicast address is directed to the port on the first node from the multicast port on the switch; and,

upon failure of the first node,
if the joining assigned the multicast address to the first node, joining by a second node of the network to the multicast group, such that the multicast address is assigned to the second node, and the communication to the multicast address is handled by the second node, and,
if the joining mapped the multicast port on the switch to the port on the first node, remapping the multicast port on the switch to a port on the second node, such that the communication to the multicast address is directed to the port on the second node.
2. The method of claim 1, further comprising, if the joining assigned the multicast address to the first node, prior to the second node of the network joining the multicast group, the first node leaving the multicast group by the second node sending a leave request to a subnet manager (SM) on behalf of the first node.
3. The method of claim 1, further comprising, if the joining assigned the multicast address to the first node, upon failback by the first node, assigning the multicast address to the first node, such that communication to the multicast address is again handled by the first node.
4. The method of claim 1, wherein, if the joining mapped the multicast port on the switch to the port on the first node, the multicast port on the switch is remapped to the port on the second node by the second node requesting to remap the multicast port on the switch to the second node to a subnet manager (SM), the SM remapping the multicast port on the switch to the port on the second node.
5. The method of claim 1, further comprising, if the joining mapped the multicast port on the switch to the port on the first node, upon failback by the first node, remapping the multicast port on the switch to the port on the first node, such that communication to the multicast address is again directed to the port on the first node.
6. The method of claim 1, wherein the joining by the first node of the network to the multicast group comprises the first node requesting to join the multicast group to a subnet manager (SM), the SM assigning the multicast address to the first node and mapping the multicast port on the switch to the port on the first node.
7. The method of claim 1, wherein after the joining by the first node to the multicast group, the multicast group has only a single member, the first node.
8. The method of claim 1, further comprising, upon failure of the first node, the second node initially detecting the failure of the first node.
9. A system comprising:
a server;
a first node of a subnet having a port and initially having assigned thereto in a first mode a multicast address of a multicast group, such that initially communication to the multicast address is handled by the first node, the multicast address specified by a server using a multicast location identifier (LID) as its source lid (SLID), the first node receiving packets from the server due to the packets being sent to a unicast destination location identifier (DLID) of the first node, the server receiving reply packets from the first node having a non-multicast queue pair (OP), but a multicast DLID;
a second node of the subnet having a port;
a switch of the subnet having a multicast port initially mapped in a second mode to the port on the first node; and,
a management component of the subnet where, upon failure of the first node, the management component assigns the multicast address to the second node in the first mode, and remaps the multicast port on the switch to the port on the second node in the second mode, such that communication to the multicast address is handled by the second node.
10. The system of claim 9, wherein the second node detects the failure of the first node.
11. The system of claim 9, wherein the management component detects the failure of the first node.
12. The system of claim 9, wherein upon failback by the first node, the management component assigns the multicast address to the first node in the first mode, and remaps the multicast port on the switch to the port on the first node in the second mode.
13. The system of claim 9, wherein each of the first node and the second node comprises at least one of: a host and a channel adapter (CA).
14. The system of claim 9, wherein each of the first node and the second node comprises a channel adapter (CA) on a same host.
15. The system of claim 9, wherein the network comprises a subnet having a subnet manager (SM), where the management component is the SM.
16. An article comprising:
a computer-readable medium; and,
a computer program stored in the medium and executable by a computer for performing one of two actions selected from the group essentially consisting of: assigning a multicast address of a multicast group that was initially assigned to a first node of a network that has failed to a second node of the network; and, remapping a multicast port on a switch of the network that was initially mapped to a port on the first node that has failed to a port on the second node,
wherein the multicast address is specified by a server using a multicast location identifier (LID) as its source lid (SLID), the first node receiving packets from the server due to the packets being sent to a unicast destination location identifier (DLID) of the first node, and the server receiving reply packets from the first node having a non-multicast queue pair (QP), but a multicast DLID.
17. The article of claim 16, wherein the computer program assigns the multicast address of the multicast group that was initially assigned to the first node of the network that has failed to the second node of the network in response to receiving a request from the second node to join the multicast group.
18. The article of claim 16, wherein the computer program remaps the multicast port on the switch on the network that was initially mapped to the port on the first node to the port on the second node in response to receiving a remapping request from the second node.
19. The article of claim 16, wherein the medium is a recordable data storage medium.

1. A method for making an anti-reflection film of a solar cell comprising the steps of:
providing a laminate comprising:
a ceramic substrate;
a titanium-based compound film coated on the ceramic substrate;
a p+ type poly-silicon back surface field coated on the titanium-based compound film in a high-temperature atmospheric pressure chemical vapor deposition system;
a p\u2212 type poly-silicon light-soaking film coated on the p+ type poly-silicon back surface field in the high-temperature atmospheric pressure chemical vapor deposition system; and
an n+ type poly-silicon emitter coated on the p\u2212 type poly-silicon light-soaking film;

passivating the laminate with SiCNO:Ar plasma in a plasma-enhanced vapor deposition device, thus filling the dangling bonds of the silicon atoms at the surface of the n+ type poly-silicon emitter, the dangling bonds of the silicon grains at the grain boundaries of the p\u2212 type poly-silicon light-soaking film and the dangling bonds of the silicon atoms in the p+ type poly-silicon back surface field; and
coating the n+ type poly-silicon emitter with an anti-reflection film of SiCNSiO2.
2. The method according to claim 1, wherein the titanium-based compound film is used as a seed layer for poly-silicon films.
3. The method according to claim 1, wherein the titanium-based compound film is made of a material selected from a group consisting of TiSi2, TiN, TiC, TiB2 and TiCxNy.
4. The method according to claim 1, wherein the thickness of the ceramic substrate is 0.1 to 1.0 mm.
5. The method according to claim 1, wherein the thickness of the titanium-based compound film is 500 to 5000 angstroms.
6. The method according to claim 1, wherein the thickness of the p+ type poly-silicon back surface field is not larger than 1 micrometer.
7. The method according to claim 1, wherein the thickness of the p\u2212 type poly-silicon light-soaking film is 1 to 15 micrometers.
8. The method according to claim 7, wherein the size of the grains of the p\u2212 type poly-silicon light-soaking film is larger than 10 micrometers.
9. The method according to claim 1, wherein the thickness of the n+ type poly-silicon emitter is 1000 angstroms.
10. The method according to claim 1, wherein the step of passivating is executed at the room temperature to 400 degrees Celsius.
11. The method according to claim 1, wherein the step of passivating is executed for 1 to 30 minutes.
12. The method according to claim 1, wherein the step of passivating comprises the steps of:
providing silane, nitrous oxide and methane as gradients of the SiCNO:Ar plasma; and
providing argon as a carrier.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

What is claimed is:

1. A light structure, comprising:
a light having a light emitting end and defining a width;
a gripping mechanism attached to the light, the a gripping mechanism configured to grip apparel, and the gripping mechanism defining a gripping location where apparel is gripped; and
a headband comprising a mounting structure to which the gripping mechanism may be attached.
2. The light structure of claim 1, wherein the gripping structure comprises a pair of arms that are biased together.
3. The light structure of claim 2, wherein the mounting structure comprises a slot into which one of the arms may be inserted.
4. The light structure of claim 3, wherein the other arm closes on the outside of the mounting structure to grip the light in position when the one arm is inserted in the slot.
5. The light structure of claim 2, wherein the arms include teeth along an inner surface.
6. The light structure of claim 5, wherein the teeth comprise rows of teeth, and wherein rows of teeth on one arm are offset relative to rows of teeth on the other arm.
7. The light structure of claim 1, further comprising a power supply located remote from the light and attached by a cord to the light.
8. The light structure of claim 7, wherein the power supply comprises a battery pack.
9. The light structure of claim 8, wherein the battery pack comprises a clip for attaching to apparel.
10. The light structure of claim 9, wherein the battery pack comprises a cord wrap about its outer perimeter.
11. The light structure of claim 1, wherein the light is rotatably attached to the gripping mechanism.
12. The light structure of claim 11, wherein the light is configured so that it is turned on by rotation of a bezel on the outside of the light, and wherein a force required to rotate the bezel is less than a force required to rotate the light relative to the gripping mechanism.
13. The light structure of claim 11, wherein the light is pivotally attached to the gripping mechanism.
14. The light structure of claim 1, wherein the light is pivotally attached to the gripping mechanism.
15. The light structure of claim 14, wherein the width of the light is greater than, or substantially equal to, the distance between the light emitting end and the gripping location.
16. The light structure of claim 1, wherein the width of the light is greater than, or substantially equal to, the distance between the light emitting end and the gripping location.
17. A light structure comprising:
a light having a light emitting end and defining a width; and
a gripping mechanism attached to the light, the a gripping mechanism configured to grip apparel, and the gripping mechanism defining a gripping location where apparel is gripped;
wherein the width of the light is greater than, or substantially equal to, the distance between the light emitting end and the gripping location.
18. The light structure of claim 17, wherein the gripping structure comprises a pair of arms that are biased together.
19. The light structure of claim 18, wherein the arms include teeth along an inner surface.
20. The light structure of claim 19, wherein the teeth comprise rows of teeth, and wherein rows of teeth on one arm are offset relative to rows of teeth on the other arm.
21. The light structure of claim 17, further comprising a power supply located remote from the light and attached by a cord to the light.
22. The light structure of claim 21, wherein the power supply comprises a battery pack.
23. The light structure of claim 22, wherein the battery pack comprises a clip for attaching to apparel.
24. The light structure of claim 22, wherein the battery pack comprises a cord wrap about its outer perimeter.
25. The light structure of claim 17, wherein the light is rotatably attached to the gripping mechanism.
26. The light structure of claim 25, wherein the light is configured so that it is turned on by rotation of a bezel on the outside of the light, and wherein a force required to rotate the bezel is less than a force required to rotate the light relative to the gripping mechanism.
27. The light structure of claim 25, wherein the light is pivotally attached to the gripping mechanism.
28. The light structure of claim 17, wherein the light is pivotally attached to the gripping mechanism.
29. A light structure, comprising:
a light;
a bezel mounted on the light;
a gripping mechanism attached to the light, the a gripping mechanism configured to grip apparel, the gripping mechanism being rotatably mounted relative to the light; and
a switch connected with the light and the bezel wherein the light is turned on by rotation of the bezel;
wherein a force required to rotate the bezel is less than a force required to rotate the light relative to the gripping mechanism.