1460747069-7b8982cf-f1da-4b58-ae3e-bc1eff7725a4

1. A method for manufacturing a light-emitting device, comprising the steps of:
disposing a first substrate and a second substrate so that one surface of the first substrate faces a deposition surface of the second substrate, wherein the first substrate includes a reflective layer including an opening, a light absorption layer covering the opening in the reflective layer over the reflective layer, a protective layer including a trench portion in a position overlapped with the opening in the reflective layer over the light absorption layer, and a material layer including a light-emitting material over the protective layer; and
forming an EL layer including the light-emitting material in a region overlapped with the opening in the reflective layer on the deposition surface of the second substrate by performing light irradiation from the other surface side of the first substrate,
wherein the protective layer has a lower heat conductivity than the reflective layer and the light absorption layer,
wherein the protective layer has a first region which is overlapped with the reflective layer and a second region which is not overlapped with the reflective layer, and
wherein the first region is thicker than the second region.
2. The method for manufacturing a light-emitting device according to claim 1, wherein the protective layer includes a trench formed in a position overlapped with the reflective layer.
3. The method for manufacturing a light-emitting device according to claim 1, wherein the deposition surface of the second substrate is provided with a first electrode.
4. A method for manufacturing a light-emitting device, comprising the steps of:
disposing a first substrate and a second substrate so that one surface of the first substrate faces a deposition surface of the second substrate, wherein the first substrate includes a reflective layer including an opening, a light absorption layer covering the opening in the reflective layer over the reflective layer, a first protective layer including an opening in a position overlapped with the opening in the reflective layer over the light absorption layer, a second protective layer covering the opening in the first protective layer over the first protective layer, and a material layer including a light-emitting material over the second protective layer; and
forming an EL layer including the light-emitting material in a region overlapped with the opening in the reflective layer on the deposition surface of the second substrate by performing light irradiation from the other surface side of the first substrate,
wherein the first and second protective layers have a lower heat conductivity than the reflective layer and the light absorption layer,
wherein each of the first and second protective layers has a first region which is overlapped with the reflective layer and the second protective layer has a second region which is not overlapped with the reflective layer, and
wherein the first region of the first protective layer is thicker than the second region of the second protective layer.
5. The method for manufacturing a light-emitting device according to claim 4, wherein the first protective layer includes a trench formed in a position overlapped with the reflective layer.
6. The method for manufacturing a light-emitting device according to claim 4, wherein the deposition surface of the second substrate is provided with a first electrode.
7. A method for manufacturing a light-emitting device, comprising the steps of:
disposing a first substrate and a second substrate so that one surface of the first substrate faces a deposition surface of the second substrate, wherein the first substrate includes a reflective layer including an opening, a heat insulating layer including an opening in a position overlapped with the opening in the reflective layer over the reflective layer, a light absorption layer covering the opening in the reflective layer and the opening in the heat insulating layer over the heat insulating layer, a protective layer over the light absorption layer, and a material layer including a light-emitting material over the protective layer; and
forming an EL layer including the light-emitting material in a region overlapped with the opening in the reflective layer and the opening in the heat insulating layer on the deposition surface of the second substrate by performing light irradiation from the other surface side of the first substrate,
wherein the protective layer has a lower heat conductivity than the reflective layer and the light absorption layer,
wherein the protective layer has a first region which is overlapped with the reflective layer and a second region which is not overlapped with the reflective layer, and
wherein the first region is thicker than the second region.
8. The method for manufacturing a light-emitting device according to claim 7, wherein the heat insulating layer includes a trench formed in a position overlapped with the reflective layer.
9. The method for manufacturing a light-emitting device according to claim 7, wherein the deposition surface of the second substrate is provided with a first electrode.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A system for assembling a shielded space, comprising:
a plurality of rigid multi-layered wall panels with a top edge, a bottom edge, a right edge and a left edge, each panel comprising a low frequency magnetic shielding layer, and an ionizing radiation shield layer;
wherein the right edge and left edge of adjacent panels are adapted to connect to each other.
2. The system of claim 1, further comprising:
a non-ionizing radiation shielding layer comprised of non-woven metallized fibers; and
an anti-microbial layer.
3. The system of claim 1, wherein said ionizing radiation shielding layer is comprised of lead or lead amalgam.
4. The system of claim 1, wherein said ionizing radiation shielding layer is comprised of polyethylene.
5. The system of claim 1, one or more of said panels further comprising an acoustical shielding layer.
6. The system of claim 1, wherein the multi-layer panels are adapted to be attached to the wall of a room.
7. The system of claim 1, wherein at least one of said panels is attached to the headboard of a bed.
8. The system of claim 1, wherein at least one of said panels is free-standing.
9. The system of claim 1, wherein said panels are 8 feet in height.
10. The system of claim 1, wherein the panel layers are bonded by an adhesive.
11. The system of claim 5, wherein said acoustical shielding layer is comprised of a layer of mass loaded dampening material and a layer of acoustic foam, said acoustic foam layers being joined to said mass loaded dampening material by an adhesive layer therebetween.
12. The system of claim 1, one or more of said panels further comprising a bulletproof layer.

1460747060-88ac97b2-1a3f-4603-8df7-3ff99a923d9a

What is claimed is:

1 A method for estimating decoupling capacitance during a design flow, the method comprising the steps of:
(a) precharacterizing a set of power grid structures to model their respective noise behaviors;
(b) storing the respective noise behaviors as noise factors in a table; and
(c) during the ASIC design flow for a current design that includes at least one of the power grid structures, using the corresponding noise factor from the table to calculate decoupling capacitance for the current design.
2 The method of claim 1 wherein step (c) further includes the step of: using the calculated decoupling capacitance to determine decoupling capacitance area overhead, and reserving that amount of area in the current design for placement of decoupling capacitors.
3 The method of claim 2 wherein step (a) further includes a step of: precharacterizing a set of package structures.
4 The method of claim 3 wherein step (a) further includes a step of: characterizing a set of memory and logic structures to obtain a set of peak current parameters for each of the memory and logic structures.
5 The method of claim 4 wherein step (c) further includes the step of: calculating the decoupling capacitance: using the noise factors and peak current parameters corresponding to the power grid structures, package structures, and memory and logic structures in the current design.
6 The method of claim 5 wherein the peak current parameters include a total charge of peak current, maximum peak current, time-to-peak, peak window, and a total intrinsic capacitance.
7 The method of claim 6 wherein the total intrinsic capacitance is calculated using Nwell capacitance, non-switching capacitance, metal grid capacitance, and internal decoupling capacitance.
8 The method of claim 1 wherein step (a) further includes the step of: determining the noise factors by performing resistance, capacitance, and inductance (RCL) modeling for the power grids and packages using different processes, layer stacks, peak current values, peak with values, and time-to-peak values as inputs.
9 The method of claim 1 wherein step (c) further includes the step of: calculating the decoupling capacitance by, Cdecnoise factorQ(Vlim).
10 The method of claim 2 wherein step (c) further includes the step of: calculating a number of decoupling capacitors that need to be added to the current design by, CdcapCdec(Cn-wellCnsCpm).
11 A method for estimating decoupling capacitance during a design flow, the method comprising the steps of:
(a) modeling a set of power grid structures to obtain respective noise factors for each;
(b) storing the noise factors in a first table;
(c) characterizing a set of memory, and logic structures to obtain respective sets of peak current parameters;
(d) storing the peak current parameters in a second table;
(e) for a design that includes any combination of the power, package, memory, and logic structures, looking up the corresponding noise factors and peak current parameters from the first and second tables; and
(f) using the noise factors and peak current parameters retrieved from the tables to calculate decoupling capacitance and a number of required decoupling capacitors for the design.
12 The method of claim 11 wherein step (f) further includes the step of: calculating the decoupling capacitance by, Cdecnoise factorQ(Vlim).
13 The method of claim 12 wherein step (f) further includes the step of: calculating a number of decoupling capacitors that need to be added to the current design by, CdcapCdec(Cn-wellCnsCpm).
14 The method of claim 13 wherein step (f) further includes the step of: determining decoupling capacitance area overhead, and reserving that amount of area in the current design for placement of the decoupling capacitors.
15 The method of claim 14 wherein the peak current parameters include a total charge of peak current, maximum peak current, time-to-peak, peak window, and a total intrinsic capacitance.
16 The method of claim 15 wherein the total intrinsic capacitance is calculated using Nwell capacitance, non-switching capacitance, metal grid capacitance, and internal decoupling capacitance.
17 The method of claim 16 wherein step (a) further includes the step of: determining the noise factors by performing resistance, capacitance, and inductance (RCL) modeling for the power grids and packages using different processes, layer stacks, peak current values, peak with values, and time-to-peak values as inputs.
18 A computer readable medium containing program instructions for estimating decoupling capacitance during a design flow, the instructions for:
(a) precharacterizing a set of power grid structures to model their respective noise behaviors;
(b) storing the respective noise behaviors as noise factors in a table; and
(c) during the ASIC design flow for a current design that includes at least one of the power grid structures, using the corresponding noise factor from the table to calculate decoupling capacitance for the current design.
19 The computer readable medium of claim 18 wherein instruction (c) further includes the instruction of: using the calculated decoupling capacitance to determine decoupling capacitance area overhead, and reserving that amount of area in the current design for placement of decoupling capacitors.
20 The computer readable medium of claim 19 wherein instruction (a) further includes the instruction of: precharacterizing a set of package structures.
21 The computer readable medium of claim 20 wherein instruction (a) further includes the instruction of: characterizing a set of memory and logic structures to obtain a set of peak current parameters for each of the memory and logic structures.
22 The computer readable medium of claim 21 wherein instruction (c) further includes the instruction of: calculating the decoupling capacitance using the noise factors and peak current parameters corresponding to the power grid structures, package structures, and memory and logic structures in the current design.
23 The computer readable medium of claim 22 wherein the peak current parameters include a total charge of peak current, maximum peak current, time-to-peak, peak window, and a total intrinsic capacitance.
24 The computer readable medium of claim 23 wherein the total intrinsic capacitance is calculated using Nwell capacitance, non-switching capacitance, metal grid capacitance, and internal decoupling capacitance.
25 The computer readable medium of claim 18 wherein instruction (a) further includes the instruction of: determining the noise factors by performing resistance, capacitance, and inductance (RCL) modeling for the power grids and packages using different processes, layer stacks, peak current values, peak with values, and time-to-peak values as inputs.
26 The computer readable medium of claim 18 wherein instruction (c) further includes the instruction of: calculating the decoupling capacitance by, Cdecnoise factorQ(Vlim).
27 The computer readable medium of clam 26 wherein step (c) further includes the step of: calculating the decoupling capacitance by, Cdecnoise factorQ(Vlim).

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A method for imaging a dynamic process in a part of the body, especially blood perfusion, with an x-ray system, comprising:
acquiring rotational projections of the part of the body over an angular range (2),
deriving the anatomy of the part of the body subject to the dynamic process using a tomographic reconstruction from the projections (3),
determining an optimal position of the x-ray system according to the derived anatomy for acquiring projections of the dynamic process (4),
administering contrast agent to the part of the body (5),
acquiring projections of the dynamic process from the determined position (6);
calculating the dynamic contrast enhancement over time (7); and
calculating and displaying perfusion parameters (8).
2. The method according to claim 1, wherein the deriving of the anatomy of the part of the body is achieved by means of manual or automatic segmentation.
3. The method according to claim 1 wherein the calculation of the dynamic contrast enhancement over time is achieved by using scaling factors to normalize the dynamic contrast attenuation along x-ray directions in the determined position, and wherein the scaling factors are derived from the anatomy of the part of the body.
4. The method according to claim 1, wherein an open c-arm x-ray system is used.
5. A method for imaging a dynamic process of a part of a body, especially blood perfusion, with an x-ray system, comprising:
administering contrast agent to the part of the body (11),
acquiring rotational projections of the dynamic process over time of the part of the body over an angular range (12),
deriving the anatomy of the part of the body subject to the dynamic process using tomographic reconstruction from the projections (13),
calculating scaling factors from the derived anatomy for proper normalization of contrast attenuation along x-ray directions (14),
calculating the dynamic process from the projections using the scaling factors (15); and

calculating and displaying perfusion parameters (16).
6. The method according to claim 5, wherein calculating the dynamic process from the projections involves subtracting the static projection data mask that is derived from the tomographic reconstruction from the projections.
7. The method according to claim 5, wherein calculating the dynamic process from the projections involves subtracting a projection data mask derived from another tomographic reconstruction from another run of acquired projections.
8. The method according to claim 5, wherein an open c-arm x-ray system is used.
9. A computer readable medium encoded with a computer program configured to execute one of the methods according to claim 1.
10. An apparatus adapted to execute one of the methods according to claim 1.