Author: claimsbot

I claim:

1. A cable comprising:
a plurality of twisted pairs arranged in a matrix grid manner defining rows and columns,
the twisted pairs of the same row having the same twist direction;
the twisted pairs of the same column having opposite twist directions arranged staggered with each other;
every adjacent two twisted pairs in directions of either said rows or said columns, or both, having a phase shift angle with each other in a global coordinate system.
2. The cable as described in claim 1, wherein said phase shift angle is 90 degrees.
3. The cable as described in claim 1, wherein every adjacent two twisted pairs in diagonal directions have no phase shift angle with each other in a global coordinate system while having a phase shift angle with each other in a local coordinate system.
4. The cable as described in claim 1, wherein there are two rows and two columns of the twisted pairs.
5. A method of reducing crosstalk of a bunch of twisted pairs of a cable, comprising the steps of:
arranging said twisted pairs arranged in columns and rows thereof;
having the twisted pairs in the same row with the same twist direction;
having the twisted pairs in the adjacent two rows with opposite twist directions; and
having every adjacent two twisted pairs in the same row or the same column with a phase shift angle therebetween in a local coordinate system defined thereof.
6. The method as described in claim 5, wherein said rows and said columns are arranged perpendicular to each other.
7. The method as described in claim 5, further including a step of having every adjacent two twisted pairs in a diagonal direction with a phase shift angle therebetween in another local coordinate system defined thereof.
8. A cable comprising:
a plurality of twisted pairs arranged in a three dimension manner commonly defining a global coordinate system;
every adjacent two twisted pairs defining a local coordinate system wherein a zero angle line is defined by a connection line between two twist centers of said adjacent two twisted pairs; wherein
for said every adjacent two twisted pairs, there is a phase shift angle therebetween in the local coordinate system regardless of whether there is a phase shift angle therebetween in the global coordinate system.
9. The cable as described in claim 8, wherein said twisted pairs are arranged in a matrix type.
10. The cable as described in claim 9, wherein the local coordinate system defined by two diagonally adjacent twisted pairs is not compliant with the global coordinate system.
11. A method of reducing a crosstalk in a bunch of twisted pairs in a cable, comprising steps of:
arranging the twisted pairs in three dimension directions wherein all the twisted pairs extend in a first of said three dimension directions;
having the twisted pairs stacked in second and third of said three dimension directions; wherein
every adjacent two twisted pairs along at least one of said second and third directions have a phase shift angle with each other in the local coordinate system defined between said adjacent twisted pairs.
12. The method as described in claim 11, wherein the twisted pairs arranged in an array along one of said second and third directions, have the same twist direction.
13. The method as described in claim 11, wherein every adjacent two twisted pairs along one of said second and third directions, have opposite twist directions.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A resin composition comprising:
a base resin containing an ethylene-acrylic acid ester copolymer as a main component;
a lubricant dispersed in the base resin, the lubricant containing a metal soap; and
a metal hydroxide in a range from 5 to 60 mass %.
2. An electric wire comprising:
an insulating coating layer containing the resin composition according to claim 1; and
a conductor coated with the insulating coating layer.
3. The electric wire according to claim 2,
wherein a cross-sectional area of the conductor is 3 sq or more, and
a thickness of the insulating coating layer is 0.32 mm or more.
4. The electric wire according to claim 2, further comprising:
a shield layer coating the insulating coating layer; and
a sheath layer coating the shield layer.

1. A method, comprising:
receiving a source spreadsheet;
receiving a target spreadsheet;
generating a mapping to transform the source spreadsheet into the target spreadsheet; and
saving the mapping
2. The method of claim 1, wherein receiving the source spreadsheet comprises receiving user-input selecting the source spreadsheet from an online database.
3. The method of claim 1, wherein receiving the target spreadsheet comprises receiving user-input selecting the target spreadsheet from an online database.
4. The method of claim 1, further comprising receiving user input defining a transformation constraint; and generating a test mapping to transform data from the source spreadsheet to data in the target spreadsheet based on the transformation constraint and the mapping.
5. The method of claim 4, further comprising performing a debug operation to debug the mapping based on the test mapping.
6. A method comprising:
generating code for a graphical user-interface (GUI), the GUI comprising
a first area to allow a user to select an input file and input format associated with the input file;
a second area to allow the user to select an output file and output format associated with the output file;
a third area in which data from the input file in accordance with the input format and data from the output file in accordance with the output format is displayed; and

sending the code to client computer.
7. The method of claim 6, further comprising generating a transformation to transform data in the format of the input file to data in the format of the output file.
8. The method of claim 7, wherein the GUI further comprises a fourth area to enable the user to input a transformation constraint to constrain the transformation.
9. The method of claim 8, wherein the transformation constraint is selected from the group consisting of a validation condition and a formatting condition.
10. The method of claim 8, wherein the fourth area is disposed within the third area such that data from the input file is to the left of the fourth area and data from the output file is to the right of the fourth area.
11. A system, comprising:
a processor; and
a memory coupled to the processor, the memory storing instructions which when executed by the processor cause the system to perform a method comprising:
receiving a source spreadsheet;
receiving a target spreadsheet;
generating a mapping to transform the source spreadsheet into the target spreadsheet; and
saving the mapping.
12. The system of claim 11, wherein receiving the source spreadsheet comprises receiving user-input selecting the source spreadsheet from an online database.
13. The system of claim 11, wherein receiving the target spreadsheet comprises receiving user-input selecting the target spreadsheet from an online database.
14. The system of claim 11, wherein the method further comprises receiving user input defining a transformation constraint; and generating a test mapping to transform data from the source spreadsheet to data in the target spreadsheet based on the transformation constraint and the mapping.
15. The system of claim 14, wherein the method further comprises performing a debug operation to debug the mapping based on the test mapping.
16. A system, comprising:
a processor; and
a memory coupled to the processor, the memory storing instructions which when executed by the processor cause the system to perform a method comprising:
generating code for a graphical user-interface (GUI), the GUI comprising a first area to allow a user to select an input file and input format associated with the input file;
a second area to allow the user to select an output file and output format associated with the output file;
a third area to which the data from the input file in accordance with the input format and data from the output file in accordance with the output format is displayed; and

sending the code to client computer.
17. The system of claim 16, wherein the method further comprises generating a transformation to transform data in the format of the input file to data in the format of the output file.
18. The system of claim 17, wherein the GUI further comprises a fourth area to enable the user to input a transformation constraint to constrain the transformation.
19. The system of claim 17, wherein the transformation constraint is selected from the group consisting of a validation condition and a formatting condition.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A method comprising:
receiving an instruction having an opcode associated with a first predicate condition and a second predicate condition;
executing the instruction to generate a result;
determining whether the first predicate condition is true;
if the first predicate condition is true, then storing the result of the instruction in a first output register, or
if the first predicate condition is false, then storing the result of the instruction in a second output register; and
determining whether the second predicate condition is true; and
if the second predicate condition is true, then applying a first input argument to the opcode, or
if the second predicate condition is false, then applying a second input argument to the opcode.
2. The method of claim 1, wherein the opcode is associated with a third predicate condition, and wherein executing the instruction is performed only when the third predicate condition is true.
3. The method of claim 1, wherein the instruction is included in a program for performing a ray-box intersection test.
4. The method of claim 1, wherein the instruction is a very long instruction word (VLIW).
5. The method of claim 1, wherein the opcode specifies an arithmetic operation.
6. The method of claim 1, wherein a processor, configured to execute the instruction, includes a first predicate register configured to store the first predicate condition and a second predicate register configured to store the second predicate condition.
7. A non-transitory computer-readable storage medium storing instructions that, when executed by a processor, cause the processor to perform steps comprising:
receiving an instruction associated with a first predicate condition and a second predicate condition;
executing the instruction to generate a result;
determining whether the first predicate condition is true;
if the first predicate condition is true, then storing the result of the instruction in a first output register, or
if the first predicate condition is false, then storing the result of the instruction in a second output register; and
determining whether the second predicate condition is true; and
if the second predicate condition is true, then applying a first input argument to the opcode, or
if the second predicate condition is false, then applying a second input argument to the opcode.
8. The non-transitory computer-readable storage medium of claim 7, wherein the opcode is associated with a third predicate condition, and wherein executing the instruction is performed only when the third predicate condition is true.
9. The non-transitory computer-readable storage medium of claim 7, wherein the instruction is included in a program for performing a ray-box intersection test.
10. The non-transitory computer-readable storage medium of claim 7, wherein the instruction is a very long instruction word (VLIW).
11. The non-transitory computer-readable storage medium of claim 7, wherein the opcode specifies an arithmetic operation.
12. A processor comprising:
an instruction register for storing an instruction having an opcode associated with a first predicate condition and a second predicate condition;
a first predicate register for storing the first predicate condition;
a second predicate register for storing the second predicate condition;
a first output register; and
a second output register,
wherein the processor is configured to:
execute the instruction to generate a result,
determine whether the first predicate condition is true,
if the first predicate condition is true, then storing the result of the instruction in the first output register, or
if the first predicate condition is false, then storing the result of the instruction in the second output register, and
determine whether the second predicate condition is true, and
if the second predicate condition is true, then apply a first input argument to the opcode, or
if the second predicate condition is false, then apply a second input argument to the opcode.
13. The processor of claim 12, wherein the opcode is associated with a third predicate condition, the processor further comprising a third predicate register for storing the third predicate condition, and wherein the processor is further configured to only execute the instruction when the third predicate condition is true.
14. The processor of claim 12, wherein the instruction is included in a program for performing a ray-box intersection test.
15. The processor of claim 12, wherein the instruction is a very long instruction word (VLIW).
16. The processor of claim 12, wherein the processor is a parallel processing architecture.
17. The processor of claim 12, wherein the processor is a graphics processing unit.