1. A method of synchronizing forward call traffic over backhaul links, the method comprising:
receiving reverse call traffic over a plurality of backhaul links from a plurality of base stations serving a mobile device;
processing the reverse call traffic to determine a differential delay in receiving the reverse call traffic over the backhaul links;
receiving forward call traffic; and
transmitting the forward call traffic over the backhaul links to the base stations based on the differential delay determined for the reverse call traffic to substantially synchronize receipt of the forward call traffic at the base stations.
2. The method of claim 1 wherein processing the reverse call traffic to determine a differential delay in the receiving the reverse call traffic over the backhaul links comprises:
processing a receipt time of a reverse frame in the reverse call traffic for each of the backhaul links; and
determining a delay for each of the backhaul links based on the receipt times of the reverse frame.
3. The method of claim 2 wherein transmitting the forward call traffic over the backhaul links to the base stations based on the differential delay comprises:
identifying a forward frame in the forward call traffic; and
transmitting the forward frame over a first one of the backhaul links having the highest delay.
4. The method of claim 3 further comprising:
identifying a second one of the backhaul links having the next highest delay;
calculating a difference between the delay of the first one of the backhaul links having the highest delay and the delay of the second one of the backhaul links having the next highest delay to determine a buffer interval for the second one of the backhaul links; and
transmitting the forward frame over the second one of the backhaul links after the determined buffer interval.
5. The method of claim 4 further comprising:
identifying a third one of the backhaul links having the third highest delay;
calculating a difference between the delay of the first one of the backhaul links having the highest delay and the delay of the third one of the backhaul links having the third highest delay to determine a buffer interval for the third one of the backhaul links; and
transmitting the forward frame over the third one of the backhaul links after the determined buffer interval.
6. The method of claim 1 wherein the forward call traffic is in a first format, and further comprising:
converting the forward call traffic from the first format to a second format before transmitting the forward call traffic to at least one of the base stations.
7. The method of claim 6 wherein the first format comprises a proprietary format and the second format comprises an Inter-vendor Operating System (IOS) format.
8. A traffic processing unit adapted to synchronize forward call traffic over backhaul links, the traffic processing unit comprising:
a reverse traffic processor adapted to receive reverse call traffic over a plurality of backhaul links from a plurality of base stations serving a mobile device; and
a forward traffic processor adapted to process the reverse call traffic to determine a differential delay in receiving the reverse call traffic over the backhaul links;
the forward traffic processor further adapted to receive forward call traffic, and to transmit the forward call traffic over the backhaul links to the base stations based on the differential delay determined for the reverse call traffic to substantially synchronize receipt of the forward call traffic at the base stations.
9. The traffic processing unit of claim 8 wherein the forward traffic processor is further adapted to:
process a receipt time of a reverse frame in the reverse call traffic for each of the backhaul links; and
determine a delay for each of the backhaul links based on the receipt times of the reverse frame.
10. The traffic processing unit of claim 9 wherein the forward traffic processor is further adapted to:
identify a forward frame in the forward call traffic; and
transmit the forward frame over a first one of the backhaul links having the highest delay.
11. The traffic processing unit of claim 10 wherein the forward traffic processor is further adapted to:
identify a second one of the backhaul links having the next highest delay;
calculate a difference between the delay of the first one of the backhaul links having the highest delay and the delay of the second one of the backhaul links having the next highest delay to determine a buffer interval for the second one of the backhaul links; and
transmit the forward frame over the second one of the backhaul links after the determined buffer interval.
12. The traffic processing unit of claim 11 wherein the forward traffic processor is further adapted to:
identify a third one of the backhaul links having the third highest delay;
calculate a difference between the delay of the first one of the backhaul links having the highest delay and the delay of the third one of the backhaul links having the third highest delay to determine a buffer interval for the third one of the backhaul links; and
transmit the forward frame over the third one of the backhaul links after the determined buffer interval.
13. The traffic processing unit of claim 8 wherein the forward call traffic is in a first format, and further comprising a translator system adapted to convert the forward call traffic from the first format to a second format before the forward call traffic is transmitted to at least one of the base stations.
14. The traffic processing unit of claim 13 wherein the first format comprises a proprietary format and the second format comprises an Inter-vendor Operating System (IOS) format.
15. A communication network, comprising:
a plurality of base stations;
a traffic processing unit; and
a plurality of backhaul links connecting the base stations to the traffic processing unit;
the traffic processing unit adapted to receive reverse call traffic over the backhaul links from the base stations serving a mobile device;
the traffic processing unit further adapted to process the reverse call traffic to determine a differential delay in receiving the reverse call traffic over the backhaul links, to receive forward call traffic from a core network, and to transmit the forward call traffic over the backhaul links to the base stations based on the differential delay determined for the reverse call traffic to substantially synchronize receipt of the forward call traffic at the base stations.
16. The communication network of claim 15 wherein the traffic processing unit is further adapted to:
process a receipt time of a reverse frame in the reverse call traffic for each of the backhaul links; and
determine a delay for each of the backhaul links based on the receipt times of the reverse frame.
17. The communication network of claim 16 wherein the traffic processing unit is further adapted to:
identify a forward frame in the forward call traffic; and
transmit the forward frame over a first one of the backhaul links having the highest delay.
18. The communication network of claim 17 wherein the traffic processing unit is further adapted to:
identify a second one of the backhaul links having the next highest delay;
calculate a difference between the delay of the first one of the backhaul links having the highest delay and the delay of the second one of the backhaul links having the next highest delay to determine a buffer interval for the second one of the backhaul links; and
transmit the forward frame over the second one of the backhaul links after the determined buffer interval.
19. The communication network of claim 18 wherein the forward traffic processor is further adapted to:
identify a third one of the backhaul links having the third highest delay;
calculate a difference between the delay of the first one of the backhaul links having the highest delay and the delay of the third one of the backhaul links having the third highest delay to determine a buffer interval for the third one of the backhaul links; and
transmit the forward frame over the third one of the backhaul links after the determined buffer interval.
20. The communication network of claim 15 wherein the forward call traffic is in a first format, and wherein the traffic processing unit is further adapted to convert the forward call traffic from the first format to a second format before transmitting to at least one of the base stations.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A method of forming a low temperature polysilicon thin film transistor, comprising the steps of:
forming an amorphous silicon layer over a substrate;
performing a plasma treatment;
transforming the amorphous silicon layer into a polysilicon layer;
patterning the polysilicon layer to form a plurality of island polysilicon layers;
forming a channel region and a doped sourcedrain region on each side of the channel region in each island polysilicon layer; and
forming a gate over each channel region.
2. The method of claim 1, wherein the step of performing the plasma treatment comprises applying an oxygen-containing plasma to adjust the threshold voltage in the negative direction.
3. The method of claim 2, wherein the oxygen-containing plasma comprises nitrous oxide (N2O) plasma.
4. The method of claim 1, wherein the step of performing the plasma treatment comprises applying a hydrogen-containing plasma to adjust the threshold voltage in the positive direction.
5. The method of claim 4, wherein the hydrogen-containing plasma comprises ammonia (NH3) plasma.
6. The method of claim 4, wherein the hydrogen-containing plasma comprises hydrogen (H2) plasma.
7. The method of claim 1, wherein the desired shift in the threshold voltage is effected by varying the radio frequency power to the plasma treatment.
8. The method of claim 1, wherein the desired shift in the threshold voltage is effected by varying the processing period of the plasma treatment.
9. The method of claim 1, wherein the step of patterning the polysilicon layer further comprises forming a gate insulation layer over the island polysilicon layers.
10. A method of forming a low temperature polysilicon thin film transistor, comprising the steps of:
providing a substrate;
forming an amorphous silicon layer over the substrate;
performing a plasma treatment;
performing a laser annealing process to transform the amorphous silicon layer into a polysilicon layer;
patterning the polysilicon layer to form a plurality of island polysilicon layers;
forming a gate insulation layer over the island polysilicon layers;
forming a channel region in each island polysilicon layer and a doped sourcedrain region on each side to the channel regions; and
forming a gate over the channel regions.
11. The method of claim 10, wherein the step of performing the plasma treatment comprises applying an oxygen-containing plasma to adjust the threshold voltage in the negative direction.
12. The method of claim 11, wherein the oxygen-containing plasma comprises nitrous oxide (N2O) plasma.
13. The method of claim 10, wherein the step of performing the plasma treatment comprises applying a hydrogen-containing plasma to adjust the threshold voltage in the positive direction.
14. The method of claim 13, wherein the hydrogen-containing plasma comprises ammonia (NH3) plasma.
15. The method of claim 13, wherein the hydrogen-containing plasma comprises hydrogen (H2) plasma.
16. The method of claim 10, wherein the desired shift in the threshold voltage is effected by varying the radio frequency power to the plasma treatment.
17. The method of claim 10, wherein the desired shift in the threshold voltage is effected by varying the processing period of the plasma treatment.
18. The method of claim 10, wherein the laser annealing process comprises performing an excimer laser annealing process.
19. The method of claim 10, wherein the step of forming the amorphous silicon layer over the substrate, further comprises:
forming a silicon nitride layer over the substrate; and
forming a silicon oxide layer over the silicon nitride layer.
20. The method of claim 10, wherein the step of forming a channel layer in each island polysilicon layer and a doped sourcedrain region on each side to the channel region further comprises:
forming a first patterned photoresist layer over the gate insulation layer to expose the upper surface of on each side of each island polysilicon layer; and
performing a p doping process.
21. The method of claim 20, wherein the step of performing the p doping process further comprises removing the first patterned photoresist layer.
22. The method of claim 10, wherein the step of forming a channel region in each island polysilicon layer and a doped sourcedrain region on each side to the channel region further comprises:
forming a second patterned photoresist layer over the substrate to cover a portion of the various island polysilicon layers and expose the upper surface on each side of the island polysilicon layers; and
performing an n doping process.
23. The method of claim 22, wherein the step of performing the n doping process further comprises removing the second patterned photoresist layer.
24. The method of claim 23, wherein the step of removing the second patterned photoresist layer further comprises:
forming a third patterned photoresist layer over the gate insulation layer to expose an area adjacent to the doped sourcedrain region of various island polysilicon layer; and
performing an n doping process to form lightly doped drain regions.
25. The method of claim 24, wherein the step of performing the n doping process further comprises removing the third patterned photoresist layer.
26. The method of claim 10, wherein the step of forming a gate over the channel regions further comprises performing an activation process.
27. The method of claim 10, wherein the step of forming a gate over the channel regions further comprises:
forming an inter-layer dielectric over the substrate;
forming a plurality of first openings in the inter-layer dielectric and the gate insulation layer to expose the doped sourcedrain regions; and
forming a plurality of sourcedrain metallic contacts over the inter-layer dielectric so that the sourcedrain metallic contacts and various doped sourcedrain regions are electrically connected via the first openings.
28. The method of claim 27, wherein the step of forming a plurality of sourcedrain metallic contacts further comprises:
forming a passivation layer over the substrate;
forming a second opening in the passivation layer to expose a portion of the sourcedrain metallic contact; and
forming a pixel electrode over the passivation layer such that the pixel electrode and a portion of the sourcedrain metallic contact are electrically connected through the second opening.
29. A low temperature polysilicon thin film transistor, comprising a polysilicon layer, a gate and a gate insulation layer, wherein the gate insulation layer is positioned between the gate and the polysilicon layer, the polysilicon layer has a channel region, and the concentration of oxygen within the channel region is between 1E19 to 1E23 atomscc while the concentration of hydrogen within the channel region is between 5E16 to 1E19 atomscc.
30. The low temperature polysilicon thin film transistor of claim 29, wherein the transistor further comprises a plurality of doped sourcedrain regions positioned in the polysilicon layer on each side to the channel region.
31. The low temperature polysilicon thin film transistor of claim 30, wherein the doped sourcedrain regions comprise p-doped regions.
32. The low temperature polysilicon thin film transistor of claim 30, wherein the doped sourcedrain regions comprise n-doped regions.
33. The low temperature polysilicon thin film transistor of claim 32, wherein the transistor further comprises a lightly doped drain region positioned between the doped sourcedrain region and the channel region.
34. The low temperature polysilicon thin film transistor of claim 30, wherein the transistor further comprises an inter-layer dielectric positioned over the gate insulation layer with the inter-layer dielectric having a plurality of first openings that exposes the doped sourcedrain regions.
35. The low temperature polysilicon thin film transistor of claim 34, wherein the transistor further comprises a plurality of sourcedrain metallic contacts for connecting electrically with the doped sourcedrain regions via the first openings.
36. The low temperature polysilicon thin film transistor of claim 35, wherein the transistor further comprises a passivation layer positioned to cover the inter-layer dielectric and the sourcedrain metallic contacts such that the passivation layer has a second opening that exposes a portion of the sourcedrain metallic contact.
37. The low temperature polysilicon thin film transistor of claim 36, wherein the passivation layer comprises a silicon nitride layer.
38. The low temperature polysilicon thin film transistor of claim 36, wherein the transistor further comprises a pixel electrode positioned over the passivation layer and electrically connected to a portion of the sourcedrain metallic contact via the second opening.
39. The low temperature polysilicon thin film transistor of claim 38, wherein material constituting the pixel electrode comprises indium-tin oxide.