Author: claimsbot

That which is claimed is:

1. An architecture of a FLASH memory organized in a plurality of physical sectors wherein read, write and erase operations of data occupying a fractional memory space of any one of said physical sectors are carried out, characterized in that each physical sector is split in a plurality of singularly addressable logic sectors, each logic sector (j) corresponding to a memory space of a pre-established dimension including a storage space (PAYLOADj) and a header space containing:
a chain pointer (CHAIN_PTRj) assuming a neutral value (NULL) or a value pointing directly or indirectly to a second logic sector associated to a respective chain pointer (CHAIN_PTR2) equal to said neutral value (NULL);
a status indicator (STATUSj) assuming a first value (FREE) if the logic sector is empty, a second value (OD) if the data stored in the storage space belongs to said logic sector, a third value (NOD) if said data do not belong to said logic sector, or a fourth value (DEL) if said data have been erased;
a remap pointer (REMAP_PTRj) assuming said neutral value (NULL) or a value pointing directly or indirectly to a respective chain pointer (CHAIN_PTR3) of a third logic sector.
2. A method of managing a FLASH memory in a plurality of physical sectors organized according to claim 1 and wherein read, write and erase operations of data occupying a fractional memory space of any one of said physical sectors are carried out, comprising
initializing the memory by setting all chain pointers (CHAIN_PTR) and all remap pointers of all the logic sectors into which the physical sectors are split equal to said neutral value (NULL) and setting all status indicators (STATUS) of said logic sectors at said first value (FREE);
virtually erasing a certain logic sector (j) whose respective chain pointer (CHAIN_PTRj) has said neutral value (NULL) by setting the respective status indicator (STATUSj) of said logic sector (j) at said fourth value (DEL);
reading data relative to any one of said logic sectors according to the following procedure:
if the respective status indicator (STATUSj) of said logic sector has one of said values first (FREE) or fourth (DEL), reading a null value;
if said status indicator (STATUSj) differs from said value first (FREE) or fourth (DEL) then
if the respective remap pointer (REMAP_PTRj) of said logic sector has a neutral value (NULL), reading the data stored in said logic sector if the respective chain pointer (CHAIN_PTRj) of said logic sector has a neutral value (NULL) or reading the data stored in another logic sector directly or indirectly addressed by said chain pointer (CHAIN_PTRj);
if said remap pointer (REMAP_PTRj) points to a chain pointer (CHAIN_PTRn1j) of a certain logic sector (n1j), reading data stored in said certain logic sector (n1j) if the respective chain pointer (CHAIN_PTRn1j) has a neutral value (NULL) or reading data stored in a different logic sector directly or indirectly addressed by said chain pointer (CHAIN_PTRn1j);
writing data in any logic sector according to the following procedure:
a) if the respective status indicator (STATUSj) of said logic sector has said first value (FREE), writing said set of data in the respective storage space of said logic sector and assigning to said status indicator (STATUSj) one of said values second (OD) or third (NOD);
b) if said status indicator (STATUSj) has said second value (OD), repeating step a) on another empty logic sector (n1j) setting the respective status indicator (STATUSn1j) of said other logic sector (n1j) equal to said third value (NOD) and setting the chain pointer (CHAIN_PTRi) of the logic sector (i) directly or indirectly addressed by said chain pointer (CHAIN_PTRj) of said logic sector (j) equal to the address of said other logic sector (n1j);
c) if said status indicator (STATUSj) has said third value (NOD) or said fourth value (DEL) and if the respective remap pointer (REMAP_PTRj) of said logic sector (j) has a neutral (NULL) value, repeating step a) on another empty logic sector (n1j) setting the respective status indicator (STATUSn1j) equal to said third value (NOD) and setting said remap pointer (REMAP_PTRj) equal to the address of said other logic sector (n1j);
d) if said remap pointer (REMAP_PTRj) is not neutral (NULL), repeating step a) on another empty logic sector (n1j) setting the respective status indicator (STATUSn1j) equal to said third value (NOD), setting a respective chain pointer (CHAIN_PTRj) of a further logic sector directly or indirectly addressed by said remap pointer (REMAP_PTRj) equal to the address of said other logic sector (n1j);
rewriting data stored in any physical sector according to the following procedure:

saving valid data contained in logic sectors whose respective chain pointers (CHAIN_PTR) have said neutral value (NULL) and the respective status indicator (STATUS) differs from said fourth value (DEL);
for any valid data, saving the address of the respective logic sector;
physically erasing said physical sector of the memory;
writing said saved data in the respective logic sectors and setting the respective status indicators (STATUS) at said second value (OD).
3. An architecture for managing a FLASH memory organized in a plurality of physical sectors singularly addressable by a physical address (BUF_ADDR), each defined by
a memory space (PAYLOAD) of a certain pre-established dimension;
a logical address (LOGICAL_ADDRESS)
a status indicator (STATUS) assuming a first value (EMPTY) if said logical address (LOGICAL_ADDRESS) has a neutral value (),
assuming a second value (BUSY) if said memory space (PAYLOAD) is being written on if said logical address (LOGICAL_ADDRESS) does not have a neutral value (), assuming a third value (GOOD) if said memory space (PAYLOAD) contains valid data or is empty, assuming a fourth value (OLD) if said memory space (PAYLOAD) contains data to be erased.
4. A method of managing a FLASH memory according to claim 3 and wherein at least a logical address (LOGICAL_ADDRESS) has said neutral value (), comprising:
accessing a certain physical sector according to the following procedure:
at the start-up of the memory, scanning all physical sectors of the memory, building a look up table associating to each scanned physical address a respective logical address;
finding the physical address (BUF_ADDR) of said physical sector to be accessed on the base of its respective logical address, by said look up table;
partially erasing data stored in any physical sector associated to any logical address according to the following procedure:
locating a free physical sector whose status indicator (STATUS) has said first value (EMPTY),
assigning said second value (BUSY) to the respective status indicator of said free physical sector,
setting the respective logical address of said free physical sector equal to the logical address of said physical sector to be erased,
copying in said free physical sector data to be saved that are stored in said physical sector to be erased,
assigning said third value (GOOD) to said status indicator of said free physical sector,
assigning said fourth value (OLD) to the respective state of said physical sector to be erased,
erasing the data contained in said physical sector to be erased,
assigning said first value (EMPTY) to said status indicator of said physical sector to be erased and setting the respective logical address (LOGICAL_ADDRESS) to a neutral value (),
updating said look up table;
effecting a boot erasing of the memory by:
examining one by one all physical sectors of the memory, erasing all physical sectors whose status indicator is invalid or has said second value (Busy) or fourth value (OLD), or has said third value (GOOD) but its logical address (LOGICAL_ADDRESS) is already assigned to a different physical sector;
assigning said first value (EMPTY) to the respective status indicators of said erased physical sectors;
assigning a respective logical address (LOGICAL_ADDRESS) to any free physical sector not having a logical address; and
formatting the memory by:
examining one by one said physical sectors of the memory whose status indicator has said first value (EMPTY), setting at least a logical address (LOGICAL_ADDRESS) of a physical sector at said neutral value (), and setting the status indicators of the remaining physical sectors at said third value (GOOD) and assigning respective logical addresses.
5. The method according to claim 4, wherein access to a certain physical sector takes place by scanning the physical sectors until verifying identity of the logical address associated to one of them with the required address.
6. The method according to one of the claims 4 and 5, wherein there is a single physical sector with an address equal to said neutral value ().

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A transmitter, connected to a first antenna, and comprising:
a signal generating unit, configured to generate a first test signal;
a coupler, configured to receive the first test signal generated by the signal generating unit and a second test signal detected by the first antenna, wherein the second test signal is transmitted by a second antenna that is connected to another transmitter; and
a signal processing unit, configured to measure a timing difference between the first test signal and the second test signal that are received by the coupler, and use the measured timing difference to control generation of a transmission signal, so as to align a signal transmission delay between the transmitter and said another transmitter.
2. The transmitter according to claim 1, wherein:
the first test signal is correlated with the second test signal; and the signal processing unit is specifically configured to:
measuring the timing difference between the first test signal and the second test signal through a correlation operation.
3. The transmitter according to claim 1, wherein:
the signal processing unit is further configured to measure a first timing difference between the first test signal and a reference signal; measure a second timing difference between the second test signal and the reference signal; and use the first timing difference and the second timing difference to calculate the timing difference between the first test signal and the second test signal.
4. The transmitter according to claim 1, wherein:
the transmitter is connected to the first antenna through a first feeder cable, and said another transmitter is connected to the second antenna through a second feeder cable; and
the signal processing unit is further configured to compensate for a delay of the first feeder cable and the second feeder cable in the process that the signal processing unit measures the timing difference between the first test signal and the second test signal that are received by the coupler.
5. The transmitter according to claim 1, wherein:
the first antenna and the second antenna make up a dual-polarization antenna.
6. The transmitter according to claim 1, wherein:
the using the measured timing difference to control generation of the signal comprises:
using the measured timing difference to control generation of a transmission signal of the signal generating unit.
7. The transmitter according to claim 1, wherein:
the first test signal andor the second test signal is a dedicated test signal or a normal service signal.
8. The transmitter according to claim 7, wherein:
the directional coupler is disposed between a transmitting channel of the transmitter and a duplexer, or disposed between the duplexer of the transmitter and the first antenna.
9. The transmitter according to claim 7, wherein:
the signal processing unit comprises a receiving channel, which is configured to receive the first test signal and the second test signal; and the transmitter further comprises a radio frequency switch, which is configured to switch between the forward output end and the backward output end of the directional coupler in turn.
10. The transmitter according to claim 1, wherein:
the coupler is a directional coupler, and a forward output end of the directional coupler is configured to output the first test signal, and a backward output end of the directional coupler is configured to output the second test signal.
11. The transmitter according to claim 1, wherein:
the signal processing unit comprises two independent channels, which are configured to receive the first test signal and the second test signal respectively.
12. A base station device, comprising:
a first antenna, a second antenna, and a first transmitter connected to the first antenna, wherein the first transmitter comprising:
a first signal generating unit, configured to generate a first test signal;
a first coupler, configured to receive the first test signal generated by the first signal generating unit and a second test signal detected by the first antenna, wherein the second test signal is transmitted by the second antenna that is connected to a second transmitter; and
a first signal processing unit, configured to measure a first timing difference between the first test signal and the second test signal that are received by the first coupler, and use the measured timing difference to control generation of a transmission signal, so as to align a signal transmission delay between the first transmitter and the second transmitter.
13. The base station device according to claim 12, further comprising the second transmitter connected to the second antenna, wherein:
the second transmitter comprising:
a second signal generating unit, configured to generate the second test signal;
a second coupler, configured to receive the second test signal generated by the second signal generating unit and the first test signal detected by the second antenna, wherein the first test signal is transmitted by the first antenna that is connected to the first transmitter; and
a second signal processing unit, configured to measure a second timing difference between the first test signal and the second test signal that are received by the second coupler; and
wherein
the first signal processing unit is further configured to obtain a difference value between the first timing difference measured by the first signal processing unit and the second timing difference measured by the second signal processing unit, divide the obtained difference value by 2 to obtain a value, and use the value to control generation of the transmission signal.
14. The base station device according to claim 13, wherein:
the first antenna detects the second test signal transmitted by the second antenna through coupling between the first antenna and the second antenna; and the second antenna detects the first test signal transmitted by the first antenna through coupling between the first antenna and the second antenna.
15. The base station device according to claim 12, wherein the first antenna and the second antenna make up a dual-polarization antenna.
16. The base station device according to claim 12, wherein:
the first test signal is correlated with the second test signal; and the first signal processing unit is specifically configured to:
measuring the timing difference between the first test signal and the second test signal through a correlation operation.
17. A method for aligning a signal output from a transmitter comprising:
detecting, by a base station device, through a first antenna connected to a first transmitter, a second test signal transmitted by a second antenna that is connected to a second transmitter;
generating, by the base station device, a first test signal;
measuring, by the base station device, a timing difference between the generated first test signal and the detected second test signal; and
using, by the base station device, the measured timing difference to control generation of a transmission signal, so as to align a signal transmission delay between the first transmitter and the second transmitter.
18. The method according to claim 17, wherein:
the measuring the timing difference between the first test signal and the second test signal comprises:
measuring a first timing difference between the first test signal and a reference signal;
measuring a second timing difference between the second test signal and the reference signal; and
using the first timing difference and the second timing difference to calculate the timing difference between the first test signal and the second test signal.
19. The method according to claim 17, wherein:
the first test signal is correlated with the second test signal, and the measuring the timing difference between the first test signal and the second test signal comprises:
measuring the timing difference between the first test signal and the second test signal through a correlation operation.
20. The method according to claim 19, wherein:
the first test signal andor the second test signal is a dedicated test signal or a normal service signal.

What is claimed is:

1. A device for compressing a load of particulate material in an open-top trailer comprising:
a frame mounted on a support so as to be elevated over a load of particulate material in an open-top trailer,
a drum roller rotatably mounted to said frame,
a windrower mounted to said frame adjacent said drum roller,
said windrower for windrowing a heaped portion of said load of particulate material, said heaped portion heaped above upper edges of sides of said trailer, said windrower windrowing said heaped portion into a windrow of particulate material generally centrally aligned with a longitudinal axis of said trailer as said trailer and said windrower are translated relative to one another along said longitudinal axis,
said drum roller disposed on said frame so as to roll over and thereby compress said windrow of particulate material as said trailer and said roller translate relative to one another along said longitudinal axis.
2. The device of claim 1 wherein said windrower has a converging load compression surface for slidably engaging and compressing said heaped portion of said load of particulate material.
3. The device of claim 2 wherein said load compression surface is a funnel.
4. The device of claim 1 wherein said roller extends along its axis of rotation so as to extend to at least said sides of said trailer.
5. A device for compressing a load of particulate material in an open-top trailer comprising:
a frame mountable on a support so as to be elevated over a load of particulate material in an open-top trailer,
a drum roller rotatably mountable to said frame,
a windrower mountable to said frame adjacent said drum roller,
said windrower for windrowing a heaped portion of said load of particulate material, said heaped portion heaped above upper edges of sides of said trailer, said windrower windrowing said heaped portion into a windrow of particulate material generally centrally aligned with a longitudinal axis of said trailer as said trailer and said windrower are translated relative to one another along said longitudinal axis,
said drum roller disposed on said frame so as to roll over and thereby compress said windrow of particulate material as said trailer and said roller translate relative to one another along said longitudinal axis.
6. The device of claim 5 wherein said windrower has a converging load compression surface for slidably engaging and compressing said heaped portion of said load of particulate material.
7. The device of claim 6 wherein said load compression surface is a funnel.
8. The device of claim 5 wherein said roller extends along its axis of rotation so as to extend to at least said sides of said trailer.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A method of forming boehmite particulate material, comprising:
providing boehmite precursor and boehmite seeds in water to form an aqueous suspension; and
hydrothermally treating the aqueous suspension to convert the boehmite precursor into boehmite particles having a needle-shaped morphology, an aspect ratio of at least 3:1, wherein aspect ratio is the ratio of longest dimension to next largest dimension at least 3:1, and a particle size within a range of 50 to 2000 nm, wherein the boehmite seeds provide a nucleation site for the growth of the boehmite particles.
2. The method of claim 1, wherein the boehmite particles have an aspect ratio of at least 6:1.
3. The method of claim 1, wherein the boehmite particles have a particle size within a range of 100 to 1000 nm.
4. The method of claim 1, wherein the suspension contains 5 to 40wt % of boehmite precursor.
5. The method of claim 4, wherein the suspension contains 10 to 30 wt % of boehmite precursor.
6. The method of claim 1, wherein the suspension contains 2 to 15 wt % boehmite seeds, based on the weight of the boebruite precursor.
7. The method of claim 6, wherein the suspension contains 5 to 10 wt % boehmite seeds, based on the weight of the boehmite precursor.
8. The method of claim 1, wherein hydrothermal treatment is carried out at a temperature within a range of 100 to 300\xb0 C.
9. The method of claim 8, wherein hydrothermal treatment is carried out at a temperature within a range of 150 to 250\xb0 C.
10. The method of claim 1, wherein hydrothermal treatment is carried out under autogenous conditions.
11. The method of claim 1, wherein hydrothermal treatment is carried out under a pressure of about 1\xd7105 to 8.5\xd7106 Nm2.
12. The method of claim 11, wherein hydrothermal treatment is carried out under a pressure of about 5\xd7105 to 1.2\xd7106 Nm2.
13. The method of claim 1, wherein hydrothermal treatment is carried out in an acidic pH.
14. The method of claim 1, wherein the boehmite particles have a surface area greater than about 75 m2g.
15. The method of claim 14, wherein the boehmite particles have a surface area greater than about 100 m2g.
16. The method of claim 15, wherein the boelimite particles have a surface area within a range of about 100 m2g to 300 m2g.
17. The method of claim 1, wherein the boehmite particles are nano-dispersable.